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BranchCommit messageAuthorAge
archive/unc-master-3.0P-FP: fix BUG_ON releated to priority inheritanceBjoern Brandenburg13 years
archived-2013.1uncachedev: mmap memory that is not cached by CPUsGlenn Elliott12 years
archived-private-masterMerge branch 'wip-2.6.34' into old-private-masterAndrea Bastoni15 years
archived-semi-partMerge branch 'wip-semi-part' of ssh://cvs/cvs/proj/litmus/repo/litmus2010 int...Andrea Bastoni15 years
demoFurther refinementsJonathan Herman14 years
ecrts-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
ecrts14-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
gpusync-rtss12Final GPUSync implementation.Glenn Elliott12 years
gpusync/stagingRename IKGLP R2DGLP.Glenn Elliott12 years
linux-tipMerge branch 'slab/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/p...Linus Torvalds15 years
litmus2008-patch-seriesadd i386 feather-trace implementationBjoern B. Brandenburg16 years
masterPSN-EDF: use inferred_sporadic_job_release_atBjoern Brandenburg9 years
pgmmake it compileGlenn Elliott12 years
prop/litmus-signalsInfrastructure for Litmus signals.Glenn Elliott13 years
prop/robust-tie-breakFixed bug in edf_higher_prio().Glenn Elliott13 years
stagingFix tracepoint compilation errorFelipe Cerqueira13 years
test9/23/2016Namhoon Kim9 years
tracing-develTest kernel tracing events capabilitiesAndrea Bastoni16 years
v2.6.34-with-arm-patchessmsc911x: Add spinlocks around registers accessCatalin Marinas15 years
v2015.1Add ARM syscall def for get_current_budgetBjoern Brandenburg10 years
wip-2011.2-bbbLitmus core: simplify np-section protocolBjoern B. Brandenburg14 years
wip-2011.2-bbb-traceRefactor sched_trace_log_message() -> debug_trace_log_message()Andrea Bastoni14 years
wip-2012.3-gpuSOBLIV draining support for C-EDF.Glenn Elliott12 years
wip-2012.3-gpu-preportpick up last C-RM fileGlenn Elliott12 years
wip-2012.3-gpu-rtss13Fix critical bug in GPU tracker.Glenn Elliott12 years
wip-2012.3-gpu-sobliv-budget-w-ksharkProper sobliv draining and many bug fixes.Glenn Elliott12 years
wip-aedzl-finalMake it easier to compile AEDZL interfaces in liblitmus.Glenn Elliott15 years
wip-aedzl-revisedAdd sched_trace data for Apative EDZLGlenn Elliott15 years
wip-arbit-deadlineFix compilation bug.Glenn Elliott13 years
wip-aux-tasksDescription of refined aux task inheritance.Glenn Elliott13 years
wip-bbbGSN-EDF & Core: improve debug TRACE'ing for NP sectionsBjoern B. Brandenburg14 years
wip-bbb-prio-donuse correct timestampBjoern B. Brandenburg14 years
wip-better-breakImplement hash-based EDF tie-breaking.Glenn Elliott13 years
wip-binary-heapMake C-EDF work with simplified binheap_deleteGlenn Elliott13 years
wip-budgetAdded support for choices in budget policy enforcement.Glenn Elliott15 years
wip-colorSummarize schedulability with final recordJonathan Herman13 years
wip-color-jlhsched_color: Fixed two bugs causing crashing on experiment restart and a rare...Jonathan Herman13 years
wip-d10-hz1000Enable HZ=1000 on District 10Bjoern B. Brandenburg15 years
wip-default-clusteringFeature: Make default C-EDF clustering compile-time configurable.Glenn Elliott15 years
wip-dissipation-jericksoUpdate from 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-dissipation2-jericksoUpdate 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-ecrts14-pgmMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
wip-edf-hsblast tested versionJonathan Herman14 years
wip-edf-osLookup table EDF-osJeremy Erickson12 years
wip-edf-tie-breakMerge branch 'wip-edf-tie-break' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus...Glenn Elliott13 years
wip-edzl-critiqueUse hr_timer's active checks instead of having own flag.Glenn Elliott15 years
wip-edzl-finalImplementation of the EDZL scheduler.Glenn Elliott15 years
wip-edzl-revisedClean up comments.Glenn Elliott15 years
wip-eventsAdded support for tracing arbitrary actions.Jonathan Herman15 years
wip-extra-debugDBG: add additional tracingBjoern B. Brandenburg15 years
wip-fix-switch-jericksoAttempt to fix race condition with plugin switchingJeremy Erickson15 years
wip-fix3sched: show length of runqueue clock deactivation in /proc/sched_debugBjoern B. Brandenburg15 years
wip-fmlp-dequeueImprove FMLP queue management.Glenn Elliott14 years
wip-ft-irq-flagFeather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-gpu-cleanupEnable sched_trace log injection from userspaceGlenn Elliott13 years
wip-gpu-interruptsRemove option for threading of all softirqs.Glenn Elliott14 years
wip-gpu-rtas12Generalized GPU cost predictors + EWMA. (untested)Glenn Elliott13 years
wip-gpu-rtss12Final GPUSync implementation.Glenn Elliott13 years
wip-gpu-rtss12-srpexperimental changes to support GPUs under SRPGlenn Elliott13 years
wip-gpusync-mergeCleanup priority tracking for budget enforcement.Glenn Elliott11 years
wip-ikglpMove RSM and IKGLP imp. to own .c filesGlenn Elliott13 years
wip-k-fmlpMerge branch 'mpi-master' into wip-k-fmlpGlenn Elliott14 years
wip-kernel-coloringAdded recolor syscallNamhoon Kim7 years
wip-kernthreadsKludge work-queue processing into klitirqd.Glenn Elliott15 years
wip-klmirqd-to-auxAllow klmirqd threads to be given names.Glenn Elliott13 years
wip-ksharkMerge branch 'mpi-staging' into wip-ksharkJonathan Herman13 years
wip-litmus-3.2Merge commit 'v3.2' into litmus-stagingAndrea Bastoni13 years
wip-litmus2011.2Cleanup: Coding conformance for affinity stuff.Glenn Elliott14 years
wip-litmus3.0-2011.2Feather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-master-2.6.33-rtAvoid deadlock when switching task policy to BACKGROUND (ugly)Andrea Bastoni15 years
wip-mcRemoved ARM-specific hacks which disabled less common mixed-criticality featu...Jonathan Herman12 years
wip-mc-bipasaMC-EDF addedbipasa chattopadhyay13 years
wip-mc-jericksoSplit C/D queuesJeremy Erickson15 years
wip-mc2-cache-slackManually patched mc^2 related codeMing Yang10 years
wip-mcrit-maccosmeticMac Mollison15 years
wip-merge-3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-merge-v3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-migration-affinityNULL affinity dereference in C-EDF.Glenn Elliott14 years
wip-mmap-uncacheshare branch with othersGlenn Elliott13 years
wip-modechangeRTSS 2017 submissionNamhoon Kim8 years
wip-nested-lockingAppears to be working.Bryan Ward12 years
wip-omlp-gedfFirst implementation of G-OMLP.Glenn Elliott15 years
wip-paiSome cleanup of PAIGlenn Elliott14 years
wip-percore-lib9/21/2016Namhoon Kim9 years
wip-performanceCONFIG_DONT_PREEMPT_ON_TIE: Don't preeempt a scheduled task on priority tie.Glenn Elliott14 years
wip-pgmAdd PGM support to C-FLGlenn Elliott12 years
wip-pgm-splitFirst draft of C-FL-splitNamhoon Kim12 years
wip-pm-ovdAdd preemption-and-migration overhead tracing supportAndrea Bastoni15 years
wip-prio-inhP-EDF updated to use the generic pi framework.Glenn Elliott15 years
wip-prioq-dglBUG FIX: Support DGLs with PRIOQ_MUTEXGlenn Elliott13 years
wip-refactored-gedfGeneralizd architecture for GEDF-style scheduelrs to reduce code redundancy.Glenn Elliott15 years
wip-release-master-fixbugfix: release master CPU must signal task was pickedBjoern B. Brandenburg14 years
wip-robust-tie-breakEDF priority tie-breaks.Glenn Elliott13 years
wip-rt-ksharkMove task time accounting into the complete_job method.Jonathan Herman13 years
wip-rtas12-pgmScheduling of PGM jobs.Glenn Elliott13 years
wip-semi-partFix compile error with newer GCCJeremy Erickson12 years
wip-semi-part-edfos-jericksoUse initial CPU set by clientJeremy Erickson12 years
wip-shared-libTODO: Fix condition checks in replicate_page_move_mapping()Namhoon Kim9 years
wip-shared-lib2RTAS 2017 Submission ver.Namhoon Kim9 years
wip-shared-memInitial commit for shared libraryNamhoon Kim9 years
wip-splitting-jericksoFix release behaviorJeremy Erickson13 years
wip-splitting-omlp-jericksoBjoern's Dissertation Code with Priority DonationJeremy Erickson13 years
wip-stage-binheapAn efficient binary heap implementation.Glenn Elliott13 years
wip-sun-portDynamic memory allocation and clean exit for FeatherTraceChristopher Kenna15 years
wip-timer-tracebugfix: C-EDF, clear scheduled field of the correct CPU upon task_exitAndrea Bastoni15 years
wip-tracepointsAdd kernel-style events for sched_trace_XXX() functionsAndrea Bastoni14 years
 
TagDownloadAuthorAge
2015.1commit 8e51b37822...Bjoern Brandenburg10 years
2013.1commit bcaacec1ca...Glenn Elliott12 years
2012.3commit c158b5fbe4...Jonathan Herman13 years
2012.2commit b53c479a0f...Glenn Elliott13 years
2012.1commit 83b11ea1c6...Bjoern B. Brandenburg14 years
rtas12-mc-beta-expcommit 8e236ee20f...Christopher Kenna14 years
2011.1commit d11808b5c6...Christopher Kenna15 years
v2.6.37-rc4commit e8a7e48bb2...Linus Torvalds15 years
v2.6.37-rc3commit 3561d43fd2...Linus Torvalds15 years
v2.6.37-rc2commit e53beacd23...Linus Torvalds15 years
v2.6.37-rc1commit c8ddb2713c...Linus Torvalds15 years
v2.6.36commit f6f94e2ab1...Linus Torvalds15 years
2010.2commit 5c5456402d...Bjoern B. Brandenburg15 years
v2.6.36-rc8commit cd07202cc8...Linus Torvalds15 years
v2.6.36-rc7commit cb655d0f3d...Linus Torvalds15 years
v2.6.36-rc6commit 899611ee7d...Linus Torvalds15 years
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2010.1commit 7c1ff4c544...Andrea Bastoni15 years
v2.6.34commit e40152ee1e...Linus Torvalds15 years
v2.6.33.4commit 4640b4e7d9...Greg Kroah-Hartman15 years
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v2.6.13-rc3commit c32511e271...
pan> #define DAC_TYPE_MASK 0x00070000 /* read only */ /* Mix control values */ #define MIX_NOT_DST 0x0000 #define MIX_0 0x0001 #define MIX_1 0x0002 #define MIX_DST 0x0003 #define MIX_NOT_SRC 0x0004 #define MIX_XOR 0x0005 #define MIX_XNOR 0x0006 #define MIX_SRC 0x0007 #define MIX_NAND 0x0008 #define MIX_NOT_SRC_OR_DST 0x0009 #define MIX_SRC_OR_NOT_DST 0x000a #define MIX_OR 0x000b #define MIX_AND 0x000c #define MIX_SRC_AND_NOT_DST 0x000d #define MIX_NOT_SRC_AND_DST 0x000e #define MIX_NOR 0x000f /* Maximum engine dimensions */ #define ENGINE_MIN_X 0 #define ENGINE_MIN_Y 0 #define ENGINE_MAX_X 4095 #define ENGINE_MAX_Y 16383 /* Mach64 engine bit constants - these are typically ORed together */ /* BUS_CNTL register constants */ #define BUS_APER_REG_DIS 0x00000010 #define BUS_FIFO_ERR_ACK 0x00200000 #define BUS_HOST_ERR_ACK 0x00800000 /* GEN_TEST_CNTL register constants */ #define GEN_OVR_OUTPUT_EN 0x20 #define HWCURSOR_ENABLE 0x80 #define GUI_ENGINE_ENABLE 0x100 #define BLOCK_WRITE_ENABLE 0x200 /* DSP_CONFIG register constants */ #define DSP_XCLKS_PER_QW 0x00003fff #define DSP_LOOP_LATENCY 0x000f0000 #define DSP_PRECISION 0x00700000 /* DSP_ON_OFF register constants */ #define DSP_OFF 0x000007ff #define DSP_ON 0x07ff0000 #define VGA_DSP_OFF DSP_OFF #define VGA_DSP_ON DSP_ON #define VGA_DSP_XCLKS_PER_QW DSP_XCLKS_PER_QW /* PLL register indices and fields */ #define MPLL_CNTL 0x00 #define PLL_PC_GAIN 0x07 #define PLL_VC_GAIN 0x18 #define PLL_DUTY_CYC 0xE0 #define VPLL_CNTL 0x01 #define PLL_REF_DIV 0x02 #define PLL_GEN_CNTL 0x03 #define PLL_OVERRIDE 0x01 /* PLL_SLEEP */ #define PLL_MCLK_RST 0x02 /* PLL_MRESET */ #define OSC_EN 0x04 #define EXT_CLK_EN 0x08 #define FORCE_DCLK_TRI_STATE 0x08 /* VT4 -> */ #define MCLK_SRC_SEL 0x70 #define EXT_CLK_CNTL 0x80 #define DLL_PWDN 0x80 /* VT4 -> */ #define MCLK_FB_DIV 0x04 #define PLL_VCLK_CNTL 0x05 #define PLL_VCLK_SRC_SEL 0x03 #define PLL_VCLK_RST 0x04 #define PLL_VCLK_INVERT 0x08 #define VCLK_POST_DIV 0x06 #define VCLK0_POST 0x03 #define VCLK1_POST 0x0C #define VCLK2_POST 0x30 #define VCLK3_POST 0xC0 #define VCLK0_FB_DIV 0x07 #define VCLK1_FB_DIV 0x08 #define VCLK2_FB_DIV 0x09 #define VCLK3_FB_DIV 0x0A #define PLL_EXT_CNTL 0x0B #define PLL_XCLK_MCLK_RATIO 0x03 #define PLL_XCLK_SRC_SEL 0x07 #define PLL_MFB_TIMES_4_2B 0x08 #define PLL_VCLK0_XDIV 0x10 #define PLL_VCLK1_XDIV 0x20 #define PLL_VCLK2_XDIV 0x40 #define PLL_VCLK3_XDIV 0x80 #define DLL_CNTL 0x0C #define DLL1_CNTL 0x0C #define VFC_CNTL 0x0D #define PLL_TEST_CNTL 0x0E #define PLL_TEST_COUNT 0x0F #define LVDS_CNTL0 0x10 #define LVDS_CNTL1 0x11 #define AGP1_CNTL 0x12 #define AGP2_CNTL 0x13 #define DLL2_CNTL 0x14 #define SCLK_FB_DIV 0x15 #define SPLL_CNTL1 0x16 #define SPLL_CNTL2 0x17 #define APLL_STRAPS 0x18 #define EXT_VPLL_CNTL 0x19 #define EXT_VPLL_EN 0x04 #define EXT_VPLL_VGA_EN 0x08 #define EXT_VPLL_INSYNC 0x10 #define EXT_VPLL_REF_DIV 0x1A #define EXT_VPLL_FB_DIV 0x1B #define EXT_VPLL_MSB 0x1C #define HTOTAL_CNTL 0x1D #define BYTE_CLK_CNTL 0x1E #define TV_PLL_CNTL1 0x1F #define TV_PLL_CNTL2 0x20 #define TV_PLL_CNTL 0x21 #define EXT_TV_PLL 0x22 #define V2PLL_CNTL 0x23 #define PLL_V2CLK_CNTL 0x24 #define EXT_V2PLL_REF_DIV 0x25 #define EXT_V2PLL_FB_DIV 0x26 #define EXT_V2PLL_MSB 0x27 #define HTOTAL2_CNTL 0x28 #define PLL_YCLK_CNTL 0x29 #define PM_DYN_CLK_CNTL 0x2A /* CONFIG_CNTL register constants */ #define APERTURE_4M_ENABLE 1 #define APERTURE_8M_ENABLE 2 #define VGA_APERTURE_ENABLE 4 /* CONFIG_STAT0 register constants (GX, CX) */ #define CFG_BUS_TYPE 0x00000007 #define CFG_MEM_TYPE 0x00000038 #define CFG_INIT_DAC_TYPE 0x00000e00 /* CONFIG_STAT0 register constants (CT, ET, VT) */ #define CFG_MEM_TYPE_xT 0x00000007 #define ISA 0 #define EISA 1 #define LOCAL_BUS 6 #define PCI 7 /* Memory types for GX, CX */ #define DRAMx4 0 #define VRAMx16 1 #define VRAMx16ssr 2 #define DRAMx16 3 #define GraphicsDRAMx16 4 #define EnhancedVRAMx16 5 #define EnhancedVRAMx16ssr 6 /* Memory types for CT, ET, VT, GT */ #define DRAM 1 #define EDO 2 #define PSEUDO_EDO 3 #define SDRAM 4 #define SGRAM 5 #define WRAM 6 #define DAC_INTERNAL 0x00 #define DAC_IBMRGB514 0x01 #define DAC_ATI68875 0x02 #define DAC_TVP3026_A 0x72 #define DAC_BT476 0x03 #define DAC_BT481 0x04 #define DAC_ATT20C491 0x14 #define DAC_SC15026 0x24 #define DAC_MU9C1880 0x34 #define DAC_IMSG174 0x44 #define DAC_ATI68860_B 0x05 #define DAC_ATI68860_C 0x15 #define DAC_TVP3026_B 0x75 #define DAC_STG1700 0x06 #define DAC_ATT498 0x16 #define DAC_STG1702 0x07 #define DAC_SC15021 0x17 #define DAC_ATT21C498 0x27 #define DAC_STG1703 0x37 #define DAC_CH8398 0x47 #define DAC_ATT20C408 0x57 #define CLK_ATI18818_0 0 #define CLK_ATI18818_1 1 #define CLK_STG1703 2 #define CLK_CH8398 3 #define CLK_INTERNAL 4 #define CLK_ATT20C408 5 #define CLK_IBMRGB514 6 /* MEM_CNTL register constants */ #define MEM_SIZE_ALIAS 0x00000007 #define MEM_SIZE_512K 0x00000000 #define MEM_SIZE_1M 0x00000001 #define MEM_SIZE_2M 0x00000002 #define MEM_SIZE_4M 0x00000003 #define MEM_SIZE_6M 0x00000004 #define MEM_SIZE_8M 0x00000005 #define MEM_SIZE_ALIAS_GTB 0x0000000F #define MEM_SIZE_2M_GTB 0x00000003 #define MEM_SIZE_4M_GTB 0x00000007 #define MEM_SIZE_6M_GTB 0x00000009 #define MEM_SIZE_8M_GTB 0x0000000B #define MEM_BNDRY 0x00030000 #define MEM_BNDRY_0K 0x00000000 #define MEM_BNDRY_256K 0x00010000 #define MEM_BNDRY_512K 0x00020000 #define MEM_BNDRY_1M 0x00030000 #define MEM_BNDRY_EN 0x00040000 #define ONE_MB 0x100000 /* ATI PCI constants */ #define PCI_ATI_VENDOR_ID 0x1002 /* CONFIG_CHIP_ID register constants */ #define CFG_CHIP_TYPE 0x0000FFFF #define CFG_CHIP_CLASS 0x00FF0000 #define CFG_CHIP_REV 0xFF000000 #define CFG_CHIP_MAJOR 0x07000000 #define CFG_CHIP_FND_ID 0x38000000 #define CFG_CHIP_MINOR 0xC0000000 /* Chip IDs read from CONFIG_CHIP_ID */ /* mach64GX family */ #define GX_CHIP_ID 0xD7 /* mach64GX (ATI888GX00) */ #define CX_CHIP_ID 0x57 /* mach64CX (ATI888CX00) */ #define GX_PCI_ID 0x4758 /* mach64GX (ATI888GX00) */ #define CX_PCI_ID 0x4358 /* mach64CX (ATI888CX00) */ /* mach64CT family */ #define CT_CHIP_ID 0x4354 /* mach64CT (ATI264CT) */ #define ET_CHIP_ID 0x4554 /* mach64ET (ATI264ET) */ /* mach64CT family / mach64VT class */ #define VT_CHIP_ID 0x5654 /* mach64VT (ATI264VT) */ #define VU_CHIP_ID 0x5655 /* mach64VTB (ATI264VTB) */ #define VV_CHIP_ID 0x5656 /* mach64VT4 (ATI264VT4) */ /* mach64CT family / mach64GT (3D RAGE) class */ #define LB_CHIP_ID 0x4c42 /* RAGE LT PRO, AGP */ #define LD_CHIP_ID 0x4c44 /* RAGE LT PRO */ #define LG_CHIP_ID 0x4c47 /* RAGE LT */ #define LI_CHIP_ID 0x4c49 /* RAGE LT PRO */ #define LP_CHIP_ID 0x4c50 /* RAGE LT PRO */ #define LT_CHIP_ID 0x4c54 /* RAGE LT */ /* mach64CT family / (Rage XL) class */ #define GR_CHIP_ID 0x4752 /* RAGE XL, BGA, PCI33 */ #define GS_CHIP_ID 0x4753 /* RAGE XL, PQFP, PCI33 */ #define GM_CHIP_ID 0x474d /* RAGE XL, BGA, AGP 1x,2x */ #define GN_CHIP_ID 0x474e /* RAGE XL, PQFP,AGP 1x,2x */ #define GO_CHIP_ID 0x474f /* RAGE XL, BGA, PCI66 */ #define GL_CHIP_ID 0x474c /* RAGE XL, PQFP, PCI66 */ #define IS_XL(id) ((id)==GR_CHIP_ID || (id)==GS_CHIP_ID || \ (id)==GM_CHIP_ID || (id)==GN_CHIP_ID || \ (id)==GO_CHIP_ID || (id)==GL_CHIP_ID) #define GT_CHIP_ID 0x4754 /* RAGE (GT) */ #define GU_CHIP_ID 0x4755 /* RAGE II/II+ (GTB) */ #define GV_CHIP_ID 0x4756 /* RAGE IIC, PCI */ #define GW_CHIP_ID 0x4757 /* RAGE IIC, AGP */ #define GZ_CHIP_ID 0x475a /* RAGE IIC, AGP */ #define GB_CHIP_ID 0x4742 /* RAGE PRO, BGA, AGP 1x and 2x */ #define GD_CHIP_ID 0x4744 /* RAGE PRO, BGA, AGP 1x only */ #define GI_CHIP_ID 0x4749 /* RAGE PRO, BGA, PCI33 only */ #define GP_CHIP_ID 0x4750 /* RAGE PRO, PQFP, PCI33, full 3D */ #define GQ_CHIP_ID 0x4751 /* RAGE PRO, PQFP, PCI33, limited 3D */ #define LM_CHIP_ID 0x4c4d /* RAGE Mobility AGP, full function */ #define LN_CHIP_ID 0x4c4e /* RAGE Mobility AGP */ #define LR_CHIP_ID 0x4c52 /* RAGE Mobility PCI, full function */ #define LS_CHIP_ID 0x4c53 /* RAGE Mobility PCI */ #define IS_MOBILITY(id) ((id)==LM_CHIP_ID || (id)==LN_CHIP_ID || \ (id)==LR_CHIP_ID || (id)==LS_CHIP_ID) /* Mach64 major ASIC revisions */ #define MACH64_ASIC_NEC_VT_A3 0x08 #define MACH64_ASIC_NEC_VT_A4 0x48 #define MACH64_ASIC_SGS_VT_A4 0x40 #define MACH64_ASIC_SGS_VT_B1S1 0x01 #define MACH64_ASIC_SGS_GT_B1S1 0x01 #define MACH64_ASIC_SGS_GT_B1S2 0x41 #define MACH64_ASIC_UMC_GT_B2U1 0x1a #define MACH64_ASIC_UMC_GT_B2U2 0x5a #define MACH64_ASIC_UMC_VT_B2U3 0x9a #define MACH64_ASIC_UMC_GT_B2U3 0x9a #define MACH64_ASIC_UMC_R3B_D_P_A1 0x1b #define MACH64_ASIC_UMC_R3B_D_P_A2 0x5b #define MACH64_ASIC_UMC_R3B_D_P_A3 0x1c #define MACH64_ASIC_UMC_R3B_D_P_A4 0x5c /* Mach64 foundries */ #define MACH64_FND_SGS 0 #define MACH64_FND_NEC 1 #define MACH64_FND_UMC 3 /* Mach64 chip types */ #define MACH64_UNKNOWN 0 #define MACH64_GX 1 #define MACH64_CX 2 #define MACH64_CT 3Restore #define MACH64_ET 4 #define MACH64_VT 5 #define MACH64_GT 6 /* DST_CNTL register constants */ #define DST_X_RIGHT_TO_LEFT 0 #define DST_X_LEFT_TO_RIGHT 1 #define DST_Y_BOTTOM_TO_TOP 0 #define DST_Y_TOP_TO_BOTTOM 2 #define DST_X_MAJOR 0 #define DST_Y_MAJOR 4 #define DST_X_TILE 8 #define DST_Y_TILE 0x10 #define DST_LAST_PEL 0x20 #define DST_POLYGON_ENABLE 0x40 #define DST_24_ROTATION_ENABLE 0x80 /* SRC_CNTL register constants */ #define SRC_PATTERN_ENABLE 1 #define SRC_ROTATION_ENABLE 2 #define SRC_LINEAR_ENABLE 4 #define SRC_BYTE_ALIGN 8 #define SRC_LINE_X_RIGHT_TO_LEFT 0 #define SRC_LINE_X_LEFT_TO_RIGHT 0x10 /* HOST_CNTL register constants */ #define HOST_BYTE_ALIGN 1 /* GUI_TRAJ_CNTL register constants */ #define PAT_MONO_8x8_ENABLE 0x01000000 #define PAT_CLR_4x2_ENABLE 0x02000000 #define PAT_CLR_8x1_ENABLE 0x04000000 /* DP_CHAIN_MASK register constants */ #define DP_CHAIN_4BPP 0x8888 #define DP_CHAIN_7BPP 0xD2D2 #define DP_CHAIN_8BPP 0x8080 #define DP_CHAIN_8BPP_RGB 0x9292 #define DP_CHAIN_15BPP 0x4210 #define DP_CHAIN_16BPP 0x8410 #define DP_CHAIN_24BPP 0x8080 #define DP_CHAIN_32BPP 0x8080 /* DP_PIX_WIDTH register constants */ #define DST_1BPP 0x0 #define DST_4BPP 0x1 #define DST_8BPP 0x2 #define DST_15BPP 0x3 #define DST_16BPP 0x4 #define DST_24BPP 0x5 #define DST_32BPP 0x6 #define DST_MASK 0xF #define SRC_1BPP 0x000 #define SRC_4BPP 0x100 #define SRC_8BPP 0x200 #define SRC_15BPP 0x300 #define SRC_16BPP 0x400 #define SRC_24BPP 0x500 #define SRC_32BPP 0x600 #define SRC_MASK 0xF00 #define DP_HOST_TRIPLE_EN 0x2000 #define HOST_1BPP 0x00000 #define HOST_4BPP 0x10000 #define HOST_8BPP 0x20000 #define HOST_15BPP 0x30000 #define HOST_16BPP 0x40000 #define HOST_24BPP 0x50000 #define HOST_32BPP 0x60000 #define HOST_MASK 0xF0000 #define BYTE_ORDER_MSB_TO_LSB 0 #define BYTE_ORDER_LSB_TO_MSB 0x1000000 #define BYTE_ORDER_MASK 0x1000000 /* DP_MIX register constants */ #define BKGD_MIX_NOT_D 0 #define BKGD_MIX_ZERO 1 #define BKGD_MIX_ONE 2 #define BKGD_MIX_D 3 #define BKGD_MIX_NOT_S 4 #define BKGD_MIX_D_XOR_S 5 #define BKGD_MIX_NOT_D_XOR_S 6 #define BKGD_MIX_S 7 #define BKGD_MIX_NOT_D_OR_NOT_S 8 #define BKGD_MIX_D_OR_NOT_S 9 #define BKGD_MIX_NOT_D_OR_S 10 #define BKGD_MIX_D_OR_S 11 #define BKGD_MIX_D_AND_S 12 #define BKGD_MIX_NOT_D_AND_S 13 #define BKGD_MIX_D_AND_NOT_S 14 #define BKGD_MIX_NOT_D_AND_NOT_S 15 #define BKGD_MIX_D_PLUS_S_DIV2 0x17 #define FRGD_MIX_NOT_D 0 #define FRGD_MIX_ZERO 0x10000 #define FRGD_MIX_ONE 0x20000 #define FRGD_MIX_D 0x30000 #define FRGD_MIX_NOT_S 0x40000 #define FRGD_MIX_D_XOR_S 0x50000 #define FRGD_MIX_NOT_D_XOR_S 0x60000 #define FRGD_MIX_S 0x70000 #define FRGD_MIX_NOT_D_OR_NOT_S 0x80000 #define FRGD_MIX_D_OR_NOT_S 0x90000 #define FRGD_MIX_NOT_D_OR_S 0xa0000 #define FRGD_MIX_D_OR_S 0xb0000 #define FRGD_MIX_D_AND_S 0xc0000 #define FRGD_MIX_NOT_D_AND_S 0xd0000 #define FRGD_MIX_D_AND_NOT_S 0xe0000 #define FRGD_MIX_NOT_D_AND_NOT_S 0xf0000 #define FRGD_MIX_D_PLUS_S_DIV2 0x170000 /* DP_SRC register constants */ #define BKGD_SRC_BKGD_CLR 0 #define BKGD_SRC_FRGD_CLR 1 #define BKGD_SRC_HOST 2 #define BKGD_SRC_BLIT 3 #define BKGD_SRC_PATTERN 4 #define FRGD_SRC_BKGD_CLR 0 #define FRGD_SRC_FRGD_CLR 0x100 #define FRGD_SRC_HOST 0x200 #define FRGD_SRC_BLIT 0x300 #define FRGD_SRC_PATTERN 0x400 #define MONO_SRC_ONE 0 #define MONO_SRC_PATTERN 0x10000 #define MONO_SRC_HOST 0x20000 #define MONO_SRC_BLIT 0x30000 /* CLR_CMP_CNTL register constants */ #define COMPARE_FALSE 0 #define COMPARE_TRUE 1 #define COMPARE_NOT_EQUAL 4 #define COMPARE_EQUAL 5 #define COMPARE_DESTINATION 0 #define COMPARE_SOURCE 0x1000000 /* FIFO_STAT register constants */ #define FIFO_ERR 0x80000000 /* CONTEXT_LOAD_CNTL constants */ #define CONTEXT_NO_LOAD 0 #define CONTEXT_LOAD 0x10000 #define CONTEXT_LOAD_AND_DO_FILL 0x20000 #define CONTEXT_LOAD_AND_DO_LINE 0x30000 #define CONTEXT_EXECUTE 0 #define CONTEXT_CMD_DISABLE 0x80000000 /* GUI_STAT register constants */ #define ENGINE_IDLE 0 #define ENGINE_BUSY 1 #define SCISSOR_LEFT_FLAG 0x10 #define SCISSOR_RIGHT_FLAG 0x20 #define SCISSOR_TOP_FLAG 0x40 #define SCISSOR_BOTTOM_FLAG 0x80 /* ATI VGA Extended Regsiters */ #define sioATIEXT 0x1ce #define bioATIEXT 0x3ce #define ATI2E 0xae #define ATI32 0xb2 #define ATI36 0xb6 /* VGA Graphics Controller Registers */ #define R_GENMO 0x3cc #define VGAGRA 0x3ce #define GRA06 0x06 /* VGA Seququencer Registers */ #define VGASEQ 0x3c4 #define SEQ02 0x02 #define SEQ04 0x04 #define MACH64_MAX_X ENGINE_MAX_X #define MACH64_MAX_Y ENGINE_MAX_Y #define INC_X 0x0020 #define INC_Y 0x0080 #define RGB16_555 0x0000 #define RGB16_565 0x0040 #define RGB16_655 0x0080 #define RGB16_664 0x00c0 #define POLY_TEXT_TYPE 0x0001 #define IMAGE_TEXT_TYPE 0x0002 #define TEXT_TYPE_8_BIT 0x0004 #define TEXT_TYPE_16_BIT 0x0008 #define POLY_TEXT_TYPE_8 (POLY_TEXT_TYPE | TEXT_TYPE_8_BIT) #define IMAGE_TEXT_TYPE_8 (IMAGE_TEXT_TYPE | TEXT_TYPE_8_BIT) #define POLY_TEXT_TYPE_16 (POLY_TEXT_TYPE | TEXT_TYPE_16_BIT) #define IMAGE_TEXT_TYPE_16 (IMAGE_TEXT_TYPE | TEXT_TYPE_16_BIT) #define MACH64_NUM_CLOCKS 16 #define MACH64_NUM_FREQS 50 /* Power Management register constants (LT & LT Pro) */ #define PWR_MGT_ON 0x00000001 #define PWR_MGT_MODE_MASK 0x00000006 #define AUTO_PWR_UP 0x00000008 #define USE_F32KHZ 0x00000400 #define TRISTATE_MEM_EN 0x00000800 #define SELF_REFRESH 0x00000080 #define PWR_BLON 0x02000000 #define STANDBY_NOW 0x10000000 #define SUSPEND_NOW 0x20000000 #define PWR_MGT_STATUS_MASK 0xC0000000 #define PWR_MGT_STATUS_SUSPEND 0x80000000 /* PM Mode constants */ #define PWR_MGT_MODE_PIN 0x00000000 #define PWR_MGT_MODE_REG 0x00000002 #define PWR_MGT_MODE_TIMER 0x00000004 #define PWR_MGT_MODE_PCI 0x00000006 /* LCD registers (LT Pro) */ /* LCD Index register */ #define LCD_INDEX_MASK 0x0000003F #define LCD_DISPLAY_DIS 0x00000100 #define LCD_SRC_SEL 0x00000200 #define CRTC2_DISPLAY_DIS 0x00000400 /* LCD register indices */ #define CONFIG_PANEL 0x00 #define LCD_GEN_CNTL 0x01 #define DSTN_CONTROL 0x02 #define HFB_PITCH_ADDR 0x03 #define HORZ_STRETCHING 0x04 #define VERT_STRETCHING 0x05 #define EXT_VERT_STRETCH 0x06 #define LT_GIO 0x07 #define POWER_MANAGEMENT 0x08 #define ZVGPIO 0x09 #define ICON_CLR0 0x0A #define ICON_CLR1 0x0B #define ICON_OFFSET 0x0C #define ICON_HORZ_VERT_POSN 0x0D #define ICON_HORZ_VERT_OFF 0x0E #define ICON2_CLR0 0x0F #define ICON2_CLR1 0x10 #define ICON2_OFFSET 0x11 #define ICON2_HORZ_VERT_POSN 0x12 #define ICON2_HORZ_VERT_OFF 0x13 #define LCD_MISC_CNTL 0x14 #define APC_CNTL 0x1C #define POWER_MANAGEMENT_2 0x1D #define ALPHA_BLENDING 0x25 #define PORTRAIT_GEN_CNTL 0x26 #define APC_CTRL_IO 0x27 #define TEST_IO 0x28 #define TEST_OUTPUTS 0x29 #define DP1_MEM_ACCESS 0x2A #define DP0_MEM_ACCESS 0x2B #define DP0_DEBUG_A 0x2C #define DP0_DEBUG_B 0x2D #define DP1_DEBUG_A 0x2E #define DP1_DEBUG_B 0x2F #define DPCTRL_DEBUG_A 0x30 #define DPCTRL_DEBUG_B 0x31 #define MEMBLK_DEBUG 0x32 #define APC_LUT_AB 0x33 #define APC_LUT_CD 0x34 #define APC_LUT_EF 0x35 #define APC_LUT_GH 0x36 #define APC_LUT_IJ 0x37 #define APC_LUT_KL 0x38 #define APC_LUT_MN 0x39 #define APC_LUT_OP 0x3A /* Values in LCD_GEN_CTRL */ #define CRT_ON 0x00000001ul #define LCD_ON 0x00000002ul #define HORZ_DIVBY2_EN 0x00000004ul #define DONT_DS_ICON 0x00000008ul #define LOCK_8DOT 0x00000010ul #define ICON_ENABLE 0x00000020ul #define DONT_SHADOW_VPAR 0x00000040ul #define V2CLK_PM_EN 0x00000080ul #define RST_FM 0x00000100ul #define DISABLE_PCLK_RESET 0x00000200ul /* XC/XL */ #define DIS_HOR_CRT_DIVBY2 0x00000400ul #define SCLK_SEL 0x00000800ul #define SCLK_DELAY 0x0000f000ul #define TVCLK_PM_EN 0x00010000ul #define VCLK_DAC_PM_EN 0x00020000ul #define VCLK_LCD_OFF 0x00040000ul #define SELECT_WAIT_4MS 0x00080000ul #define XTALIN_PM_EN 0x00080000ul /* XC/XL */ #define V2CLK_DAC_PM_EN 0x00100000ul #define LVDS_EN 0x00200000ul #define LVDS_PLL_EN 0x00400000ul #define LVDS_PLL_RESET 0x00800000ul #define LVDS_RESERVED_BITS 0x07000000ul #define CRTC_RW_SELECT 0x08000000ul /* LTPro */ #define USE_SHADOWED_VEND 0x10000000ul #define USE_SHADOWED_ROWCUR 0x20000000ul #define SHADOW_EN 0x40000000ul #define SHADOW_RW_EN 0x80000000ul #define LCD_SET_PRIMARY_MASK 0x07FFFBFBul /* Values in HORZ_STRETCHING */ #define HORZ_STRETCH_BLEND 0x00000ffful #define HORZ_STRETCH_RATIO 0x0000fffful #define HORZ_STRETCH_LOOP 0x00070000ul #define HORZ_STRETCH_LOOP09 0x00000000ul #define HORZ_STRETCH_LOOP11 0x00010000ul #define HORZ_STRETCH_LOOP12 0x00020000ul #define HORZ_STRETCH_LOOP14 0x00030000ul #define HORZ_STRETCH_LOOP15 0x00040000ul /* ? 0x00050000ul */ /* ? 0x00060000ul */ /* ? 0x00070000ul */ /* ? 0x00080000ul */ #define HORZ_PANEL_SIZE 0x0ff00000ul /* XC/XL */ /* ? 0x10000000ul */ #define AUTO_HORZ_RATIO 0x20000000ul /* XC/XL */ #define HORZ_STRETCH_MODE 0x40000000ul #define HORZ_STRETCH_EN 0x80000000ul /* Values in VERT_STRETCHING */ #define VERT_STRETCH_RATIO0 0x000003fful #define VERT_STRETCH_RATIO1 0x000ffc00ul #define VERT_STRETCH_RATIO2 0x3ff00000ul #define VERT_STRETCH_USE0 0x40000000ul #define VERT_STRETCH_EN 0x80000000ul /* Values in EXT_VERT_STRETCH */ #define VERT_STRETCH_RATIO3 0x000003fful #define FORCE_DAC_DATA 0x000000fful #define FORCE_DAC_DATA_SEL 0x00000300ul #define VERT_STRETCH_MODE 0x00000400ul #define VERT_PANEL_SIZE 0x003ff800ul #define AUTO_VERT_RATIO 0x00400000ul #define USE_AUTO_FP_POS 0x00800000ul #define USE_AUTO_LCD_VSYNC 0x01000000ul /* ? 0xfe000000ul */ /* Values in LCD_MISC_CNTL */ #define BIAS_MOD_LEVEL_MASK 0x0000ff00 #define BIAS_MOD_LEVEL_SHIFT 8 #define BLMOD_EN 0x00010000 #define BIASMOD_EN 0x00020000 #endif /* REGMACH64_H */