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BranchCommit messageAuthorAge
archive/unc-master-3.0P-FP: fix BUG_ON releated to priority inheritanceBjoern Brandenburg13 years
archived-2013.1uncachedev: mmap memory that is not cached by CPUsGlenn Elliott12 years
archived-private-masterMerge branch 'wip-2.6.34' into old-private-masterAndrea Bastoni15 years
archived-semi-partMerge branch 'wip-semi-part' of ssh://cvs/cvs/proj/litmus/repo/litmus2010 int...Andrea Bastoni15 years
demoFurther refinementsJonathan Herman14 years
ecrts-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
ecrts14-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
gpusync-rtss12Final GPUSync implementation.Glenn Elliott12 years
gpusync/stagingRename IKGLP R2DGLP.Glenn Elliott12 years
linux-tipMerge branch 'slab/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/p...Linus Torvalds15 years
litmus2008-patch-seriesadd i386 feather-trace implementationBjoern B. Brandenburg16 years
masterPSN-EDF: use inferred_sporadic_job_release_atBjoern Brandenburg9 years
pgmmake it compileGlenn Elliott12 years
prop/litmus-signalsInfrastructure for Litmus signals.Glenn Elliott13 years
prop/robust-tie-breakFixed bug in edf_higher_prio().Glenn Elliott13 years
stagingFix tracepoint compilation errorFelipe Cerqueira13 years
test9/23/2016Namhoon Kim9 years
tracing-develTest kernel tracing events capabilitiesAndrea Bastoni16 years
v2.6.34-with-arm-patchessmsc911x: Add spinlocks around registers accessCatalin Marinas15 years
v2015.1Add ARM syscall def for get_current_budgetBjoern Brandenburg10 years
wip-2011.2-bbbLitmus core: simplify np-section protocolBjoern B. Brandenburg14 years
wip-2011.2-bbb-traceRefactor sched_trace_log_message() -> debug_trace_log_message()Andrea Bastoni14 years
wip-2012.3-gpuSOBLIV draining support for C-EDF.Glenn Elliott12 years
wip-2012.3-gpu-preportpick up last C-RM fileGlenn Elliott12 years
wip-2012.3-gpu-rtss13Fix critical bug in GPU tracker.Glenn Elliott12 years
wip-2012.3-gpu-sobliv-budget-w-ksharkProper sobliv draining and many bug fixes.Glenn Elliott12 years
wip-aedzl-finalMake it easier to compile AEDZL interfaces in liblitmus.Glenn Elliott15 years
wip-aedzl-revisedAdd sched_trace data for Apative EDZLGlenn Elliott15 years
wip-arbit-deadlineFix compilation bug.Glenn Elliott13 years
wip-aux-tasksDescription of refined aux task inheritance.Glenn Elliott13 years
wip-bbbGSN-EDF & Core: improve debug TRACE'ing for NP sectionsBjoern B. Brandenburg14 years
wip-bbb-prio-donuse correct timestampBjoern B. Brandenburg14 years
wip-better-breakImplement hash-based EDF tie-breaking.Glenn Elliott13 years
wip-binary-heapMake C-EDF work with simplified binheap_deleteGlenn Elliott13 years
wip-budgetAdded support for choices in budget policy enforcement.Glenn Elliott15 years
wip-colorSummarize schedulability with final recordJonathan Herman13 years
wip-color-jlhsched_color: Fixed two bugs causing crashing on experiment restart and a rare...Jonathan Herman13 years
wip-d10-hz1000Enable HZ=1000 on District 10Bjoern B. Brandenburg15 years
wip-default-clusteringFeature: Make default C-EDF clustering compile-time configurable.Glenn Elliott15 years
wip-dissipation-jericksoUpdate from 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-dissipation2-jericksoUpdate 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-ecrts14-pgmMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
wip-edf-hsblast tested versionJonathan Herman14 years
wip-edf-osLookup table EDF-osJeremy Erickson12 years
wip-edf-tie-breakMerge branch 'wip-edf-tie-break' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus...Glenn Elliott13 years
wip-edzl-critiqueUse hr_timer's active checks instead of having own flag.Glenn Elliott15 years
wip-edzl-finalImplementation of the EDZL scheduler.Glenn Elliott15 years
wip-edzl-revisedClean up comments.Glenn Elliott15 years
wip-eventsAdded support for tracing arbitrary actions.Jonathan Herman15 years
wip-extra-debugDBG: add additional tracingBjoern B. Brandenburg15 years
wip-fix-switch-jericksoAttempt to fix race condition with plugin switchingJeremy Erickson15 years
wip-fix3sched: show length of runqueue clock deactivation in /proc/sched_debugBjoern B. Brandenburg15 years
wip-fmlp-dequeueImprove FMLP queue management.Glenn Elliott14 years
wip-ft-irq-flagFeather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-gpu-cleanupEnable sched_trace log injection from userspaceGlenn Elliott13 years
wip-gpu-interruptsRemove option for threading of all softirqs.Glenn Elliott14 years
wip-gpu-rtas12Generalized GPU cost predictors + EWMA. (untested)Glenn Elliott13 years
wip-gpu-rtss12Final GPUSync implementation.Glenn Elliott13 years
wip-gpu-rtss12-srpexperimental changes to support GPUs under SRPGlenn Elliott13 years
wip-gpusync-mergeCleanup priority tracking for budget enforcement.Glenn Elliott12 years
wip-ikglpMove RSM and IKGLP imp. to own .c filesGlenn Elliott13 years
wip-k-fmlpMerge branch 'mpi-master' into wip-k-fmlpGlenn Elliott14 years
wip-kernel-coloringAdded recolor syscallNamhoon Kim7 years
wip-kernthreadsKludge work-queue processing into klitirqd.Glenn Elliott15 years
wip-klmirqd-to-auxAllow klmirqd threads to be given names.Glenn Elliott13 years
wip-ksharkMerge branch 'mpi-staging' into wip-ksharkJonathan Herman13 years
wip-litmus-3.2Merge commit 'v3.2' into litmus-stagingAndrea Bastoni13 years
wip-litmus2011.2Cleanup: Coding conformance for affinity stuff.Glenn Elliott14 years
wip-litmus3.0-2011.2Feather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-master-2.6.33-rtAvoid deadlock when switching task policy to BACKGROUND (ugly)Andrea Bastoni15 years
wip-mcRemoved ARM-specific hacks which disabled less common mixed-criticality featu...Jonathan Herman12 years
wip-mc-bipasaMC-EDF addedbipasa chattopadhyay13 years
wip-mc-jericksoSplit C/D queuesJeremy Erickson15 years
wip-mc2-cache-slackManually patched mc^2 related codeMing Yang10 years
wip-mcrit-maccosmeticMac Mollison15 years
wip-merge-3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-merge-v3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-migration-affinityNULL affinity dereference in C-EDF.Glenn Elliott14 years
wip-mmap-uncacheshare branch with othersGlenn Elliott13 years
wip-modechangeRTSS 2017 submissionNamhoon Kim8 years
wip-nested-lockingAppears to be working.Bryan Ward12 years
wip-omlp-gedfFirst implementation of G-OMLP.Glenn Elliott15 years
wip-paiSome cleanup of PAIGlenn Elliott14 years
wip-percore-lib9/21/2016Namhoon Kim9 years
wip-performanceCONFIG_DONT_PREEMPT_ON_TIE: Don't preeempt a scheduled task on priority tie.Glenn Elliott14 years
wip-pgmAdd PGM support to C-FLGlenn Elliott12 years
wip-pgm-splitFirst draft of C-FL-splitNamhoon Kim12 years
wip-pm-ovdAdd preemption-and-migration overhead tracing supportAndrea Bastoni15 years
wip-prio-inhP-EDF updated to use the generic pi framework.Glenn Elliott15 years
wip-prioq-dglBUG FIX: Support DGLs with PRIOQ_MUTEXGlenn Elliott13 years
wip-refactored-gedfGeneralizd architecture for GEDF-style scheduelrs to reduce code redundancy.Glenn Elliott15 years
wip-release-master-fixbugfix: release master CPU must signal task was pickedBjoern B. Brandenburg14 years
wip-robust-tie-breakEDF priority tie-breaks.Glenn Elliott13 years
wip-rt-ksharkMove task time accounting into the complete_job method.Jonathan Herman13 years
wip-rtas12-pgmScheduling of PGM jobs.Glenn Elliott13 years
wip-semi-partFix compile error with newer GCCJeremy Erickson12 years
wip-semi-part-edfos-jericksoUse initial CPU set by clientJeremy Erickson12 years
wip-shared-libTODO: Fix condition checks in replicate_page_move_mapping()Namhoon Kim9 years
wip-shared-lib2RTAS 2017 Submission ver.Namhoon Kim9 years
wip-shared-memInitial commit for shared libraryNamhoon Kim9 years
wip-splitting-jericksoFix release behaviorJeremy Erickson13 years
wip-splitting-omlp-jericksoBjoern's Dissertation Code with Priority DonationJeremy Erickson13 years
wip-stage-binheapAn efficient binary heap implementation.Glenn Elliott13 years
wip-sun-portDynamic memory allocation and clean exit for FeatherTraceChristopher Kenna15 years
wip-timer-tracebugfix: C-EDF, clear scheduled field of the correct CPU upon task_exitAndrea Bastoni15 years
wip-tracepointsAdd kernel-style events for sched_trace_XXX() functionsAndrea Bastoni14 years
 
TagDownloadAuthorAge
2015.1commit 8e51b37822...Bjoern Brandenburg10 years
2013.1commit bcaacec1ca...Glenn Elliott12 years
2012.3commit c158b5fbe4...Jonathan Herman13 years
2012.2commit b53c479a0f...Glenn Elliott13 years
2012.1commit 83b11ea1c6...Bjoern B. Brandenburg14 years
rtas12-mc-beta-expcommit 8e236ee20f...Christopher Kenna14 years
2011.1commit d11808b5c6...Christopher Kenna15 years
v2.6.37-rc4commit e8a7e48bb2...Linus Torvalds15 years
v2.6.37-rc3commit 3561d43fd2...Linus Torvalds15 years
v2.6.37-rc2commit e53beacd23...Linus Torvalds15 years
v2.6.37-rc1commit c8ddb2713c...Linus Torvalds15 years
v2.6.36commit f6f94e2ab1...Linus Torvalds15 years
2010.2commit 5c5456402d...Bjoern B. Brandenburg15 years
v2.6.36-rc8commit cd07202cc8...Linus Torvalds15 years
v2.6.36-rc7commit cb655d0f3d...Linus Torvalds15 years
v2.6.36-rc6commit 899611ee7d...Linus Torvalds15 years
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2010.1commit 7c1ff4c544...Andrea Bastoni15 years
v2.6.34commit e40152ee1e...Linus Torvalds15 years
v2.6.33.4commit 4640b4e7d9...Greg Kroah-Hartman15 years
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v2.6.15-rc3commit 624f54be20...Linus Torvalds20 years
v2.6.15-rc2commit 3bedff1d73...Linus Torvalds20 years
v2.6.15-rc1commit cd52d1ee9a...Linus Torvalds20 years
v2.6.14commit 741b2252a5...Linus Torvalds20 years
v2.6.14-rc5commit 93918e9afc...Linus Torvalds20 years
v2.6.14-rc4commit 907a426179...Linus Torvalds20 years
v2.6.14-rc3commit 1c9426e8a5...Linus Torvalds20 years
v2.6.14-rc2commit 676d55ae30...Linus Torvalds20 years
v2.6.14-rc1commit 2f4ba45a75...Linus Torvalds20 years
v2.6.13commit 02b3e4e2d7...Linus Torvalds20 years
v2.6.13-rc7commit 0572e3da3f...Linus Torvalds20 years
v2.6.13-rc6commit 6fc32179de...Linus Torvalds20 years
v2.6.13-rc5commit 9a351e30d7...Linus Torvalds20 years
v2.6.13-rc4commit 6395352334...Linus Torvalds20 years
v2.6.11tree c39ae07f39...
v2.6.11-treetree c39ae07f39...
v2.6.12commit 9ee1c939d1...
v2.6.12-rc2commit 1da177e4c3...
v2.6.12-rc3commit a2755a80f4...
v2.6.12-rc4commit 88d7bd8cb9...
v2.6.12-rc5commit 2a24ab628a...
v2.6.12-rc6commit 7cef5677ef...
v2.6.13-rc1commit 4c91aedb75...
v2.6.13-rc2commit a18bcb7450...
v2.6.13-rc3commit c32511e271...
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-14 08:45:28 -0400
cket->data_size); return -EOVERFLOW; } switch (packet->type) { case hpsb_async: case hpsb_raw: d = &lynx->async; break; #if 0 /* has been removed from ieee1394 core */ case hpsb_iso: d = &lynx->iso_send; break; #endif default: PRINT(KERN_ERR, lynx->id, "invalid packet type %d", packet->type); return -EINVAL; } if (packet->tcode == TCODE_WRITEQ || packet->tcode == TCODE_READQ_RESPONSE) { cpu_to_be32s(&packet->header[3]); } spin_lock_irqsave(&d->queue_lock, flags); list_add_tail(&packet->driver_list, &d->queue); if (list_empty(&d->pcl_queue)) send_next(lynx, packet->type); spin_unlock_irqrestore(&d->queue_lock, flags); return 0; } /* called from subsystem core */ static int lynx_devctl(struct hpsb_host *host, enum devctl_cmd cmd, int arg) { struct ti_lynx *lynx = host->hostdata; int retval = 0; struct hpsb_packet *packet; LIST_HEAD(packet_list); unsigned long flags; int phy_reg; switch (cmd) { case RESET_BUS: if (reg_read(lynx, LINK_INT_STATUS) & LINK_INT_PHY_BUSRESET) { retval = 0; break; } switch (arg) { case SHORT_RESET: if (lynx->phyic.reg_1394a) { phy_reg = get_phy_reg(lynx, 5); if (phy_reg == -1) { PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed"); retval = -1; break; } phy_reg |= 0x40; PRINT(KERN_INFO, lynx->id, "resetting bus (short bus reset) on request"); lynx->selfid_size = -1; lynx->phy_reg0 = -1; set_phy_reg(lynx, 5, phy_reg); /* set ISBR */ break; } else { PRINT(KERN_INFO, lynx->id, "cannot do short bus reset, because of old phy"); /* fall through to long bus reset */ } case LONG_RESET: phy_reg = get_phy_reg(lynx, 1); if (phy_reg == -1) { PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed"); retval = -1; break; } phy_reg |= 0x40; PRINT(KERN_INFO, lynx->id, "resetting bus (long bus reset) on request"); lynx->selfid_size = -1; lynx->phy_reg0 = -1; set_phy_reg(lynx, 1, phy_reg); /* clear RHB, set IBR */ break; case SHORT_RESET_NO_FORCE_ROOT: if (lynx->phyic.reg_1394a) { phy_reg = get_phy_reg(lynx, 1); if (phy_reg == -1) { PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed"); retval = -1; break; } if (phy_reg & 0x80) { phy_reg &= ~0x80; set_phy_reg(lynx, 1, phy_reg); /* clear RHB */ } phy_reg = get_phy_reg(lynx, 5); if (phy_reg == -1) { PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed"); retval = -1; break; } phy_reg |= 0x40; PRINT(KERN_INFO, lynx->id, "resetting bus (short bus reset, no force_root) on request"); lynx->selfid_size = -1; lynx->phy_reg0 = -1; set_phy_reg(lynx, 5, phy_reg); /* set ISBR */ break; } else { PRINT(KERN_INFO, lynx->id, "cannot do short bus reset, because of old phy"); /* fall through to long bus reset */ } case LONG_RESET_NO_FORCE_ROOT: phy_reg = get_phy_reg(lynx, 1); if (phy_reg == -1) { PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed"); retval = -1; break; } phy_reg &= ~0x80; phy_reg |= 0x40; PRINT(KERN_INFO, lynx->id, "resetting bus (long bus reset, no force_root) on request"); lynx->selfid_size = -1; lynx->phy_reg0 = -1; set_phy_reg(lynx, 1, phy_reg); /* clear RHB, set IBR */ break; case SHORT_RESET_FORCE_ROOT: if (lynx->phyic.reg_1394a) { phy_reg = get_phy_reg(lynx, 1); if (phy_reg == -1) { PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed"); retval = -1; break; } if (!(phy_reg & 0x80)) { phy_reg |= 0x80; set_phy_reg(lynx, 1, phy_reg); /* set RHB */ } phy_reg = get_phy_reg(lynx, 5); if (phy_reg == -1) { PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed"); retval = -1; break; } phy_reg |= 0x40; PRINT(KERN_INFO, lynx->id, "resetting bus (short bus reset, force_root set) on request"); lynx->selfid_size = -1; lynx->phy_reg0 = -1; set_phy_reg(lynx, 5, phy_reg); /* set ISBR */ break; } else { PRINT(KERN_INFO, lynx->id, "cannot do short bus reset, because of old phy"); /* fall through to long bus reset */ } case LONG_RESET_FORCE_ROOT: phy_reg = get_phy_reg(lynx, 1); if (phy_reg == -1) { PRINT(KERN_ERR, lynx->id, "cannot reset bus, because read phy reg failed"); retval = -1; break; } phy_reg |= 0xc0; PRINT(KERN_INFO, lynx->id, "resetting bus (long bus reset, force_root set) on request"); lynx->selfid_size = -1; lynx->phy_reg0 = -1; set_phy_reg(lynx, 1, phy_reg); /* set IBR and RHB */ break; default: PRINT(KERN_ERR, lynx->id, "unknown argument for reset_bus command %d", arg); retval = -1; } break; case GET_CYCLE_COUNTER: retval = reg_read(lynx, CYCLE_TIMER); break; case SET_CYCLE_COUNTER: reg_write(lynx, CYCLE_TIMER, arg); break; case SET_BUS_ID: reg_write(lynx, LINK_ID, (arg << 22) | (reg_read(lynx, LINK_ID) & 0x003f0000)); break; case ACT_CYCLE_MASTER: if (arg) { reg_set_bits(lynx, LINK_CONTROL, LINK_CONTROL_CYCMASTER); } else { reg_clear_bits(lynx, LINK_CONTROL, LINK_CONTROL_CYCMASTER); } break; case CANCEL_REQUESTS: spin_lock_irqsave(&lynx->async.queue_lock, flags); reg_write(lynx, DMA_CHAN_CTRL(CHANNEL_ASYNC_SEND), 0); list_splice_init(&lynx->async.queue, &packet_list); if (list_empty(&lynx->async.pcl_queue)) { spin_unlock_irqrestore(&lynx->async.queue_lock, flags); PRINTD(KERN_DEBUG, lynx->id, "no async packet in PCL to cancel"); } else { struct ti_pcl pcl; u32 ack; PRINT(KERN_INFO, lynx->id, "cancelling async packet, that was already in PCL"); get_pcl(lynx, lynx->async.pcl, &pcl); packet = driver_packet(lynx->async.pcl_queue.next); list_del_init(&packet->driver_list); pci_unmap_single(lynx->dev, lynx->async.header_dma, packet->header_size, PCI_DMA_TODEVICE); if (packet->data_size) { pci_unmap_single(lynx->dev, lynx->async.data_dma, packet->data_size, PCI_DMA_TODEVICE); } spin_unlock_irqrestore(&lynx->async.queue_lock, flags); if (pcl.pcl_status & DMA_CHAN_STAT_PKTCMPL) { if (pcl.pcl_status & DMA_CHAN_STAT_SPECIALACK) { ack = (pcl.pcl_status >> 15) & 0xf; PRINTD(KERN_INFO, lynx->id, "special ack %d", ack); ack = (ack == 1 ? ACKX_TIMEOUT : ACKX_SEND_ERROR); } else { ack = (pcl.pcl_status >> 15) & 0xf; } } else { PRINT(KERN_INFO, lynx->id, "async packet was not completed"); ack = ACKX_ABORTED; } hpsb_packet_sent(host, packet, ack); } while (!list_empty(&packet_list)) { packet = driver_packet(packet_list.next); list_del_init(&packet->driver_list); hpsb_packet_sent(host, packet, ACKX_ABORTED); } break; #if 0 /* has been removed from ieee1394 core */ case ISO_LISTEN_CHANNEL: spin_lock_irqsave(&lynx->iso_rcv.lock, flags); if (lynx->iso_rcv.chan_count++ == 0) { reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV), DMA_WORD1_CMP_ENABLE_MASTER); } spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags); break; case ISO_UNLISTEN_CHANNEL: spin_lock_irqsave(&lynx->iso_rcv.lock, flags); if (--lynx->iso_rcv.chan_count == 0) { reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV), 0); } spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags); break; #endif default: PRINT(KERN_ERR, lynx->id, "unknown devctl command %d", cmd); retval = -1; } return retval; } /*************************************** * IEEE-1394 functionality section END * ***************************************/ /******************************************************** * Global stuff (interrupt handler, init/shutdown code) * ********************************************************/ static irqreturn_t lynx_irq_handler(int irq, void *dev_id) { struct ti_lynx *lynx = (struct ti_lynx *)dev_id; struct hpsb_host *host = lynx->host; u32 intmask; u32 linkint; linkint = reg_read(lynx, LINK_INT_STATUS); intmask = reg_read(lynx, PCI_INT_STATUS); if (!(intmask & PCI_INT_INT_PEND)) return IRQ_NONE; PRINTD(KERN_DEBUG, lynx->id, "interrupt: 0x%08x / 0x%08x", intmask, linkint); reg_write(lynx, LINK_INT_STATUS, linkint); reg_write(lynx, PCI_INT_STATUS, intmask); if (intmask & PCI_INT_1394) { if (linkint & LINK_INT_PHY_TIMEOUT) { PRINT(KERN_INFO, lynx->id, "PHY timeout occurred"); } if (linkint & LINK_INT_PHY_BUSRESET) { PRINT(KERN_INFO, lynx->id, "bus reset interrupt"); lynx->selfid_size = -1; lynx->phy_reg0 = -1; if (!host->in_bus_reset) hpsb_bus_reset(host); } if (linkint & LINK_INT_PHY_REG_RCVD) { u32 reg; spin_lock(&lynx->phy_reg_lock); reg = reg_read(lynx, LINK_PHY); spin_unlock(&lynx->phy_reg_lock); if (!host->in_bus_reset) { PRINT(KERN_INFO, lynx->id, "phy reg received without reset"); } else if (reg & 0xf00) { PRINT(KERN_INFO, lynx->id, "unsolicited phy reg %d received", (reg >> 8) & 0xf); } else { lynx->phy_reg0 = reg & 0xff; handle_selfid(lynx, host); } } if (linkint & LINK_INT_ISO_STUCK) { PRINT(KERN_INFO, lynx->id, "isochronous transmitter stuck"); } if (linkint & LINK_INT_ASYNC_STUCK) { PRINT(KERN_INFO, lynx->id, "asynchronous transmitter stuck"); } if (linkint & LINK_INT_SENT_REJECT) { PRINT(KERN_INFO, lynx->id, "sent reject"); } if (linkint & LINK_INT_TX_INVALID_TC) { PRINT(KERN_INFO, lynx->id, "invalid transaction code"); } if (linkint & LINK_INT_GRF_OVERFLOW) { /* flush FIFO if overflow happens during reset */ if (host->in_bus_reset) reg_write(lynx, FIFO_CONTROL, FIFO_CONTROL_GRF_FLUSH); PRINT(KERN_INFO, lynx->id, "GRF overflow"); } if (linkint & LINK_INT_ITF_UNDERFLOW) { PRINT(KERN_INFO, lynx->id, "ITF underflow"); } if (linkint & LINK_INT_ATF_UNDERFLOW) { PRINT(KERN_INFO, lynx->id, "ATF underflow"); } } if (intmask & PCI_INT_DMA_HLT(CHANNEL_ISO_RCV)) { PRINTD(KERN_DEBUG, lynx->id, "iso receive"); spin_lock(&lynx->iso_rcv.lock); lynx->iso_rcv.stat[lynx->iso_rcv.next] = reg_read(lynx, DMA_CHAN_STAT(CHANNEL_ISO_RCV)); lynx->iso_rcv.used++; lynx->iso_rcv.next = (lynx->iso_rcv.next + 1) % NUM_ISORCV_PCL; if ((lynx->iso_rcv.next == lynx->iso_rcv.last) || !lynx->iso_rcv.chan_count) { PRINTD(KERN_DEBUG, lynx->id, "stopped"); reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV), 0); } run_sub_pcl(lynx, lynx->iso_rcv.pcl_start, lynx->iso_rcv.next, CHANNEL_ISO_RCV); spin_unlock(&lynx->iso_rcv.lock); tasklet_schedule(&lynx->iso_rcv.tq); } if (intmask & PCI_INT_DMA_HLT(CHANNEL_ASYNC_SEND)) { PRINTD(KERN_DEBUG, lynx->id, "async sent"); spin_lock(&lynx->async.queue_lock); if (list_empty(&lynx->async.pcl_queue)) { spin_unlock(&lynx->async.queue_lock); PRINT(KERN_WARNING, lynx->id, "async dma halted, but no queued packet (maybe it was cancelled)"); } else { struct ti_pcl pcl; u32 ack; struct hpsb_packet *packet; get_pcl(lynx, lynx->async.pcl, &pcl); packet = driver_packet(lynx->async.pcl_queue.next); list_del_init(&packet->driver_list); pci_unmap_single(lynx->dev, lynx->async.header_dma, packet->header_size, PCI_DMA_TODEVICE); if (packet->data_size) { pci_unmap_single(lynx->dev, lynx->async.data_dma, packet->data_size, PCI_DMA_TODEVICE); } if (!list_empty(&lynx->async.queue)) { send_next(lynx, hpsb_async); } spin_unlock(&lynx->async.queue_lock); if (pcl.pcl_status & DMA_CHAN_STAT_PKTCMPL) { if (pcl.pcl_status & DMA_CHAN_STAT_SPECIALACK) { ack = (pcl.pcl_status >> 15) & 0xf; PRINTD(KERN_INFO, lynx->id, "special ack %d", ack); ack = (ack == 1 ? ACKX_TIMEOUT : ACKX_SEND_ERROR); } else { ack = (pcl.pcl_status >> 15) & 0xf; } } else { PRINT(KERN_INFO, lynx->id, "async packet was not completed"); ack = ACKX_SEND_ERROR; } hpsb_packet_sent(host, packet, ack); } } if (intmask & PCI_INT_DMA_HLT(CHANNEL_ISO_SEND)) { PRINTD(KERN_DEBUG, lynx->id, "iso sent"); spin_lock(&lynx->iso_send.queue_lock); if (list_empty(&lynx->iso_send.pcl_queue)) { spin_unlock(&lynx->iso_send.queue_lock); PRINT(KERN_ERR, lynx->id, "iso send dma halted, but no queued packet"); } else { struct ti_pcl pcl; u32 ack; struct hpsb_packet *packet; get_pcl(lynx, lynx->iso_send.pcl, &pcl); packet = driver_packet(lynx->iso_send.pcl_queue.next); list_del_init(&packet->driver_list); pci_unmap_single(lynx->dev, lynx->iso_send.header_dma, packet->header_size, PCI_DMA_TODEVICE); if (packet->data_size) { pci_unmap_single(lynx->dev, lynx->iso_send.data_dma, packet->data_size, PCI_DMA_TODEVICE); } #if 0 /* has been removed from ieee1394 core */ if (!list_empty(&lynx->iso_send.queue)) { send_next(lynx, hpsb_iso); } #endif spin_unlock(&lynx->iso_send.queue_lock); if (pcl.pcl_status & DMA_CHAN_STAT_PKTCMPL) { if (pcl.pcl_status & DMA_CHAN_STAT_SPECIALACK) { ack = (pcl.pcl_status >> 15) & 0xf; PRINTD(KERN_INFO, lynx->id, "special ack %d", ack); ack = (ack == 1 ? ACKX_TIMEOUT : ACKX_SEND_ERROR); } else { ack = (pcl.pcl_status >> 15) & 0xf; } } else { PRINT(KERN_INFO, lynx->id, "iso send packet was not completed"); ack = ACKX_SEND_ERROR; } hpsb_packet_sent(host, packet, ack); //FIXME: maybe we should just use ACK_COMPLETE and ACKX_SEND_ERROR } } if (intmask & PCI_INT_DMA_HLT(CHANNEL_ASYNC_RCV)) { /* general receive DMA completed */ int stat = reg_read(lynx, DMA_CHAN_STAT(CHANNEL_ASYNC_RCV)); PRINTD(KERN_DEBUG, lynx->id, "received packet size %d", stat & 0x1fff); if (stat & DMA_CHAN_STAT_SELFID) { lynx->selfid_size = stat & 0x1fff; handle_selfid(lynx, host); } else { quadlet_t *q_data = lynx->rcv_page; if ((*q_data >> 4 & 0xf) == TCODE_READQ_RESPONSE || (*q_data >> 4 & 0xf) == TCODE_WRITEQ) { cpu_to_be32s(q_data + 3); } hpsb_packet_received(host, q_data, stat & 0x1fff, 0); } run_pcl(lynx, lynx->rcv_pcl_start, CHANNEL_ASYNC_RCV); } return IRQ_HANDLED; } static void iso_rcv_bh(struct ti_lynx *lynx) { unsigned int idx; quadlet_t *data; unsigned long flags; spin_lock_irqsave(&lynx->iso_rcv.lock, flags); while (lynx->iso_rcv.used) { idx = lynx->iso_rcv.last; spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags); data = lynx->iso_rcv.page[idx / ISORCV_PER_PAGE] + (idx % ISORCV_PER_PAGE) * MAX_ISORCV_SIZE; if ((*data >> 16) + 4 != (lynx->iso_rcv.stat[idx] & 0x1fff)) { PRINT(KERN_ERR, lynx->id, "iso length mismatch 0x%08x/0x%08x", *data, lynx->iso_rcv.stat[idx]); } if (lynx->iso_rcv.stat[idx] & (DMA_CHAN_STAT_PCIERR | DMA_CHAN_STAT_PKTERR)) { PRINT(KERN_INFO, lynx->id, "iso receive error on %d to 0x%p", idx, data); } else { hpsb_packet_received(lynx->host, data, lynx->iso_rcv.stat[idx] & 0x1fff, 0); } spin_lock_irqsave(&lynx->iso_rcv.lock, flags); lynx->iso_rcv.last = (idx + 1) % NUM_ISORCV_PCL; lynx->iso_rcv.used--; } if (lynx->iso_rcv.chan_count) { reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV), DMA_WORD1_CMP_ENABLE_MASTER); } spin_unlock_irqrestore(&lynx->iso_rcv.lock, flags); } static void remove_card(struct pci_dev *dev) { struct ti_lynx *lynx; struct device *lynx_dev; int i; lynx = pci_get_drvdata(dev); if (!lynx) return; pci_set_drvdata(dev, NULL); lynx_dev = get_device(&lynx->host->device); switch (lynx->state) { case is_host: reg_write(lynx, PCI_INT_ENABLE, 0); hpsb_remove_host(lynx->host); case have_intr: reg_write(lynx, PCI_INT_ENABLE, 0); free_irq(lynx->dev->irq, lynx); /* Disable IRM Contender and LCtrl */ if (lynx->phyic.reg_1394a) set_phy_reg(lynx, 4, ~0xc0 & get_phy_reg(lynx, 4)); /* Let all other nodes know to ignore us */ lynx_devctl(lynx->host, RESET_BUS, LONG_RESET_NO_FORCE_ROOT); case have_iomappings: reg_set_bits(lynx, MISC_CONTROL, MISC_CONTROL_SWRESET); /* Fix buggy cards with autoboot pin not tied low: */ reg_write(lynx, DMA0_CHAN_CTRL, 0); iounmap(lynx->registers); iounmap(lynx->local_rom); iounmap(lynx->local_ram); iounmap(lynx->aux_port); case have_1394_buffers: for (i = 0; i < ISORCV_PAGES; i++) { if (lynx->iso_rcv.page[i]) { pci_free_consistent(lynx->dev, PAGE_SIZE, lynx->iso_rcv.page[i], lynx->iso_rcv.page_dma[i]); } } pci_free_consistent(lynx->dev, PAGE_SIZE, lynx->rcv_page, lynx->rcv_page_dma); case have_aux_buf: case have_pcl_mem: pci_free_consistent(lynx->dev, LOCALRAM_SIZE, lynx->pcl_mem, lynx->pcl_mem_dma); case clear: /* do nothing - already freed */ ; } tasklet_kill(&lynx->iso_rcv.tq); if (lynx_dev) put_device(lynx_dev); } static int __devinit add_card(struct pci_dev *dev, const struct pci_device_id *devid_is_unused) { #define FAIL(fmt, args...) do { \ PRINT_G(KERN_ERR, fmt , ## args); \ remove_card(dev); \ return error; \ } while (0) char irq_buf[16]; struct hpsb_host *host; struct ti_lynx *lynx; /* shortcut to currently handled device */ struct ti_pcl pcl; u32 *pcli; int i; int error; error = -ENXIO; if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) FAIL("DMA address limits not supported for PCILynx hardware"); if (pci_enable_device(dev)) FAIL("failed to enable PCILynx hardware"); pci_set_master(dev); error = -ENOMEM; host = hpsb_alloc_host(&lynx_driver, sizeof(struct ti_lynx), &dev->dev); if (!host) FAIL("failed to allocate control structure memory"); lynx = host->hostdata; lynx->id = card_id++; lynx->dev = dev; lynx->state = clear; lynx->host = host; host->pdev = dev; pci_set_drvdata(dev, lynx); spin_lock_init(&lynx->lock); spin_lock_init(&lynx->phy_reg_lock); lynx->pcl_mem = pci_alloc_consistent(dev, LOCALRAM_SIZE, &lynx->pcl_mem_dma); if (lynx->pcl_mem != NULL) { lynx->state = have_pcl_mem; PRINT(KERN_INFO, lynx->id, "allocated PCL memory %d Bytes @ 0x%p", LOCALRAM_SIZE, lynx->pcl_mem); } else { FAIL("failed to allocate PCL memory area"); } lynx->rcv_page = pci_alloc_consistent(dev, PAGE_SIZE, &lynx->rcv_page_dma); if (lynx->rcv_page == NULL) { FAIL("failed to allocate receive buffer"); } lynx->state = have_1394_buffers; for (i = 0; i < ISORCV_PAGES; i++) { lynx->iso_rcv.page[i] = pci_alloc_consistent(dev, PAGE_SIZE, &lynx->iso_rcv.page_dma[i]); if (lynx->iso_rcv.page[i] == NULL) { FAIL("failed to allocate iso receive buffers"); } } lynx->registers = ioremap_nocache(pci_resource_start(dev,0), PCILYNX_MAX_REGISTER); lynx->local_ram = ioremap(pci_resource_start(dev,1), PCILYNX_MAX_MEMORY); lynx->aux_port = ioremap(pci_resource_start(dev,2), PCILYNX_MAX_MEMORY); lynx->local_rom = ioremap(pci_resource_start(dev,PCI_ROM_RESOURCE), PCILYNX_MAX_MEMORY); lynx->state = have_iomappings; if (lynx->registers == NULL) { FAIL("failed to remap registers - card not accessible"); } reg_set_bits(lynx, MISC_CONTROL, MISC_CONTROL_SWRESET); /* Fix buggy cards with autoboot pin not tied low: */ reg_write(lynx, DMA0_CHAN_CTRL, 0); sprintf (irq_buf, "%d", dev->irq); if (!request_irq(dev->irq, lynx_irq_handler, IRQF_SHARED, PCILYNX_DRIVER_NAME, lynx)) { PRINT(KERN_INFO, lynx->id, "allocated interrupt %s", irq_buf); lynx->state = have_intr; } else { FAIL("failed to allocate shared interrupt %s", irq_buf); } /* alloc_pcl return values are not checked, it is expected that the * provided PCL space is sufficient for the initial allocations */ lynx->rcv_pcl = alloc_pcl(lynx); lynx->rcv_pcl_start = alloc_pcl(lynx); lynx->async.pcl = alloc_pcl(lynx); lynx->async.pcl_start = alloc_pcl(lynx); lynx->iso_send.pcl = alloc_pcl(lynx); lynx->iso_send.pcl_start = alloc_pcl(lynx); for (i = 0; i < NUM_ISORCV_PCL; i++) { lynx->iso_rcv.pcl[i] = alloc_pcl(lynx); } lynx->iso_rcv.pcl_start = alloc_pcl(lynx); /* all allocations successful - simple init stuff follows */ reg_write(lynx, PCI_INT_ENABLE, PCI_INT_DMA_ALL); tasklet_init(&lynx->iso_rcv.tq, (void (*)(unsigned long))iso_rcv_bh, (unsigned long)lynx); spin_lock_init(&lynx->iso_rcv.lock); spin_lock_init(&lynx->async.queue_lock); lynx->async.channel = CHANNEL_ASYNC_SEND; spin_lock_init(&lynx->iso_send.queue_lock); lynx->iso_send.channel = CHANNEL_ISO_SEND; PRINT(KERN_INFO, lynx->id, "remapped memory spaces reg 0x%p, rom 0x%p, " "ram 0x%p, aux 0x%p", lynx->registers, lynx->local_rom, lynx->local_ram, lynx->aux_port); /* now, looking for PHY register set */ if ((get_phy_reg(lynx, 2) & 0xe0) == 0xe0) { lynx->phyic.reg_1394a = 1; PRINT(KERN_INFO, lynx->id, "found 1394a conform PHY (using extended register set)"); lynx->phyic.vendor = get_phy_vendorid(lynx); lynx->phyic.product = get_phy_productid(lynx); } else { lynx->phyic.reg_1394a = 0; PRINT(KERN_INFO, lynx->id, "found old 1394 PHY"); } lynx->selfid_size = -1; lynx->phy_reg0 = -1; INIT_LIST_HEAD(&lynx->async.queue); INIT_LIST_HEAD(&lynx->async.pcl_queue); INIT_LIST_HEAD(&lynx->iso_send.queue); INIT_LIST_HEAD(&lynx->iso_send.pcl_queue); pcl.next = pcl_bus(lynx, lynx->rcv_pcl); put_pcl(lynx, lynx->rcv_pcl_start, &pcl); pcl.next = PCL_NEXT_INVALID; pcl.async_error_next = PCL_NEXT_INVALID; pcl.buffer[0].control = PCL_CMD_RCV | 16; #ifndef __BIG_ENDIAN pcl.buffer[0].control |= PCL_BIGENDIAN; #endif pcl.buffer[1].control = PCL_LAST_BUFF | 4080; pcl.buffer[0].pointer = lynx->rcv_page_dma; pcl.buffer[1].pointer = lynx->rcv_page_dma + 16; put_pcl(lynx, lynx->rcv_pcl, &pcl); pcl.next = pcl_bus(lynx, lynx->async.pcl); pcl.async_error_next = pcl_bus(lynx, lynx->async.pcl); put_pcl(lynx, lynx->async.pcl_start, &pcl); pcl.next = pcl_bus(lynx, lynx->iso_send.pcl); pcl.async_error_next = PCL_NEXT_INVALID; put_pcl(lynx, lynx->iso_send.pcl_start, &pcl); pcl.next = PCL_NEXT_INVALID; pcl.async_error_next = PCL_NEXT_INVALID; pcl.buffer[0].control = PCL_CMD_RCV | 4; #ifndef __BIG_ENDIAN pcl.buffer[0].control |= PCL_BIGENDIAN; #endif pcl.buffer[1].control = PCL_LAST_BUFF | 2044; for (i = 0; i < NUM_ISORCV_PCL; i++) { int page = i / ISORCV_PER_PAGE; int sec = i % ISORCV_PER_PAGE; pcl.buffer[0].pointer = lynx->iso_rcv.page_dma[page] + sec * MAX_ISORCV_SIZE; pcl.buffer[1].pointer = pcl.buffer[0].pointer + 4; put_pcl(lynx, lynx->iso_rcv.pcl[i], &pcl); } pcli = (u32 *)&pcl; for (i = 0; i < NUM_ISORCV_PCL; i++) { pcli[i] = pcl_bus(lynx, lynx->iso_rcv.pcl[i]); } put_pcl(lynx, lynx->iso_rcv.pcl_start, &pcl); /* FIFO sizes from left to right: ITF=48 ATF=48 GRF=160 */ reg_write(lynx, FIFO_SIZES, 0x003030a0); /* 20 byte threshold before triggering PCI transfer */ reg_write(lynx, DMA_GLOBAL_REGISTER, 0x2<<24); /* threshold on both send FIFOs before transmitting: FIFO size - cache line size - 1 */ i = reg_read(lynx, PCI_LATENCY_CACHELINE) & 0xff; i = 0x30 - i - 1; reg_write(lynx, FIFO_XMIT_THRESHOLD, (i << 8) | i); reg_set_bits(lynx, PCI_INT_ENABLE, PCI_INT_1394); reg_write(lynx, LINK_INT_ENABLE, LINK_INT_PHY_TIMEOUT | LINK_INT_PHY_REG_RCVD | LINK_INT_PHY_BUSRESET | LINK_INT_ISO_STUCK | LINK_INT_ASYNC_STUCK | LINK_INT_SENT_REJECT | LINK_INT_TX_INVALID_TC | LINK_INT_GRF_OVERFLOW | LINK_INT_ITF_UNDERFLOW | LINK_INT_ATF_UNDERFLOW); reg_write(lynx, DMA_WORD0_CMP_VALUE(CHANNEL_ASYNC_RCV), 0); reg_write(lynx, DMA_WORD0_CMP_ENABLE(CHANNEL_ASYNC_RCV), 0xa<<4); reg_write(lynx, DMA_WORD1_CMP_VALUE(CHANNEL_ASYNC_RCV), 0); reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ASYNC_RCV), DMA_WORD1_CMP_MATCH_LOCAL_NODE | DMA_WORD1_CMP_MATCH_BROADCAST | DMA_WORD1_CMP_MATCH_EXACT | DMA_WORD1_CMP_MATCH_BUS_BCAST | DMA_WORD1_CMP_ENABLE_SELF_ID | DMA_WORD1_CMP_ENABLE_MASTER); run_pcl(lynx, lynx->rcv_pcl_start, CHANNEL_ASYNC_RCV); reg_write(lynx, DMA_WORD0_CMP_VALUE(CHANNEL_ISO_RCV), 0); reg_write(lynx, DMA_WORD0_CMP_ENABLE(CHANNEL_ISO_RCV), 0x9<<4); reg_write(lynx, DMA_WORD1_CMP_VALUE(CHANNEL_ISO_RCV), 0); reg_write(lynx, DMA_WORD1_CMP_ENABLE(CHANNEL_ISO_RCV), 0); run_sub_pcl(lynx, lynx->iso_rcv.pcl_start, 0, CHANNEL_ISO_RCV); reg_write(lynx, LINK_CONTROL, LINK_CONTROL_RCV_CMP_VALID | LINK_CONTROL_TX_ISO_EN | LINK_CONTROL_RX_ISO_EN | LINK_CONTROL_TX_ASYNC_EN | LINK_CONTROL_RX_ASYNC_EN | LINK_CONTROL_RESET_TX | LINK_CONTROL_RESET_RX); if (!lynx->phyic.reg_1394a) { if (!hpsb_disable_irm) { /* attempt to enable contender bit -FIXME- would this * work elsewhere? */ reg_set_bits(lynx, GPIO_CTRL_A, 0x1); reg_write(lynx, GPIO_DATA_BASE + 0x3c, 0x1); } } else { /* set the contender (if appropriate) and LCtrl bit in the * extended PHY register set. (Should check that PHY_02_EXTENDED * is set in register 2?) */ i = get_phy_reg(lynx, 4); i |= PHY_04_LCTRL; if (hpsb_disable_irm) i &= ~PHY_04_CONTENDER; else i |= PHY_04_CONTENDER; if (i != -1) set_phy_reg(lynx, 4, i); } if (!skip_eeprom) { /* needed for i2c communication with serial eeprom */ struct i2c_adapter *i2c_ad; struct i2c_algo_bit_data i2c_adapter_data; error = -ENOMEM; i2c_ad = kzalloc(sizeof(*i2c_ad), GFP_KERNEL); if (!i2c_ad) FAIL("failed to allocate I2C adapter memory"); i2c_ad->id = I2C_HW_B_PCILYNX; strlcpy(i2c_ad->name, "PCILynx I2C", sizeof(i2c_ad->name)); i2c_adapter_data = bit_data; i2c_ad->algo_data = &i2c_adapter_data; i2c_adapter_data.data = lynx; i2c_ad->dev.parent = &dev->dev; PRINTD(KERN_DEBUG, lynx->id,"original eeprom control: %d", reg_read(lynx, SERIAL_EEPROM_CONTROL)); /* reset hardware to sane state */ lynx->i2c_driven_state = 0x00000070; reg_write(lynx, SERIAL_EEPROM_CONTROL, lynx->i2c_driven_state); if (i2c_bit_add_bus(i2c_ad) < 0) { kfree(i2c_ad); error = -ENXIO; FAIL("unable to register i2c"); } else { /* do i2c stuff */ unsigned char i2c_cmd = 0x10; struct i2c_msg msg[2] = { { 0x50, 0, 1, &i2c_cmd }, { 0x50, I2C_M_RD, 20, (unsigned char*) lynx->bus_info_block } }; /* we use i2c_transfer because we have no i2c_client at hand */ if (i2c_transfer(i2c_ad, msg, 2) < 0) { PRINT(KERN_ERR, lynx->id, "unable to read bus info block from i2c"); } else { PRINT(KERN_INFO, lynx->id, "got bus info block from serial eeprom"); /* FIXME: probably we shoud rewrite the max_rec, max_ROM(1394a), * generation(1394a) and link_spd(1394a) field and recalculate * the CRC */ for (i = 0; i < 5 ; i++) PRINTD(KERN_DEBUG, lynx->id, "Businfo block quadlet %i: %08x", i, be32_to_cpu(lynx->bus_info_block[i])); /* info_length, crc_length and 1394 magic number to check, if it is really a bus info block */ if (((be32_to_cpu(lynx->bus_info_block[0]) & 0xffff0000) == 0x04040000) && (lynx->bus_info_block[1] == __constant_cpu_to_be32(0x31333934))) { PRINT(KERN_DEBUG, lynx->id, "read a valid bus info block from"); } else { kfree(i2c_ad); error = -ENXIO; FAIL("read something from serial eeprom, but it does not seem to be a valid bus info block"); } } i2c_del_adapter(i2c_ad); kfree(i2c_ad); } } host->csr.guid_hi = be32_to_cpu(lynx->bus_info_block[3]); host->csr.guid_lo = be32_to_cpu(lynx->bus_info_block[4]); host->csr.cyc_clk_acc = (be32_to_cpu(lynx->bus_info_block[2]) >> 16) & 0xff; host->csr.max_rec = (be32_to_cpu(lynx->bus_info_block[2]) >> 12) & 0xf; if (!lynx->phyic.reg_1394a) host->csr.lnk_spd = (get_phy_reg(lynx, 2) & 0xc0) >> 6; else host->csr.lnk_spd = be32_to_cpu(lynx->bus_info_block[2]) & 0x7; if (hpsb_add_host(host)) { error = -ENOMEM; FAIL("Failed to register host with highlevel"); } lynx->state = is_host; return 0; #undef FAIL } static struct pci_device_id pci_table[] = { { .vendor = PCI_VENDOR_ID_TI, .device = PCI_DEVICE_ID_TI_PCILYNX, .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, }, { } /* Terminating entry */ }; static struct pci_driver lynx_pci_driver = { .name = PCILYNX_DRIVER_NAME, .id_table = pci_table, .probe = add_card, .remove = remove_card, }; static struct hpsb_host_driver lynx_driver = { .owner = THIS_MODULE, .name = PCILYNX_DRIVER_NAME, .set_hw_config_rom = NULL, .transmit_packet = lynx_transmit, .devctl = lynx_devctl, .isoctl = NULL, }; MODULE_AUTHOR("Andreas E. Bombe <andreas.bombe@munich.netsurf.de>"); MODULE_DESCRIPTION("driver for Texas Instruments PCI Lynx IEEE-1394 controller"); MODULE_LICENSE("GPL"); MODULE_SUPPORTED_DEVICE("pcilynx"); MODULE_DEVICE_TABLE(pci, pci_table); static int __init pcilynx_init(void) { int ret; ret = pci_register_driver(&lynx_pci_driver); if (ret < 0) { PRINT_G(KERN_ERR, "PCI module init failed"); return ret; } return 0; } static void __exit pcilynx_cleanup(void) { pci_unregister_driver(&lynx_pci_driver); } module_init(pcilynx_init); module_exit(pcilynx_cleanup);
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-14 08:45:28 -0400