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BranchCommit messageAuthorAge
archive/unc-master-3.0P-FP: fix BUG_ON releated to priority inheritanceBjoern Brandenburg13 years
archived-2013.1uncachedev: mmap memory that is not cached by CPUsGlenn Elliott12 years
archived-private-masterMerge branch 'wip-2.6.34' into old-private-masterAndrea Bastoni15 years
archived-semi-partMerge branch 'wip-semi-part' of ssh://cvs/cvs/proj/litmus/repo/litmus2010 int...Andrea Bastoni15 years
demoFurther refinementsJonathan Herman14 years
ecrts-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
ecrts14-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
gpusync-rtss12Final GPUSync implementation.Glenn Elliott12 years
gpusync/stagingRename IKGLP R2DGLP.Glenn Elliott12 years
linux-tipMerge branch 'slab/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/p...Linus Torvalds15 years
litmus2008-patch-seriesadd i386 feather-trace implementationBjoern B. Brandenburg16 years
masterPSN-EDF: use inferred_sporadic_job_release_atBjoern Brandenburg9 years
pgmmake it compileGlenn Elliott12 years
prop/litmus-signalsInfrastructure for Litmus signals.Glenn Elliott13 years
prop/robust-tie-breakFixed bug in edf_higher_prio().Glenn Elliott13 years
stagingFix tracepoint compilation errorFelipe Cerqueira13 years
test9/23/2016Namhoon Kim9 years
tracing-develTest kernel tracing events capabilitiesAndrea Bastoni16 years
v2.6.34-with-arm-patchessmsc911x: Add spinlocks around registers accessCatalin Marinas15 years
v2015.1Add ARM syscall def for get_current_budgetBjoern Brandenburg10 years
wip-2011.2-bbbLitmus core: simplify np-section protocolBjoern B. Brandenburg14 years
wip-2011.2-bbb-traceRefactor sched_trace_log_message() -> debug_trace_log_message()Andrea Bastoni14 years
wip-2012.3-gpuSOBLIV draining support for C-EDF.Glenn Elliott12 years
wip-2012.3-gpu-preportpick up last C-RM fileGlenn Elliott12 years
wip-2012.3-gpu-rtss13Fix critical bug in GPU tracker.Glenn Elliott12 years
wip-2012.3-gpu-sobliv-budget-w-ksharkProper sobliv draining and many bug fixes.Glenn Elliott12 years
wip-aedzl-finalMake it easier to compile AEDZL interfaces in liblitmus.Glenn Elliott15 years
wip-aedzl-revisedAdd sched_trace data for Apative EDZLGlenn Elliott15 years
wip-arbit-deadlineFix compilation bug.Glenn Elliott13 years
wip-aux-tasksDescription of refined aux task inheritance.Glenn Elliott13 years
wip-bbbGSN-EDF & Core: improve debug TRACE'ing for NP sectionsBjoern B. Brandenburg14 years
wip-bbb-prio-donuse correct timestampBjoern B. Brandenburg14 years
wip-better-breakImplement hash-based EDF tie-breaking.Glenn Elliott13 years
wip-binary-heapMake C-EDF work with simplified binheap_deleteGlenn Elliott13 years
wip-budgetAdded support for choices in budget policy enforcement.Glenn Elliott15 years
wip-colorSummarize schedulability with final recordJonathan Herman13 years
wip-color-jlhsched_color: Fixed two bugs causing crashing on experiment restart and a rare...Jonathan Herman13 years
wip-d10-hz1000Enable HZ=1000 on District 10Bjoern B. Brandenburg15 years
wip-default-clusteringFeature: Make default C-EDF clustering compile-time configurable.Glenn Elliott15 years
wip-dissipation-jericksoUpdate from 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-dissipation2-jericksoUpdate 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-ecrts14-pgmMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
wip-edf-hsblast tested versionJonathan Herman14 years
wip-edf-osLookup table EDF-osJeremy Erickson12 years
wip-edf-tie-breakMerge branch 'wip-edf-tie-break' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus...Glenn Elliott13 years
wip-edzl-critiqueUse hr_timer's active checks instead of having own flag.Glenn Elliott15 years
wip-edzl-finalImplementation of the EDZL scheduler.Glenn Elliott15 years
wip-edzl-revisedClean up comments.Glenn Elliott15 years
wip-eventsAdded support for tracing arbitrary actions.Jonathan Herman15 years
wip-extra-debugDBG: add additional tracingBjoern B. Brandenburg15 years
wip-fix-switch-jericksoAttempt to fix race condition with plugin switchingJeremy Erickson15 years
wip-fix3sched: show length of runqueue clock deactivation in /proc/sched_debugBjoern B. Brandenburg15 years
wip-fmlp-dequeueImprove FMLP queue management.Glenn Elliott14 years
wip-ft-irq-flagFeather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-gpu-cleanupEnable sched_trace log injection from userspaceGlenn Elliott13 years
wip-gpu-interruptsRemove option for threading of all softirqs.Glenn Elliott14 years
wip-gpu-rtas12Generalized GPU cost predictors + EWMA. (untested)Glenn Elliott13 years
wip-gpu-rtss12Final GPUSync implementation.Glenn Elliott13 years
wip-gpu-rtss12-srpexperimental changes to support GPUs under SRPGlenn Elliott13 years
wip-gpusync-mergeCleanup priority tracking for budget enforcement.Glenn Elliott11 years
wip-ikglpMove RSM and IKGLP imp. to own .c filesGlenn Elliott13 years
wip-k-fmlpMerge branch 'mpi-master' into wip-k-fmlpGlenn Elliott14 years
wip-kernel-coloringAdded recolor syscallNamhoon Kim7 years
wip-kernthreadsKludge work-queue processing into klitirqd.Glenn Elliott15 years
wip-klmirqd-to-auxAllow klmirqd threads to be given names.Glenn Elliott13 years
wip-ksharkMerge branch 'mpi-staging' into wip-ksharkJonathan Herman13 years
wip-litmus-3.2Merge commit 'v3.2' into litmus-stagingAndrea Bastoni13 years
wip-litmus2011.2Cleanup: Coding conformance for affinity stuff.Glenn Elliott14 years
wip-litmus3.0-2011.2Feather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-master-2.6.33-rtAvoid deadlock when switching task policy to BACKGROUND (ugly)Andrea Bastoni15 years
wip-mcRemoved ARM-specific hacks which disabled less common mixed-criticality featu...Jonathan Herman12 years
wip-mc-bipasaMC-EDF addedbipasa chattopadhyay13 years
wip-mc-jericksoSplit C/D queuesJeremy Erickson15 years
wip-mc2-cache-slackManually patched mc^2 related codeMing Yang10 years
wip-mcrit-maccosmeticMac Mollison15 years
wip-merge-3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-merge-v3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-migration-affinityNULL affinity dereference in C-EDF.Glenn Elliott14 years
wip-mmap-uncacheshare branch with othersGlenn Elliott13 years
wip-modechangeRTSS 2017 submissionNamhoon Kim8 years
wip-nested-lockingAppears to be working.Bryan Ward12 years
wip-omlp-gedfFirst implementation of G-OMLP.Glenn Elliott15 years
wip-paiSome cleanup of PAIGlenn Elliott14 years
wip-percore-lib9/21/2016Namhoon Kim9 years
wip-performanceCONFIG_DONT_PREEMPT_ON_TIE: Don't preeempt a scheduled task on priority tie.Glenn Elliott14 years
wip-pgmAdd PGM support to C-FLGlenn Elliott12 years
wip-pgm-splitFirst draft of C-FL-splitNamhoon Kim12 years
wip-pm-ovdAdd preemption-and-migration overhead tracing supportAndrea Bastoni15 years
wip-prio-inhP-EDF updated to use the generic pi framework.Glenn Elliott15 years
wip-prioq-dglBUG FIX: Support DGLs with PRIOQ_MUTEXGlenn Elliott13 years
wip-refactored-gedfGeneralizd architecture for GEDF-style scheduelrs to reduce code redundancy.Glenn Elliott15 years
wip-release-master-fixbugfix: release master CPU must signal task was pickedBjoern B. Brandenburg14 years
wip-robust-tie-breakEDF priority tie-breaks.Glenn Elliott13 years
wip-rt-ksharkMove task time accounting into the complete_job method.Jonathan Herman13 years
wip-rtas12-pgmScheduling of PGM jobs.Glenn Elliott13 years
wip-semi-partFix compile error with newer GCCJeremy Erickson12 years
wip-semi-part-edfos-jericksoUse initial CPU set by clientJeremy Erickson12 years
wip-shared-libTODO: Fix condition checks in replicate_page_move_mapping()Namhoon Kim9 years
wip-shared-lib2RTAS 2017 Submission ver.Namhoon Kim9 years
wip-shared-memInitial commit for shared libraryNamhoon Kim9 years
wip-splitting-jericksoFix release behaviorJeremy Erickson13 years
wip-splitting-omlp-jericksoBjoern's Dissertation Code with Priority DonationJeremy Erickson13 years
wip-stage-binheapAn efficient binary heap implementation.Glenn Elliott13 years
wip-sun-portDynamic memory allocation and clean exit for FeatherTraceChristopher Kenna15 years
wip-timer-tracebugfix: C-EDF, clear scheduled field of the correct CPU upon task_exitAndrea Bastoni15 years
wip-tracepointsAdd kernel-style events for sched_trace_XXX() functionsAndrea Bastoni14 years
 
TagDownloadAuthorAge
2015.1commit 8e51b37822...Bjoern Brandenburg10 years
2013.1commit bcaacec1ca...Glenn Elliott12 years
2012.3commit c158b5fbe4...Jonathan Herman13 years
2012.2commit b53c479a0f...Glenn Elliott13 years
2012.1commit 83b11ea1c6...Bjoern B. Brandenburg14 years
rtas12-mc-beta-expcommit 8e236ee20f...Christopher Kenna14 years
2011.1commit d11808b5c6...Christopher Kenna15 years
v2.6.37-rc4commit e8a7e48bb2...Linus Torvalds15 years
v2.6.37-rc3commit 3561d43fd2...Linus Torvalds15 years
v2.6.37-rc2commit e53beacd23...Linus Torvalds15 years
v2.6.37-rc1commit c8ddb2713c...Linus Torvalds15 years
v2.6.36commit f6f94e2ab1...Linus Torvalds15 years
2010.2commit 5c5456402d...Bjoern B. Brandenburg15 years
v2.6.36-rc8commit cd07202cc8...Linus Torvalds15 years
v2.6.36-rc7commit cb655d0f3d...Linus Torvalds15 years
v2.6.36-rc6commit 899611ee7d...Linus Torvalds15 years
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2010.1commit 7c1ff4c544...Andrea Bastoni15 years
v2.6.34commit e40152ee1e...Linus Torvalds15 years
v2.6.33.4commit 4640b4e7d9...Greg Kroah-Hartman15 years
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generated by cgit v1.2.2 (git 2.25.0) at 2025-09-08 21:48:39 -0400
class="hl com"> along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include <linux/kernel.h> #include <linux/slab.h> #include <linux/init.h> #include <linux/capability.h> #include <linux/sched.h> #include <linux/interrupt.h> #include <linux/bitops.h> #include <linux/pci.h> #include <linux/module.h> #include <linux/atmdev.h> #include <linux/sonet.h> #include <linux/atm_suni.h> #include <linux/dma-mapping.h> #include <linux/delay.h> #include <asm/io.h> #include <asm/string.h> #include <asm/page.h> #include <asm/irq.h> #include <asm/dma.h> #include <asm/byteorder.h> #include <asm/uaccess.h> #include <asm/atomic.h> #ifdef CONFIG_ATM_FORE200E_SBA #include <asm/idprom.h> #include <asm/sbus.h> #include <asm/openprom.h> #include <asm/oplib.h> #include <asm/pgtable.h> #endif #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */ #define FORE200E_USE_TASKLET #endif #if 0 /* enable the debugging code of the buffer supply queues */ #define FORE200E_BSQ_DEBUG #endif #if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */ #define FORE200E_52BYTE_AAL0_SDU #endif #include "fore200e.h" #include "suni.h" #define FORE200E_VERSION "0.3e" #define FORE200E "fore200e: " #if 0 /* override .config */ #define CONFIG_ATM_FORE200E_DEBUG 1 #endif #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0) #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \ printk(FORE200E format, ##args); } while (0) #else #define DPRINTK(level, format, args...) do {} while (0) #endif #define FORE200E_ALIGN(addr, alignment) \ ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr)) #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type)) #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ]) #define FORE200E_NEXT_ENTRY(index, modulo) (index = ++(index) % (modulo)) #if 1 #define ASSERT(expr) if (!(expr)) { \ printk(FORE200E "assertion failed! %s[%d]: %s\n", \ __FUNCTION__, __LINE__, #expr); \ panic(FORE200E "%s", __FUNCTION__); \ } #else #define ASSERT(expr) do {} while (0) #endif static const struct atmdev_ops fore200e_ops; static const struct fore200e_bus fore200e_bus[]; static LIST_HEAD(fore200e_boards); MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen"); MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION); MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E"); static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = { { BUFFER_S1_NBR, BUFFER_L1_NBR }, { BUFFER_S2_NBR, BUFFER_L2_NBR } }; static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = { { BUFFER_S1_SIZE, BUFFER_L1_SIZE }, { BUFFER_S2_SIZE, BUFFER_L2_SIZE } }; #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0) static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" }; #endif #if 0 /* currently unused */ static int fore200e_fore2atm_aal(enum fore200e_aal aal) { switch(aal) { case FORE200E_AAL0: return ATM_AAL0; case FORE200E_AAL34: return ATM_AAL34; case FORE200E_AAL5: return ATM_AAL5; } return -EINVAL; } #endif static enum fore200e_aal fore200e_atm2fore_aal(int aal) { switch(aal) { case ATM_AAL0: return FORE200E_AAL0; case ATM_AAL34: return FORE200E_AAL34; case ATM_AAL1: case ATM_AAL2: case ATM_AAL5: return FORE200E_AAL5; } return -EINVAL; } static char* fore200e_irq_itoa(int irq) { static char str[8]; sprintf(str, "%d", irq); return str; } static void* fore200e_kmalloc(int size, gfp_t flags) { void *chunk = kzalloc(size, flags); if (!chunk) printk(FORE200E "kmalloc() failed, requested size = %d, flags = 0x%x\n", size, flags); return chunk; } static void fore200e_kfree(void* chunk) { kfree(chunk); } /* allocate and align a chunk of memory intended to hold the data behing exchanged between the driver and the adapter (using streaming DVMA) */ static int fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction) { unsigned long offset = 0; if (alignment <= sizeof(int)) alignment = 0; chunk->alloc_size = size + alignment; chunk->align_size = size; chunk->direction = direction; chunk->alloc_addr = fore200e_kmalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA); if (chunk->alloc_addr == NULL) return -ENOMEM; if (alignment > 0) offset = FORE200E_ALIGN(chunk->alloc_addr, alignment); chunk->align_addr = chunk->alloc_addr + offset; chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction); return 0; } /* free a chunk of memory */ static void fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk) { fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction); fore200e_kfree(chunk->alloc_addr); } static void fore200e_spin(int msecs) { unsigned long timeout = jiffies + msecs_to_jiffies(msecs); while (time_before(jiffies, timeout)); } static int fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs) { unsigned long timeout = jiffies + msecs_to_jiffies(msecs); int ok; mb(); do { if ((ok = (*addr == val)) || (*addr & STATUS_ERROR)) break; } while (time_before(jiffies, timeout)); #if 1 if (!ok) { printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n", *addr, val); } #endif return ok; } static int fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs) { unsigned long timeout = jiffies + msecs_to_jiffies(msecs); int ok; do { if ((ok = (fore200e->bus->read(addr) == val))) break; } while (time_before(jiffies, timeout)); #if 1 if (!ok) { printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n", fore200e->bus->read(addr), val); } #endif return ok; } static void fore200e_free_rx_buf(struct fore200e* fore200e) { int scheme, magn, nbr; struct buffer* buffer; for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) { for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) { struct chunk* data = &buffer[ nbr ].data; if (data->alloc_addr != NULL) fore200e_chunk_free(fore200e, data); } } } } } static void fore200e_uninit_bs_queue(struct fore200e* fore200e) { int scheme, magn; for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status; struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block; if (status->alloc_addr) fore200e->bus->dma_chunk_free(fore200e, status); if (rbd_block->alloc_addr) fore200e->bus->dma_chunk_free(fore200e, rbd_block); } } } static int fore200e_reset(struct fore200e* fore200e, int diag) { int ok; fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET; fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat); fore200e->bus->reset(fore200e); if (diag) { ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000); if (ok == 0) { printk(FORE200E "device %s self-test failed\n", fore200e->name); return -ENODEV; } printk(FORE200E "device %s self-test passed\n", fore200e->name); fore200e->state = FORE200E_STATE_RESET; } return 0; } static void fore200e_shutdown(struct fore200e* fore200e) { printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n", fore200e->name, fore200e->phys_base, fore200e_irq_itoa(fore200e->irq)); if (fore200e->state > FORE200E_STATE_RESET) { /* first, reset the board to prevent further interrupts or data transfers */ fore200e_reset(fore200e, 0); } /* then, release all allocated resources */ switch(fore200e->state) { case FORE200E_STATE_COMPLETE: kfree(fore200e->stats); case FORE200E_STATE_IRQ: free_irq(fore200e->irq, fore200e->atm_dev); case FORE200E_STATE_ALLOC_BUF: fore200e_free_rx_buf(fore200e); case FORE200E_STATE_INIT_BSQ: fore200e_uninit_bs_queue(fore200e); case FORE200E_STATE_INIT_RXQ: fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status); fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd); case FORE200E_STATE_INIT_TXQ: fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status); fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd); case FORE200E_STATE_INIT_CMDQ: fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status); case FORE200E_STATE_INITIALIZE: /* nothing to do for that state */ case FORE200E_STATE_START_FW: /* nothing to do for that state */ case FORE200E_STATE_LOAD_FW: /* nothing to do for that state */ case FORE200E_STATE_RESET: /* nothing to do for that state */ case FORE200E_STATE_MAP: fore200e->bus->unmap(fore200e); case FORE200E_STATE_CONFIGURE: /* nothing to do for that state */ case FORE200E_STATE_REGISTER: /* XXX shouldn't we *start* by deregistering the device? */ atm_dev_deregister(fore200e->atm_dev); case FORE200E_STATE_BLANK: /* nothing to do for that state */ break; } } #ifdef CONFIG_ATM_FORE200E_PCA static u32 fore200e_pca_read(volatile u32 __iomem *addr) { /* on big-endian hosts, the board is configured to convert the endianess of slave RAM accesses */ return le32_to_cpu(readl(addr)); } static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr) { /* on big-endian hosts, the board is configured to convert the endianess of slave RAM accesses */ writel(cpu_to_le32(val), addr); } static u32 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction) { u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction); DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n", virt_addr, size, direction, dma_addr); return dma_addr; } static void fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction) { DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction); } static void fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction) { DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); pci_dma_sync_single_for_cpu((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction); } static void fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction) { DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); pci_dma_sync_single_for_device((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction); } /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */ static int fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int nbr, int alignment) { /* returned chunks are page-aligned */ chunk->alloc_size = size * nbr; chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev, chunk->alloc_size, &chunk->dma_addr); if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0)) return -ENOMEM; chunk->align_addr = chunk->alloc_addr; return 0; } /* free a DMA consistent chunk of memory */ static void fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk) { pci_free_consistent((struct pci_dev*)fore200e->bus_dev, chunk->alloc_size, chunk->alloc_addr, chunk->dma_addr); } static int fore200e_pca_irq_check(struct fore200e* fore200e) { /* this is a 1 bit register */ int irq_posted = readl(fore200e->regs.pca.psr); #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2) if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) { DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number); } #endif return irq_posted; } static void fore200e_pca_irq_ack(struct fore200e* fore200e) { writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr); } static void fore200e_pca_reset(struct fore200e* fore200e) { writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr); fore200e_spin(10); writel(0, fore200e->regs.pca.hcr); } static int __devinit fore200e_pca_map(struct fore200e* fore200e) { DPRINTK(2, "device %s being mapped in memory\n", fore200e->name); fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH); if (fore200e->virt_base == NULL) { printk(FORE200E "can't map device %s\n", fore200e->name); return -EFAULT; } DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base); /* gain access to the PCA specific registers */ fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET; fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET; fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET; fore200e->state = FORE200E_STATE_MAP; return 0; } static void fore200e_pca_unmap(struct fore200e* fore200e) { DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name); if (fore200e->virt_base != NULL) iounmap(fore200e->virt_base); } static int __devinit fore200e_pca_configure(struct fore200e* fore200e) { struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev; u8 master_ctrl, latency; DPRINTK(2, "device %s being configured\n", fore200e->name); if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) { printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n"); return -EIO; } pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl); master_ctrl = master_ctrl #if defined(__BIG_ENDIAN) /* request the PCA board to convert the endianess of slave RAM accesses */ | PCA200E_CTRL_CONVERT_ENDIAN #endif #if 0 | PCA200E_CTRL_DIS_CACHE_RD | PCA200E_CTRL_DIS_WRT_INVAL | PCA200E_CTRL_ENA_CONT_REQ_MODE | PCA200E_CTRL_2_CACHE_WRT_INVAL #endif | PCA200E_CTRL_LARGE_PCI_BURSTS; pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl); /* raise latency from 32 (default) to 192, as this seems to prevent NIC lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition. this may impact the performances of other PCI devices on the same bus, though */ latency = 192; pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency); fore200e->state = FORE200E_STATE_CONFIGURE; return 0; } static int __init fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom) { struct host_cmdq* cmdq = &fore200e->host_cmdq; struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; struct prom_opcode opcode; int ok; u32 prom_dma; FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); opcode.opcode = OPCODE_GET_PROM; opcode.pad = 0; prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE); fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr); *entry->status = STATUS_PENDING; fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode); ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); *entry->status = STATUS_FREE; fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE); if (ok == 0) { printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name); return -EIO; } #if defined(__BIG_ENDIAN) #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) )) /* MAC address is stored as little-endian */ swap_here(&prom->mac_addr[0]); swap_here(&prom->mac_addr[4]); #endif return 0; } static int fore200e_pca_proc_read(struct fore200e* fore200e, char *page) { struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev; return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n", pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn)); } #endif /* CONFIG_ATM_FORE200E_PCA */ #ifdef CONFIG_ATM_FORE200E_SBA static u32 fore200e_sba_read(volatile u32 __iomem *addr) { return sbus_readl(addr); } static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr) { sbus_writel(val, addr); } static u32 fore200e_sba_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction) { u32 dma_addr = sbus_map_single((struct sbus_dev*)fore200e->bus_dev, virt_addr, size, direction); DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n", virt_addr, size, direction, dma_addr); return dma_addr; } static void fore200e_sba_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction) { DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n", dma_addr, size, direction); sbus_unmap_single((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction); } static void fore200e_sba_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction) { DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); sbus_dma_sync_single_for_cpu((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction); } static void fore200e_sba_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction) { DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction); sbus_dma_sync_single_for_device((struct sbus_dev*)fore200e->bus_dev, dma_addr, size, direction); } /* allocate a DVMA consistent chunk of memory intended to act as a communication mechanism (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */ static int fore200e_sba_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int nbr, int alignment) { chunk->alloc_size = chunk->align_size = size * nbr; /* returned chunks are page-aligned */ chunk->alloc_addr = sbus_alloc_consistent((struct sbus_dev*)fore200e->bus_dev, chunk->alloc_size, &chunk->dma_addr); if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0)) return -ENOMEM; chunk->align_addr = chunk->alloc_addr; return 0; } /* free a DVMA consistent chunk of memory */ static void fore200e_sba_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk) { sbus_free_consistent((struct sbus_dev*)fore200e->bus_dev, chunk->alloc_size, chunk->alloc_addr, chunk->dma_addr); } static void fore200e_sba_irq_enable(struct fore200e* fore200e) { u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr); } static int fore200e_sba_irq_check(struct fore200e* fore200e) { return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ; } static void fore200e_sba_irq_ack(struct fore200e* fore200e) { u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr); } static void fore200e_sba_reset(struct fore200e* fore200e) { fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr); fore200e_spin(10); fore200e->bus->write(0, fore200e->regs.sba.hcr); } static int __init fore200e_sba_map(struct fore200e* fore200e) { struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev; unsigned int bursts; /* gain access to the SBA specific registers */ fore200e->regs.sba.hcr = sbus_ioremap(&sbus_dev->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR"); fore200e->regs.sba.bsr = sbus_ioremap(&sbus_dev->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR"); fore200e->regs.sba.isr = sbus_ioremap(&sbus_dev->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR"); fore200e->virt_base = sbus_ioremap(&sbus_dev->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM"); if (fore200e->virt_base == NULL) { printk(FORE200E "unable to map RAM of device %s\n", fore200e->name); return -EFAULT; } DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base); fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */ /* get the supported DVMA burst sizes */ bursts = prom_getintdefault(sbus_dev->bus->prom_node, "burst-sizes", 0x00); if (sbus_can_dma_64bit(sbus_dev)) sbus_set_sbus64(sbus_dev, bursts); fore200e->state = FORE200E_STATE_MAP; return 0; } static void fore200e_sba_unmap(struct fore200e* fore200e) { sbus_iounmap(fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH); sbus_iounmap(fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH); sbus_iounmap(fore200e->regs.sba.isr, SBA200E_ISR_LENGTH); sbus_iounmap(fore200e->virt_base, SBA200E_RAM_LENGTH); } static int __init fore200e_sba_configure(struct fore200e* fore200e) { fore200e->state = FORE200E_STATE_CONFIGURE; return 0; } static struct fore200e* __init fore200e_sba_detect(const struct fore200e_bus* bus, int index) { struct fore200e* fore200e; struct sbus_bus* sbus_bus; struct sbus_dev* sbus_dev = NULL; unsigned int count = 0; for_each_sbus (sbus_bus) { for_each_sbusdev (sbus_dev, sbus_bus) { if (strcmp(sbus_dev->prom_name, SBA200E_PROM_NAME) == 0) { if (count >= index) goto found; count++; } } } return NULL; found: if (sbus_dev->num_registers != 4) { printk(FORE200E "this %s device has %d instead of 4 registers\n", bus->model_name, sbus_dev->num_registers); return NULL; } fore200e = fore200e_kmalloc(sizeof(struct fore200e), GFP_KERNEL); if (fore200e == NULL) return NULL; fore200e->bus = bus; fore200e->bus_dev = sbus_dev; fore200e->irq = sbus_dev->irqs[ 0 ]; fore200e->phys_base = (unsigned long)sbus_dev; sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1); return fore200e; } static int __init fore200e_sba_prom_read(struct fore200e* fore200e, struct prom_data* prom) { struct sbus_dev* sbus_dev = (struct sbus_dev*) fore200e->bus_dev; int len; len = prom_getproperty(sbus_dev->prom_node, "macaddrlo2", &prom->mac_addr[ 4 ], 4); if (len < 0) return -EBUSY; len = prom_getproperty(sbus_dev->prom_node, "macaddrhi4", &prom->mac_addr[ 2 ], 4); if (len < 0) return -EBUSY; prom_getproperty(sbus_dev->prom_node, "serialnumber", (char*)&prom->serial_number, sizeof(prom->serial_number)); prom_getproperty(sbus_dev->prom_node, "promversion", (char*)&prom->hw_revision, sizeof(prom->hw_revision)); return 0; } static int fore200e_sba_proc_read(struct fore200e* fore200e, char *page) { struct sbus_dev* sbus_dev = (struct sbus_dev*)fore200e->bus_dev; return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n", sbus_dev->slot, sbus_dev->prom_name); } #endif /* CONFIG_ATM_FORE200E_SBA */ static void fore200e_tx_irq(struct fore200e* fore200e) { struct host_txq* txq = &fore200e->host_txq; struct host_txq_entry* entry; struct atm_vcc* vcc; struct fore200e_vc_map* vc_map; if (fore200e->host_txq.txing == 0) return; for (;;) { entry = &txq->host_entry[ txq->tail ]; if ((*entry->status & STATUS_COMPLETE) == 0) { break; } DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n", entry, txq->tail, entry->vc_map, entry->skb); /* free copy of misaligned data */ kfree(entry->data); /* remove DMA mapping */ fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length, DMA_TO_DEVICE); vc_map = entry->vc_map; /* vcc closed since the time the entry was submitted for tx? */ if ((vc_map->vcc == NULL) || (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) { DPRINTK(1, "no ready vcc found for PDU sent on device %d\n", fore200e->atm_dev->number); dev_kfree_skb_any(entry->skb); } else { ASSERT(vc_map->vcc); /* vcc closed then immediately re-opened? */ if (vc_map->incarn != entry->incarn) { /* when a vcc is closed, some PDUs may be still pending in the tx queue. if the same vcc is immediately re-opened, those pending PDUs must not be popped after the completion of their emission, as they refer to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc would be decremented by the size of the (unrelated) skb, possibly leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc. we thus bind the tx entry to the current incarnation of the vcc when the entry is submitted for tx. When the tx later completes, if the incarnation number of the tx entry does not match the one of the vcc, then this implies that the vcc has been closed then re-opened. we thus just drop the skb here. */ DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n", fore200e->atm_dev->number); dev_kfree_skb_any(entry->skb); } else { vcc = vc_map->vcc; ASSERT(vcc); /* notify tx completion */ if (vcc->pop) { vcc->pop(vcc, entry->skb); } else { dev_kfree_skb_any(entry->skb); } #if 1 /* race fixed by the above incarnation mechanism, but... */ if (atomic_read(&sk_atm(vcc)->sk_wmem_alloc) < 0) { atomic_set(&sk_atm(vcc)->sk_wmem_alloc, 0); } #endif /* check error condition */ if (*entry->status & STATUS_ERROR) atomic_inc(&vcc->stats->tx_err); else atomic_inc(&vcc->stats->tx); } } *entry->status = STATUS_FREE; fore200e->host_txq.txing--; FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX); } } #ifdef FORE200E_BSQ_DEBUG int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn) { struct buffer* buffer; int count = 0; buffer = bsq->freebuf; while (buffer) { if (buffer->supplied) { printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n", where, scheme, magn, buffer->index); } if (buffer->magn != magn) { printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n", where, scheme, magn, buffer->index, buffer->magn); } if (buffer->scheme != scheme) { printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n", where, scheme, magn, buffer->index, buffer->scheme); } if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) { printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n", where, scheme, magn, buffer->index); } count++; buffer = buffer->next; } if (count != bsq->freebuf_count) { printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n", where, scheme, magn, count, bsq->freebuf_count); } return 0; } #endif static void fore200e_supply(struct fore200e* fore200e) { int scheme, magn, i; struct host_bsq* bsq; struct host_bsq_entry* entry; struct buffer* buffer; for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) { for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) { bsq = &fore200e->host_bsq[ scheme ][ magn ]; #ifdef FORE200E_BSQ_DEBUG bsq_audit(1, bsq, scheme, magn); #endif while (bsq->freebuf_count >= RBD_BLK_SIZE) { DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n", RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count); entry = &bsq->host_entry[ bsq->head ]; for (i = 0; i < RBD_BLK_SIZE; i++) { /* take the first buffer in the free buffer list */ buffer = bsq->freebuf; if (!buffer) { printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n", scheme, magn, bsq->freebuf_count); return; } bsq->freebuf = buffer->next; #ifdef FORE200E_BSQ_DEBUG if (buffer->supplied) printk(FORE200E "queue %d.%d, buffer %lu already supplied\n", scheme, magn, buffer->index); buffer->supplied = 1; #endif entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr; entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer); } FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS); /* decrease accordingly the number of free rx buffers */ bsq->freebuf_count -= RBD_BLK_SIZE; *entry->status = STATUS_PENDING; fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr); } } } } static int fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd) { struct sk_buff* skb; struct buffer* buffer; struct fore200e_vcc* fore200e_vcc; int i, pdu_len = 0; #ifdef FORE200E_52BYTE_AAL0_SDU u32 cell_header = 0; #endif ASSERT(vcc); fore200e_vcc = FORE200E_VCC(vcc); ASSERT(fore200e_vcc); #ifdef FORE200E_52BYTE_AAL0_SDU if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) { cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) | (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) | (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) | (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) | rpd->atm_header.clp; pdu_len = 4; } #endif /* compute total PDU length */ for (i = 0; i < rpd->nseg; i++) pdu_len += rpd->rsd[ i ].length; skb = alloc_skb(pdu_len, GFP_ATOMIC); if (skb == NULL) { DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len); atomic_inc(&vcc->stats->rx_drop); return -ENOMEM; } __net_timestamp(skb); #ifdef FORE200E_52BYTE_AAL0_SDU if (cell_header) { *((u32*)skb_put(skb, 4)) = cell_header; } #endif /* reassemble segments */ for (i = 0; i < rpd->nseg; i++) { /* rebuild rx buffer address from rsd handle */ buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle); /* Make device DMA transfer visible to CPU. */ fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE); memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length); /* Now let the device get at it again. */ fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE); } DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize); if (pdu_len < fore200e_vcc->rx_min_pdu) fore200e_vcc->rx_min_pdu = pdu_len; if (pdu_len > fore200e_vcc->rx_max_pdu) fore200e_vcc->rx_max_pdu = pdu_len; fore200e_vcc->rx_pdu++; /* push PDU */ if (atm_charge(vcc, skb->truesize) == 0) { DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n", vcc->itf, vcc->vpi, vcc->vci); dev_kfree_skb_any(skb); atomic_inc(&vcc->stats->rx_drop); return -ENOMEM; } ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0); vcc->push(vcc, skb); atomic_inc(&vcc->stats->rx); ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0); return 0; } static void fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd) { struct host_bsq* bsq; struct buffer* buffer; int i; for (i = 0; i < rpd->nseg; i++) { /* rebuild rx buffer address from rsd handle */ buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle); bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ]; #ifdef FORE200E_BSQ_DEBUG bsq_audit(2, bsq, buffer->scheme, buffer->magn); if (buffer->supplied == 0) printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n", buffer->scheme, buffer->magn, buffer->index); buffer->supplied = 0; #endif /* re-insert the buffer into the free buffer list */ buffer->next = bsq->freebuf; bsq->freebuf = buffer; /* then increment the number of free rx buffers */ bsq->freebuf_count++; } } static void fore200e_rx_irq(struct fore200e* fore200e) { struct host_rxq* rxq = &fore200e->host_rxq; struct host_rxq_entry* entry; struct atm_vcc* vcc; struct fore200e_vc_map* vc_map; for (;;) { entry = &rxq->host_entry[ rxq->head ]; /* no more received PDUs */ if ((*entry->status & STATUS_COMPLETE) == 0) break; vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); if ((vc_map->vcc == NULL) || (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) { DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n", fore200e->atm_dev->number, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); } else { vcc = vc_map->vcc; ASSERT(vcc); if ((*entry->status & STATUS_ERROR) == 0) { fore200e_push_rpd(fore200e, vcc, entry->rpd); } else { DPRINTK(2, "damaged PDU on %d.%d.%d\n", fore200e->atm_dev->number, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci); atomic_inc(&vcc->stats->rx_err); } } FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX); fore200e_collect_rpd(fore200e, entry->rpd); /* rewrite the rpd address to ack the received PDU */ fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr); *entry->status = STATUS_FREE; fore200e_supply(fore200e); } } #ifndef FORE200E_USE_TASKLET static void fore200e_irq(struct fore200e* fore200e) { unsigned long flags; spin_lock_irqsave(&fore200e->q_lock, flags); fore200e_rx_irq(fore200e); spin_unlock_irqrestore(&fore200e->q_lock, flags); spin_lock_irqsave(&fore200e->q_lock, flags); fore200e_tx_irq(fore200e); spin_unlock_irqrestore(&fore200e->q_lock, flags); } #endif static irqreturn_t fore200e_interrupt(int irq, void* dev) { struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev); if (fore200e->bus->irq_check(fore200e) == 0) { DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number); return IRQ_NONE; } DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number); #ifdef FORE200E_USE_TASKLET tasklet_schedule(&fore200e->tx_tasklet); tasklet_schedule(&fore200e->rx_tasklet); #else fore200e_irq(fore200e); #endif fore200e->bus->irq_ack(fore200e); return IRQ_HANDLED; } #ifdef FORE200E_USE_TASKLET static void fore200e_tx_tasklet(unsigned long data) { struct fore200e* fore200e = (struct fore200e*) data; unsigned long flags; DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number); spin_lock_irqsave(&fore200e->q_lock, flags); fore200e_tx_irq(fore200e); spin_unlock_irqrestore(&fore200e->q_lock, flags); } static void fore200e_rx_tasklet(unsigned long data) { struct fore200e* fore200e = (struct fore200e*) data; unsigned long flags; DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number); spin_lock_irqsave(&fore200e->q_lock, flags); fore200e_rx_irq((struct fore200e*) data); spin_unlock_irqrestore(&fore200e->q_lock, flags); } #endif static int fore200e_select_scheme(struct atm_vcc* vcc) { /* fairly balance the VCs over (identical) buffer schemes */ int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO; DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n", vcc->itf, vcc->vpi, vcc->vci, scheme); return scheme; } static int fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu) { struct host_cmdq* cmdq = &fore200e->host_cmdq; struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ]; struct activate_opcode activ_opcode; struct deactivate_opcode deactiv_opcode; struct vpvc vpvc; int ok; enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal); FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD); if (activate) { FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc); activ_opcode.opcode = OPCODE_ACTIVATE_VCIN; activ_opcode.aal = aal; activ_opcode.scheme = FORE200E_VCC(vcc)->scheme; activ_opcode.pad = 0; } else { deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN; deactiv_opcode.pad = 0; } vpvc.vci = vcc->vci; vpvc.vpi = vcc->vpi; *entry->status = STATUS_PENDING; if (activate) { #ifdef FORE200E_52BYTE_AAL0_SDU mtu = 48; #endif /* the MTU is not used by the cp, except in the case of AAL0 */ fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu); fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc); fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode); } else { fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc); fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode); } ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400); *entry->status = STATUS_FREE; if (ok == 0) { printk(FORE200E "unable to %s VC %d.%d.%d\n", activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci); return -EIO; } DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci, activate ? "open" : "clos"); return 0; } #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */ static void fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate) { if (qos->txtp.max_pcr < ATM_OC3_PCR) { /* compute the data cells to idle cells ratio from the tx PCR */ rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR; rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells; } else { /* disable rate control */ rate->data_cells = rate->idle_cells = 0; } } static int fore200e_open(struct atm_vcc *vcc) { struct fore200e* fore200e = FORE200E_DEV(vcc->dev); struct fore200e_vcc* fore200e_vcc; struct fore200e_vc_map* vc_map; unsigned long flags; int vci = vcc->vci; short vpi = vcc->vpi; ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS)); ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS)); spin_lock_irqsave(&fore200e->q_lock, flags); vc_map = FORE200E_VC_MAP(fore200e, vpi, vci); if (vc_map->vcc) { spin_unlock_irqrestore(&fore200e->q_lock, flags); printk(FORE200E "VC %d.%d.%d already in use\n", fore200e->atm_dev->number, vpi, vci); return -EINVAL; } vc_map->vcc = vcc; spin_unlock_irqrestore(&fore200e->q_lock, flags); fore200e_vcc = fore200e_kmalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC); if (fore200e_vcc == NULL) { vc_map->vcc = NULL; return -ENOMEM; } DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; " "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), fore200e_traffic_class[ vcc->qos.txtp.traffic_class ], vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu, fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ], vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu); /* pseudo-CBR bandwidth requested? */ if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { down(&fore200e->rate_sf); if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) { up(&fore200e->rate_sf); fore200e_kfree(fore200e_vcc); vc_map->vcc = NULL; return -EAGAIN; } /* reserve bandwidth */ fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr; up(&fore200e->rate_sf); } vcc->itf = vcc->dev->number; set_bit(ATM_VF_PARTIAL,&vcc->flags); set_bit(ATM_VF_ADDR, &vcc->flags); vcc->dev_data = fore200e_vcc; if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) { vc_map->vcc = NULL; clear_bit(ATM_VF_ADDR, &vcc->flags); clear_bit(ATM_VF_PARTIAL,&vcc->flags); vcc->dev_data = NULL; fore200e->available_cell_rate += vcc->qos.txtp.max_pcr; fore200e_kfree(fore200e_vcc); return -EINVAL; } /* compute rate control parameters */ if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate); set_bit(ATM_VF_HASQOS, &vcc->flags); DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal), vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr, fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells); } fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1; fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0; fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0; /* new incarnation of the vcc */ vc_map->incarn = ++fore200e->incarn_count; /* VC unusable before this flag is set */ set_bit(ATM_VF_READY, &vcc->flags); return 0; } static void fore200e_close(struct atm_vcc* vcc) { struct fore200e* fore200e = FORE200E_DEV(vcc->dev); struct fore200e_vcc* fore200e_vcc; struct fore200e_vc_map* vc_map; unsigned long flags; ASSERT(vcc); ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS)); ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS)); DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal)); clear_bit(ATM_VF_READY, &vcc->flags); fore200e_activate_vcin(fore200e, 0, vcc, 0); spin_lock_irqsave(&fore200e->q_lock, flags); vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci); /* the vc is no longer considered as "in use" by fore200e_open() */ vc_map->vcc = NULL; vcc->itf = vcc->vci = vcc->vpi = 0; fore200e_vcc = FORE200E_VCC(vcc); vcc->dev_data = NULL; spin_unlock_irqrestore(&fore200e->q_lock, flags); /* release reserved bandwidth, if any */ if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) { down(&fore200e->rate_sf); fore200e->available_cell_rate += vcc->qos.txtp.max_pcr; up(&fore200e->rate_sf); clear_bit(ATM_VF_HASQOS, &vcc->flags); } clear_bit(ATM_VF_ADDR, &vcc->flags); clear_bit(ATM_VF_PARTIAL,&vcc->flags); ASSERT(fore200e_vcc); fore200e_kfree(fore200e_vcc); } static int fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb) { struct fore200e* fore200e = FORE200E_DEV(vcc->dev); struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc); struct fore200e_vc_map* vc_map; struct host_txq* txq = &fore200e->host_txq; struct host_txq_entry* entry; struct tpd* tpd; struct tpd_haddr tpd_haddr; int retry = CONFIG_ATM_FORE200E_TX_RETRY; int tx_copy = 0; int tx_len = skb->len; u32* cell_header = NULL; unsigned char* skb_data; int skb_len; unsigned char* data; unsigned long flags; ASSERT(vcc); ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0); ASSERT(fore200e); ASSERT(fore200e_vcc); if (!test_bit(ATM_VF_READY, &vcc->flags)) { DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi); dev_kfree_skb_any(skb); return -EINVAL; } #ifdef FORE200E_52BYTE_AAL0_SDU if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) { cell_header = (u32*) skb->data; skb_data = skb->data + 4; /* skip 4-byte cell header */ skb_len = tx_len = skb->len - 4; DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header); } else #endif { skb_data = skb->data; skb_len = skb->len; } if (((unsigned long)skb_data) & 0x3) { DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name); tx_copy = 1; tx_len = skb_len; } if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) { /* this simply NUKES the PCA board */ DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name); tx_copy = 1; tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD; } if (tx_copy) { data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA); if (data == NULL) { if (vcc->pop) { vcc->pop(vcc, skb); } else { dev_kfree_skb_any(skb); } return -ENOMEM; } memcpy(data, skb_data, skb_len); if (skb_len < tx_len) memset(data + skb_len, 0x00, tx_len - skb_len); } else { data = skb_data; } vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci); ASSERT(vc_map->vcc == vcc); retry_here: spin_lock_irqsave(&fore200e->q_lock, flags); entry = &txq->host_entry[ txq->head ]; if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) { /* try to free completed tx queue entries */ fore200e_tx_irq(fore200e); if (*entry->status != STATUS_FREE) { spin_unlock_irqrestore(&fore200e->q_lock, flags); /* retry once again? */ if (--retry > 0) { udelay(50); goto retry_here; } atomic_inc(&vcc->stats->tx_err); fore200e->tx_sat++; DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n", fore200e->name, fore200e->cp_queues->heartbeat); if (vcc->pop) { vcc->pop(vcc, skb); } else { dev_kfree_skb_any(skb); } if (tx_copy) kfree(data); return -ENOBUFS; } } entry->incarn = vc_map->incarn; entry->vc_map = vc_map; entry->skb = skb; entry->data = tx_copy ? data : NULL; tpd = entry->tpd; tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE); tpd->tsd[ 0 ].length = tx_len; FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX); txq->txing++;