/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ #ifndef _ASM_PCI_H #define _ASM_PCI_H #include <linux/mm.h> #ifdef __KERNEL__ /* * This file essentially defines the interface between board * specific PCI code and MIPS common PCI code. Should potentially put * into include/asm/pci.h file. */ #include <linux/ioport.h> /* * Each pci channel is a top-level PCI bus seem by CPU. A machine with * multiple PCI channels may have multiple PCI host controllers or a * single controller supporting multiple channels. */ struct pci_controller { struct pci_controller *next; struct pci_bus *bus; struct pci_ops *pci_ops; struct resource *mem_resource; unsigned long mem_offset; struct resource *io_resource; unsigned long io_offset; unsigned int index; /* For compatibility with current (as of July 2003) pciutils and XFree86. Eventually will be removed. */ unsigned int need_domain_info; int iommu; /* Optional access methods for reading/writing the bus number of the PCI controller */ int (*get_busno)(void); void (*set_busno)(int busno); }; /* * Used by boards to register their PCI busses before the actual scanning. */ extern struct pci_controller * alloc_pci_controller(void); extern void register_pci_controller(struct pci_controller *hose); /* * board supplied pci irq fixup routine */ extern int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin); /* Can be used to override the logic in pci_scan_bus for skipping already-configured bus numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the loader */ extern unsigned int pcibios_assign_all_busses(void); #define pcibios_scan_all_fns(a, b) 0 extern unsigned long PCIBIOS_MIN_IO; extern unsigned long PCIBIOS_MIN_MEM; #define PCIBIOS_MIN_CARDBUS_IO 0x4000 extern void pcibios_set_master(struct pci_dev *dev); static inline void pcibios_penalize_isa_irq(int irq, int active) { /* We don't do dynamic PCI IRQ allocation */ } /* * Dynamic DMA mapping stuff. * MIPS has everything mapped statically. */ #include <linux/types.h> #include <linux/slab.h> #include <asm/scatterlist.h> #include <linux/string.h> #include <asm/io.h> struct pci_dev; /* * The PCI address space does equal the physical memory address space. The * networking and block device layers use this boolean for bounce buffer * decisions. This is set if any hose does not have an IOMMU. */ extern unsigned int PCI_DMA_BUS_IS_PHYS; #ifdef CONFIG_DMA_NEED_PCI_MAP_STATE /* pci_unmap_{single,page} is not a nop, thus... */ #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME; #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) #else /* CONFIG_DMA_NEED_PCI_MAP_STATE */ /* pci_unmap_{page,single} is a nop so... */ #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) #define pci_unmap_addr(PTR, ADDR_NAME) (0) #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) #define pci_unmap_len(PTR, LEN_NAME) (0) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) #endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */ /* This is always fine. */ #define pci_dac_dma_supported(pci_dev, mask) (1) extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction); extern struct page *pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr); extern unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr); extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction); extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction); #ifdef CONFIG_PCI static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, unsigned long *strategy_parameter) { *strat = PCI_DMA_BURST_INFINITY; *strategy_parameter = ~0UL; } #endif extern void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, struct resource *res); extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, struct pci_bus_region *region); static inline struct resource * pcibios_select_root(struct pci_dev *pdev, struct resource *res) { struct resource *root = NULL; if (res->flags & IORESOURCE_IO) root = &ioport_resource; if (res->flags & IORESOURCE_MEM) root = &iomem_resource; return root; } #ifdef CONFIG_PCI_DOMAINS #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index static inline int pci_proc_domain(struct pci_bus *bus) { struct pci_controller *hose = bus->sysdata; return hose->need_domain_info; } #endif /* CONFIG_PCI_DOMAINS */ #endif /* __KERNEL__ */ /* implement the pci_ DMA API in terms of the generic device dma_ one */ #include <asm-generic/pci-dma-compat.h> static inline void pcibios_add_platform_entries(struct pci_dev *dev) { } /* Do platform specific device initialization at pci_enable_device() time */ extern int pcibios_plat_dev_init(struct pci_dev *dev); #endif /* _ASM_PCI_H */