/* * Copyright 2013 Linaro Ltd. * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License * Version 2 or later at the following locations: * * http://www.opensource.org/licenses/gpl-license.html * http://www.gnu.org/copyleft/gpl.html */ #include "ste-nomadik-pinctrl.dtsi" / { soc { pinctrl { /* Settings for all UART default and sleep states */ uart0 { uart0_default_mode: uart0_default { default_mux { ste,function = "u0"; ste,pins = "u0_a_1"; }; default_cfg1 { ste,pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */ ste,config = <&in_pu>; }; default_cfg2 { ste,pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */ ste,config = <&out_hi>; }; }; uart0_sleep_mode: uart0_sleep { sleep_cfg1 { ste,pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */ ste,config = <&slpm_in_wkup_pdis>; }; sleep_cfg2 { ste,pins = "GPIO1_AJ3"; /* RTS */ ste,config = <&slpm_out_hi_wkup_pdis>; }; sleep_cfg3 { ste,pins = "GPIO3_AH3"; /* TXD */ ste,config = <&slpm_out_wkup_pdis>; }; }; }; uart1 { uart1_default_mode: uart1_default { default_mux { ste,function = "u1"; ste,pins = "u1rxtx_a_1"; }; default_cfg1 { ste,pins = "GPIO4_AH6"; /* RXD */ ste,config = <&in_pu>; }; default_cfg2 { ste,pins = "GPIO5_AG6"; /* TXD */ ste,config = <&out_hi>; }; }; uart1_sleep_mode: uart1_sleep { sleep_cfg1 { ste,pins = "GPIO4_AH6"; /* RXD */ ste,config = <&slpm_in_wkup_pdis>; }; sleep_cfg2 { ste,pins = "GPIO5_AG6"; /* TXD */ ste,config = <&slpm_out_wkup_pdis>; }; }; }; uart2 { uart2_default_mode: uart2_default { default_mux { ste,function = "u2"; ste,pins = "u2rxtx_c_1"; }; default_cfg1 { ste,pins = "GPIO29_W2"; /* RXD */ ste,config = <&in_pu>; }; default_cfg2 { ste,pins = "GPIO30_W3"; /* TXD */ ste,config = <&out_hi>; }; }; uart2_sleep_mode: uart2_sleep { sleep_cfg1 { ste,pins = "GPIO29_W2"; /* RXD */ ste,config = <&in_wkup_pdis>; }; sleep_cfg2 { ste,pins = "GPIO30_W3"; /* TXD */ ste,config = <&out_wkup_pdis>; }; }; }; /* Settings for all I2C default and sleep states */ i2c0 { i2c0_default_mode: i2c_default { default_mux { ste,function = "i2c0"; ste,pins = "i2c0_a_1"; }; default_cfg1 { ste,pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */ ste,config = <&in_pu>; }; }; i2c0_sleep_mode: i2c_sleep { sleep_cfg1 { ste,pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */ ste,config = <&slpm_in_wkup_pdis>; }; }; }; i2c1 { i2c1_default_mode: i2c_default { default_mux { ste,function = "i2c1"; ste,pins = "i2c1_b_2"; }; default_cfg1 { ste,pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */ ste,config = <&in_pu>; }; }; i2c1_sleep_mode: i2c_sleep { sleep_cfg1 { ste,pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */ ste,config = <&slpm_in_wkup_pdis>; }; }; }; i2c2 { i2c2_default_mode: i2c_default { default_mux { ste,function = "i2c2"; ste,pins = "i2c2_b_2"; }; default_cfg1 { ste,pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */ ste,config = <&in_pu>; }; }; i2c2_sleep_mode: i2c_sleep { sleep_cfg1 { ste,pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */ ste,config = <&slpm_in_wkup_pdis>; }; }; }; i2c3 { i2c3_default_mode: i2c_default { default_mux { ste,function = "i2c3"; ste,pins = "i2c3_c_2"; }; default_cfg1 { ste,pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */ ste,config = <&in_pu>; }; }; i2c3_sleep_mode: i2c_sleep { sleep_cfg1 { ste,pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */ ste,config = <&slpm_in_wkup_pdis>; }; }; }; /* * Activating I2C4 will conflict with UART1 about the same pins so do not * enable I2C4 and UART1 at the same time. */ i2c4 { i2c4_default_mode: i2c_default { default_mux { ste,function = "i2c4"; ste,pins = "i2c4_b_1"; }; default_cfg1 { ste,pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */ ste,config = <&in_pu>; }; }; i2c4_sleep_mode: i2c_sleep { sleep_cfg1 { ste,pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */ ste,config = <&slpm_in_wkup_pdis>; }; }; }; /* Settings for all SPI default and sleep states */ spi2 { spi2_default_mode: spi_default { default_mux { ste,function = "spi2"; ste,pins = "spi2_oc1_2"; }; default_cfg1 { ste,pins = "GPIO216_AG12"; /* FRM */ ste,config = <&gpio_out_hi>; }; default_cfg2 { ste,pins = "GPIO218_AH11"; /* RXD */ ste,config = <&in_pd>; }; default_cfg3 { ste,pins = "GPIO215_AH13", /* TXD */ "GPIO217_AH12"; /* CLK */ ste,config = <&out_lo>; }; }; spi2_idle_mode: spi_idle { /* * The idle mode is basically sleep mode sans wakeups. Also * note that we have muxes the pins off the function here * as we do not state any muxing. */ idle_cfg1 { ste,pins = "GPIO218_AH11"; /* RXD */ ste,config = <&slpm_in_pdis>; }; idle_cfg2 { ste,pins = "GPIO215_AH13"; /* TXD */ ste,config = <&slpm_out_lo_pdis>; }; idle_cfg3 { ste,pins = "GPIO217_AH12"; /* CLK */ ste,config = <&slpm_pdis>; }; }; spi2_sleep_mode: spi_sleep { sleep_cfg1 { ste,pins = "GPIO216_AG12", /* FRM */ "GPIO218_AH11"; /* RXD */ ste,config = <&slpm_in_wkup_pdis>; }; sleep_cfg2 { ste,pins = "GPIO215_AH13"; /* TXD */ ste,config = <&slpm_out_lo_wkup_pdis>; }; sleep_cfg3 { ste,pins = "GPIO217_AH12"; /* CLK */ ste,config = <&slpm_wkup_pdis>; }; }; }; /* Settings for all MMC/SD/SDIO default and sleep states */ sdi0 { /* This is the external SD card slot, 4 bits wide */ sdi0_default_mode: sdi0_default { default_mux { ste,function = "mc0"; ste,pins = "mc0_a_1"; }; default_cfg1 { ste,pins = "GPIO18_AC2", /* CMDDIR */ "GPIO19_AC1", /* DAT0DIR */ "GPIO20_AB4"; /* DAT2DIR */ ste,config = <&out_hi>; }; default_cfg2 { ste,pins = "GPIO22_AA3"; /* FBCLK */ ste,config = <&in_nopull>; }; default_cfg3 { ste,pins = "GPIO23_AA4"; /* CLK */ ste,config = <&out_lo>; }; default_cfg4 { ste,pins = "GPIO24_AB2", /* CMD */ "GPIO25_Y4", /* DAT0 */ "GPIO26_Y2", /* DAT1 */ "GPIO27_AA2", /* DAT2 */ "GPIO28_AA1"; /* DAT3 */ ste,config = <&in_pu>; }; }; sdi0_sleep_mode: sdi0_sleep { sleep_cfg1 { ste,pins = "GPIO18_AC2", /* CMDDIR */ "GPIO19_AC1", /* DAT0DIR */ "GPIO20_AB4"; /* DAT2DIR */ ste,config = <&slpm_out_hi_wkup_pdis>; }; sleep_cfg2 { ste,pins = "GPIO22_AA3", /* FBCLK */ "GPIO24_AB2", /* CMD */ "GPIO25_Y4", /* DAT0 */ "GPIO26_Y2", /* DAT1 */ "GPIO27_AA2", /* DAT2 */ "GPIO28_AA1"; /* DAT3 */ ste,config = <&slpm_in_wkup_pdis>; }; sleep_cfg3 { ste,pins = "GPIO23_AA4"; /* CLK */ ste,config = <&slpm_out_lo_wkup_pdis>; }; }; }; sdi1 { /* This is the WLAN SDIO 4 bits wide */ sdi1_default_mode: sdi1_default { default_mux { ste,function = "mc1"; ste,pins = "mc1_a_1"; }; default_cfg1 { ste,pins = "GPIO208_AH16"; /* CLK */ ste,config = <&out_lo>; }; default_cfg2 { ste,pins = "GPIO209_AG15"; /* FBCLK */ ste,config = <&in_nopull>; }; default_cfg3 { ste,pins = "GPIO210_AJ15", /* CMD */ "GPIO211_AG14", /* DAT0 */ "GPIO212_AF13", /* DAT1 */ "GPIO213_AG13", /* DAT2 */ "GPIO214_AH15"; /* DAT3 */ ste,config = <&in_pu>; }; }; sdi1_sleep_mode: sdi1_sleep { sleep_cfg1 { ste,pins = "GPIO208_AH16"; /* CLK */ ste,config = <&slpm_out_lo_wkup_pdis>; }; sleep_cfg2 { ste,pins = "GPIO209_AG15", /* FBCLK */ "GPIO210_AJ15", /* CMD */ "GPIO211_AG14", /* DAT0 */ "GPIO212_AF13", /* DAT1 */ "GPIO213_AG13", /* DAT2 */ "GPIO214_AH15"; /* DAT3 */ ste,config = <&slpm_in_wkup_pdis>; }; }; }; sdi2 { /* This is the eMMC 8 bits wide, usually PoP eMMC */ sdi2_default_mode: sdi2_default { default_mux { ste,function = "mc2"; ste,pins = "mc2_a_1"; }; default_cfg1 { ste,pins = "GPIO128_A5"; /* CLK */ ste,config = <&out_lo>; }; default_cfg2 { ste,pins = "GPIO130_C8"; /* FBCLK */ ste,config = <&in_nopull>; }; default_cfg3 { ste,pins = "GPIO129_B4", /* CMD */ "GPIO131_A12", /* DAT0 */ "GPIO132_C10", /* DAT1 */ "GPIO133_B10", /* DAT2 */ "GPIO134_B9", /* DAT3 */ "GPIO135_A9", /* DAT4 */ "GPIO136_C7", /* DAT5 */ "GPIO137_A7", /* DAT6 */ "GPIO138_C5"; /* DAT7 */ ste,config = <&in_pu>; }; }; sdi2_sleep_mode: sdi2_sleep { sleep_cfg1 { ste,pins = "GPIO128_A5"; /* CLK */ ste,config = <&out_lo_wkup_pdis>; }; sleep_cfg2 { ste,pins = "GPIO130_C8", /* FBCLK */ "GPIO129_B4"; /* CMD */ ste,config = <&in_wkup_pdis_en>; }; sleep_cfg3 { ste,pins = "GPIO131_A12", /* DAT0 */ "GPIO132_C10", /* DAT1 */ "GPIO133_B10", /* DAT2 */ "GPIO134_B9", /* DAT3 */ "GPIO135_A9", /* DAT4 */ "GPIO136_C7", /* DAT5 */ "GPIO137_A7", /* DAT6 */ "GPIO138_C5"; /* DAT7 */ ste,config = <&in_wkup_pdis>; }; }; }; sdi4 { /* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */ sdi4_default_mode: sdi4_default { default_mux { ste,function = "mc4"; ste,pins = "mc4_a_1"; }; default_cfg1 { ste,pins = "GPIO203_AE23"; /* CLK */ ste,config = <&out_lo>; }; default_cfg2 { ste,pins = "GPIO202_AF25"; /* FBCLK */ ste,config = <&in_nopull>; }; default_cfg3 { ste,pins = "GPIO201_AF24", /* CMD */ "GPIO200_AH26", /* DAT0 */ "GPIO199_AH23", /* DAT1 */ "GPIO198_AG25", /* DAT2 */ "GPIO197_AH24", /* DAT3 */ "GPIO207_AJ23", /* DAT4 */ "GPIO206_AG24", /* DAT5 */ "GPIO205_AG23", /* DAT6 */ "GPIO204_AF23"; /* DAT7 */ ste,config = <&in_pu>; }; }; sdi4_sleep_mode: sdi4_sleep { sleep_cfg1 { ste,pins = "GPIO203_AE23"; /* CLK */ ste,config = <&out_lo_wkup_pdis>; }; sleep_cfg2 { ste,pins = "GPIO202_AF25", /* FBCLK */ "GPIO201_AF24", /* CMD */ "GPIO200_AH26", /* DAT0 */ "GPIO199_AH23", /* DAT1 */ "GPIO198_AG25", /* DAT2 */ "GPIO197_AH24", /* DAT3 */ "GPIO207_AJ23", /* DAT4 */ "GPIO206_AG24", /* DAT5 */ "GPIO205_AG23", /* DAT6 */ "GPIO204_AF23"; /* DAT7 */ ste,config = <&slpm_in_wkup_pdis>; }; }; }; /* * Multi-rate serial ports (MSPs) - MSP3 output is internal and * cannot be muxed onto any pins. */ msp0 { msp0_default_mode: msp0_default { default_msp0_mux { ste,function = "msp0"; ste,pins = "msp0txrx_a_1", "msp0tfstck_a_1"; }; default_msp0_cfg { ste,pins = "GPIO12_AC4", /* TXD */ "GPIO15_AC3", /* RXD */ "GPIO13_AF3", /* TFS */ "GPIO14_AE3"; /* TCK */ ste,config = <&in_nopull>; }; }; }; msp1 { msp1_default_mode: msp1_default { default_mux { ste,function = "msp1"; ste,pins = "msp1txrx_a_1", "msp1_a_1"; }; default_cfg1 { ste,pins = "GPIO33_AF2"; ste,config = <&out_lo>; }; default_cfg2 { ste,pins = "GPIO34_AE1", "GPIO35_AE2", "GPIO36_AG2"; ste,config = <&in_nopull>; }; }; }; msp2 { msp2_default_mode: msp2_default { /* MSP2 usually used for HDMI audio */ default_mux { ste,function = "msp2"; ste,pins = "msp2_a_1"; }; default_cfg1 { ste,pins = "GPIO193_AH27", /* TXD */ "GPIO194_AF27", /* TCK */ "GPIO195_AG28"; /* TFS */ ste,config = <&in_pd>; }; default_cfg2 { ste,pins = "GPIO196_AG26"; /* RXD */ ste,config = <&out_lo>; }; }; }; musb { musb_default_mode: musb_default { default_mux { ste,function = "usb"; ste,pins = "usb_a_1"; }; default_cfg1 { ste,pins = "GPIO256_AF28", /* NXT */ "GPIO258_AD29", /* XCLK */ "GPIO259_AC29", /* DIR */ "GPIO260_AD28", /* DAT7 */ "GPIO261_AD26", /* DAT6 */ "GPIO262_AE26", /* DAT5 */ "GPIO263_AG29", /* DAT4 */ "GPIO264_AE27", /* DAT3 */ "GPIO265_AD27", /* DAT2 */ "GPIO266_AC28", /* DAT1 */ "GPIO267_AC27"; /* DAT0 */ ste,config = <&in_nopull>; }; default_cfg2 { ste,pins = "GPIO257_AE29"; /* STP */ ste,config = <&out_hi>; }; }; musb_sleep_mode: musb_sleep { sleep_cfg1 { ste,pins = "GPIO256_AF28", /* NXT */ "GPIO258_AD29", /* XCLK */ "GPIO259_AC29"; /* DIR */ ste,config = <&slpm_wkup_pdis_en>; }; sleep_cfg2 { ste,pins = "GPIO257_AE29"; /* STP */ ste,config = <&slpm_out_hi_wkup_pdis>; }; sleep_cfg3 { ste,pins = "GPIO260_AD28", /* DAT7 */ "GPIO261_AD26", /* DAT6 */ "GPIO262_AE26", /* DAT5 */ "GPIO263_AG29", /* DAT4 */ "GPIO264_AE27", /* DAT3 */ "GPIO265_AD27", /* DAT2 */ "GPIO266_AC28", /* DAT1 */ "GPIO267_AC27"; /* DAT0 */ ste,config = <&slpm_in_wkup_pdis_en>; }; }; }; mcde { lcd_default_mode: lcd_default { default_mux { /* Mux in VSI0 and all the data lines */ ste,function = "lcd"; ste,pins = "lcdvsi0_a_1", /* VSI0 for LCD */ "lcd_d0_d7_a_1", /* Data lines */ "lcd_d8_d11_a_1", /* TV-out */ "lcdaclk_b_1", /* Clock line for TV-out */ "lcdvsi1_a_1"; /* VSI1 for HDMI */ }; default_cfg1 { ste,pins = "GPIO68_E1", /* VSI0 */ "GPIO69_E2"; /* VSI1 */ ste,config = <&in_pu>; }; }; lcd_sleep_mode: lcd_sleep { sleep_cfg1 { ste,pins = "GPIO69_E2"; /* VSI1 */ ste,config = <&slpm_in_wkup_pdis>; }; }; }; }; }; };