From 2ca2c570b0e38b0c214426b1708ee1b0c3a5067d Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Fri, 22 Dec 2006 14:33:18 +0100 Subject: [ARM] 4063/1: ep93xx: fix IRQ_EP93XX_GPIO?MUX numbering Fix incorrect IRQ numbering in arch-ep93xx/irqs.h (source: Applied Data Systems 2.6.17 kernel tree.) Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-ep93xx/irqs.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-ep93xx/irqs.h b/include/asm-arm/arch-ep93xx/irqs.h index 9a42f5de9e57..ae532e304bf1 100644 --- a/include/asm-arm/arch-ep93xx/irqs.h +++ b/include/asm-arm/arch-ep93xx/irqs.h @@ -22,9 +22,9 @@ #define IRQ_EP93XX_DMAM2P9 16 #define IRQ_EP93XX_DMAM2M0 17 #define IRQ_EP93XX_DMAM2M1 18 -#define IRQ_EP93XX_GPIO0MUX 20 -#define IRQ_EP93XX_GPIO1MUX 21 -#define IRQ_EP93XX_GPIO2MUX 22 +#define IRQ_EP93XX_GPIO0MUX 19 +#define IRQ_EP93XX_GPIO1MUX 20 +#define IRQ_EP93XX_GPIO2MUX 21 #define IRQ_EP93XX_GPIO3MUX 22 #define IRQ_EP93XX_UART1RX 23 #define IRQ_EP93XX_UART1TX 24 -- cgit v1.2.2 From 431d2cd99f9721ad09f859dc65895f30385cc5c6 Mon Sep 17 00:00:00 2001 From: Arnaud Patard Date: Wed, 27 Dec 2006 22:56:44 +0100 Subject: [ARM] 4073/1: Prevent s3c24xx drivers from including asm/arch/hardware.h and asm/arch/irqs.h As reminded in http://lkml.org/lkml/2006/12/23/26, one should use asm/hardware.h and asm/irq.h but absent-minded devs like me tends to use asm/arch/hardware.h and/or asm/arch/irqs.h. This patch aims at preventing such things. In order to make it work, I had to modify asm-arm/irq.h too so that it can be included from assembly files. Also, as a side effect, I had to modify some headers who were using the asm/arch/hardware.h or asm/arch/irqs.h. Signed-off-by: Arnaud Patard Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/dma.h | 2 +- include/asm-arm/arch-s3c2410/entry-macro.S | 2 +- include/asm-arm/arch-s3c2410/hardware.h | 4 ++++ include/asm-arm/arch-s3c2410/irqs.h | 3 +++ include/asm-arm/irq.h | 5 ++++- 5 files changed, 13 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h index 7ac224836971..58ffa7ba3c88 100644 --- a/include/asm-arm/arch-s3c2410/dma.h +++ b/include/asm-arm/arch-s3c2410/dma.h @@ -14,7 +14,7 @@ #define __ASM_ARCH_DMA_H __FILE__ #include -#include "hardware.h" +#include /* * This is the maximum DMA address(physical address) that can be DMAd to. diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S index e09a6b8ec153..1eb4e6b8d249 100644 --- a/include/asm-arm/arch-s3c2410/entry-macro.S +++ b/include/asm-arm/arch-s3c2410/entry-macro.S @@ -20,7 +20,7 @@ #define INTOFFSET (0x14) #include -#include +#include .macro get_irqnr_and_base, irqnr, irqstat, base, tmp diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h index 729565e5cdf4..6dadf58ff984 100644 --- a/include/asm-arm/arch-s3c2410/hardware.h +++ b/include/asm-arm/arch-s3c2410/hardware.h @@ -13,6 +13,10 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H +#ifndef __ASM_HARDWARE_H +#error "Do not include this directly, instead #include " +#endif + #ifndef __ASSEMBLY__ /* external functions for GPIO support diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h index 39a69829d163..4b7cff456c4e 100644 --- a/include/asm-arm/arch-s3c2410/irqs.h +++ b/include/asm-arm/arch-s3c2410/irqs.h @@ -12,6 +12,9 @@ #ifndef __ASM_ARCH_IRQS_H #define __ASM_ARCH_IRQS_H __FILE__ +#ifndef __ASM_ARM_IRQ_H +#error "Do not include this directly, instead #include " +#endif /* we keep the first set of CPU IRQs out of the range of * the ISA space, so that the PC104 has them to itself diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h index 283af50a16cb..1b882a255e35 100644 --- a/include/asm-arm/irq.h +++ b/include/asm-arm/irq.h @@ -19,7 +19,6 @@ #define NO_IRQ ((unsigned int)(-1)) #endif -struct irqaction; /* * Migration helpers @@ -37,6 +36,10 @@ struct irqaction; #define IRQT_HIGH (__IRQT_HIGHLVL) #define IRQT_PROBE IRQ_TYPE_PROBE +#ifndef __ASSEMBLY__ +struct irqaction; extern void migrate_irqs(void); #endif +#endif + -- cgit v1.2.2 From 4cc2f7a84d64d25a16bb9383148c1467284e2356 Mon Sep 17 00:00:00 2001 From: Paul Brook Date: Thu, 28 Dec 2006 01:54:16 +0100 Subject: [ARM] 4074/1: Flat loader stack alignment The ARM EABI requires doubleword (8-byte) stack alignment at all public entry points. The patch below makes the bFLT loader honour this. It's always safe to start with a doubleword aligned stack so it doesn't seem worth making this conditional on CONFIG_AEABI. Paul Signed-off-by: Paul Brook Signed-off-by: Russell King --- include/asm-arm/flat.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/flat.h b/include/asm-arm/flat.h index 966946478589..16f5375e57b8 100644 --- a/include/asm-arm/flat.h +++ b/include/asm-arm/flat.h @@ -5,7 +5,9 @@ #ifndef __ARM_FLAT_H__ #define __ARM_FLAT_H__ -#define flat_stack_align(sp) /* nothing needed */ +/* An odd number of words will be pushed after this alignment, so + deliberately misalign the value. */ +#define flat_stack_align(sp) sp = (void *)(((unsigned long)(sp) - 4) | 4) #define flat_argvp_envp_on_stack() 1 #define flat_old_ram_flag(flags) (flags) #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) -- cgit v1.2.2 From b0b1d60a64054697ef828e0565f006cc0f823590 Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Fri, 29 Dec 2006 01:30:24 +0100 Subject: [ARM] 4077/1: iop13xx: fix __io() macro Since iop13xx defines the PCI I/O spaces with physical resource addresses the __io macro needs to perform the physical to virtual conversion. I incorrectly assumed that this would be handled by ioremap, but drivers (like e1000) directly dereference the address returned from __io. Signed-off-by: Dan Williams Signed-off-by: Russell King --- include/asm-arm/arch-iop13xx/io.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-iop13xx/io.h b/include/asm-arm/arch-iop13xx/io.h index db6de2480a24..5a7bdb526606 100644 --- a/include/asm-arm/arch-iop13xx/io.h +++ b/include/asm-arm/arch-iop13xx/io.h @@ -21,10 +21,11 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) (a) +#define __io(a) __iop13xx_io(a) #define __mem_pci(a) (a) #define __mem_isa(a) (a) +extern void __iomem * __iop13xx_io(unsigned long io_addr); extern void __iomem * __ioremap(unsigned long, size_t, unsigned long); extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size, unsigned long flags); -- cgit v1.2.2 From 1c9d3df5e88ad7db23f5b22f4341c39722a904a4 Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Sat, 30 Dec 2006 16:08:50 +0100 Subject: [ARM] 4078/1: Fix ARM copypage cache coherency problems If PG_dcache_dirty is set for a page, we need to flush the source page before performing any copypage operation using a different virtual address. This fixes the copypage implementations for XScale, StrongARM and ARMv6. This patch fixes segmentation faults seen in the dynamic linker under the usage patterns in glibc 2.4/2.5. Signed-off-by: Richard Purdie Signed-off-by: Russell King --- include/asm-arm/cacheflush.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index 378a3a2ce8d9..d51049522cd0 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -355,6 +355,8 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, */ extern void flush_dcache_page(struct page *); +extern void __flush_dcache_page(struct address_space *mapping, struct page *page); + #define flush_dcache_mmap_lock(mapping) \ write_lock_irq(&(mapping)->tree_lock) #define flush_dcache_mmap_unlock(mapping) \ -- cgit v1.2.2 From f566b2b22d89c4785f25e6e4d60163b5ae6251f4 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 2 Jan 2007 20:59:38 +0100 Subject: [ARM] 4080/1: Fix for the SSCR0_SlotsPerFrm macro The SSCR0_SlotsPerFrm macro writes a 3-bit value to bits [2:0], while the correct location of FRDC in SSCR0 is at bits [26:24]. This patch adds the missing "<< 24". Signed-off-by: Philipp Zabel Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 083e03c5639f..f8f34505f470 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1626,7 +1626,7 @@ #define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ #define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ #define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ -#define SSCR0_SlotsPerFrm(x) ((x) - 1) /* Time slots per frame [1..8] */ +#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ #define SSCR0_ADC (1 << 30) /* Audio clock select */ #define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ #endif -- cgit v1.2.2 From d02b161eda65528ad3e89d642e416c265c17ceb8 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 2 Jan 2007 21:06:57 +0100 Subject: [ARM] 4081/1: Add definition for TI Sync Serial Protocol Of the possible SSP frame formats (FRF bits in SSCR0), only SSCR0_PSP is defined. Other possible formats are Motorola SPI (0<<4), TI SSP (1<<4) and Microwire (2<<4). Attached patch adds a definition SSCR0_TISSP. This mode is used for the sound codec attached to the PXA272 SSP1 of some HTC PDA phones. Signed-off-by: Philipp Zabel Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index f8f34505f470..e24f6b6c79ae 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1655,6 +1655,7 @@ #define SSCR0_EDSS (1 << 20) /* Extended Data Size Select */ /* extra bits in PXA255, PXA26x and PXA27x SSP ports */ +#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */ #define SSCR0_PSP (3 << 4) /* PSP - Programmable Serial Protocol */ #define SSCR1_TTELP (1 << 31) /* TXD Tristate Enable Last Phase */ #define SSCR1_TTE (1 << 30) /* TXD Tristate Enable */ -- cgit v1.2.2