From 0da323505fc7dd6b01d35e6181cb3d45f992726a Mon Sep 17 00:00:00 2001 From: KAMEZAWA Hiroyuki Date: Tue, 4 Apr 2006 16:06:00 +0100 Subject: [ARM] arm's arch_local_page_offset() fix against 2.6.17-rc1 This patch fixes arch_local_page_offset(pfn,nid) in arm. This new one (added by unify_pfn_to_page patches) is obviously buggy. This macro calculate page offset in a node. Note: about LOCAL_MAP_NR() comment in arm's sub-archs says... /* * Given a kaddr, LOCAL_MAP_NR finds the owning node of the memory * and returns the index corresponding to the appropriate page in the * node's mem_map. */ but LOCAL_MAP_NR() is designed to be able to take both paddr and kaddr. In this case, paddr is better. Signed-off-by: KAMEZAWA Hiroyuki Signed-off-by: Russell King --- include/asm-arm/memory.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index 2b3cf69b3ed9..a814e73e6656 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -188,7 +188,7 @@ static inline __deprecated void *bus_to_virt(unsigned long x) */ #include #define arch_pfn_to_nid(pfn) (PFN_TO_NID(pfn)) -#define arch_local_page_offset(pfn, nid) (LOCAL_MAP_NR((pfn) << PAGE_OFFSET)) +#define arch_local_page_offset(pfn, nid) LOCAL_MAP_NR((pfn) << PAGE_SHIFT) #define pfn_valid(pfn) \ ({ \ -- cgit v1.2.2 From 7d12963757b9170f162f317b7461353c5fb574e8 Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 4 Apr 2006 16:25:47 +0100 Subject: [ARM] Remove unnecessary extra parens in include/asm-arm/memory.h Signed-off-by: Russell King --- include/asm-arm/memory.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index a814e73e6656..209289407595 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -172,10 +172,10 @@ static inline __deprecated void *bus_to_virt(unsigned long x) * virt_addr_valid(k) indicates whether a virtual address is valid */ #ifndef CONFIG_DISCONTIGMEM -#define ARCH_PFN_OFFSET (PHYS_PFN_OFFSET) +#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET #define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr)) -#define virt_to_page(kaddr) (pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)) +#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) #define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory) #define PHYS_TO_NID(addr) (0) @@ -187,7 +187,7 @@ static inline __deprecated void *bus_to_virt(unsigned long x) * around in memory. */ #include -#define arch_pfn_to_nid(pfn) (PFN_TO_NID(pfn)) +#define arch_pfn_to_nid(pfn) PFN_TO_NID(pfn) #define arch_local_page_offset(pfn, nid) LOCAL_MAP_NR((pfn) << PAGE_SHIFT) #define pfn_valid(pfn) \ -- cgit v1.2.2 From 74d02fb9543ec85b04319b5b50926c78e7f07f3e Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 4 Apr 2006 21:47:43 +0100 Subject: [ARM] Move FLUSH_BASE macros to asm/arch/memory.h FLUSH_BASE must be visible to arch/arm/mm/init.c in order for the memory region to be setup. Move these definitions from asm-arm/arch-*/hardware.h into asm-arm/arch-*/memory.h where mm stuff can see them. Signed-off-by: Russell King --- include/asm-arm/arch-cl7500/hardware.h | 4 ---- include/asm-arm/arch-cl7500/memory.h | 6 ++++++ include/asm-arm/arch-ebsa110/hardware.h | 3 --- include/asm-arm/arch-ebsa110/memory.h | 6 ++++++ include/asm-arm/arch-ebsa285/hardware.h | 7 ------- include/asm-arm/arch-ebsa285/memory.h | 12 ++++++++++++ include/asm-arm/arch-l7200/hardware.h | 3 --- include/asm-arm/arch-l7200/memory.h | 6 ++++++ include/asm-arm/arch-rpc/hardware.h | 3 --- include/asm-arm/arch-rpc/memory.h | 6 ++++++ include/asm-arm/arch-sa1100/hardware.h | 4 ---- include/asm-arm/arch-sa1100/memory.h | 7 +++++++ include/asm-arm/arch-shark/hardware.h | 6 ------ include/asm-arm/arch-shark/memory.h | 6 ++++++ 14 files changed, 49 insertions(+), 30 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-cl7500/hardware.h b/include/asm-arm/arch-cl7500/hardware.h index 2339b764f69f..1adfd18e6154 100644 --- a/include/asm-arm/arch-cl7500/hardware.h +++ b/include/asm-arm/arch-cl7500/hardware.h @@ -53,16 +53,12 @@ #define SCREEN_END 0xdfc00000 #define SCREEN_BASE 0xdf800000 -#define FLUSH_BASE 0xdf000000 - #define VIDC_BASE (void __iomem *)0xe0400000 #define IOMD_BASE IOMEM(0xe0200000) #define IOC_BASE IOMEM(0xe0200000) #define FLOPPYDMA_BASE IOMEM(0xe002a000) #define PCIO_BASE IOMEM(0xe0010000) -#define FLUSH_BASE_PHYS 0x00000000 /* ROM */ - #define vidc_writel(val) __raw_writel(val, VIDC_BASE) /* in/out bias for the ISA slot region */ diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h index 34f40a6cec30..3178140e24ca 100644 --- a/include/asm-arm/arch-cl7500/memory.h +++ b/include/asm-arm/arch-cl7500/memory.h @@ -26,4 +26,10 @@ #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) +/* + * Cache flushing area - ROM + */ +#define FLUSH_BASE_PHYS 0x00000000 +#define FLUSH_BASE 0xdf000000 + #endif diff --git a/include/asm-arm/arch-ebsa110/hardware.h b/include/asm-arm/arch-ebsa110/hardware.h index 4e41c2358f4e..3ce864def41e 100644 --- a/include/asm-arm/arch-ebsa110/hardware.h +++ b/include/asm-arm/arch-ebsa110/hardware.h @@ -57,9 +57,6 @@ /* * RAM definitions */ -#define FLUSH_BASE_PHYS 0x40000000 -#define FLUSH_BASE 0xdf000000 - #define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */ #endif diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h index 02f144520c10..c7c500e176d0 100644 --- a/include/asm-arm/arch-ebsa110/memory.h +++ b/include/asm-arm/arch-ebsa110/memory.h @@ -28,4 +28,10 @@ #define __virt_to_bus(x) (x) #define __bus_to_virt(x) (x) +/* + * Cache flushing area - SRAM + */ +#define FLUSH_BASE_PHYS 0x40000000 +#define FLUSH_BASE 0xdf000000 + #endif diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h index 2ef2200f108c..ec51fe92483b 100644 --- a/include/asm-arm/arch-ebsa285/hardware.h +++ b/include/asm-arm/arch-ebsa285/hardware.h @@ -48,9 +48,6 @@ #define PCICFG0_SIZE 0x01000000 #define PCICFG0_BASE 0xfa000000 -#define FLUSH_SIZE 0x00100000 -#define FLUSH_BASE 0xf9000000 - #define PCIMEM_SIZE 0x01000000 #define PCIMEM_BASE 0xf0000000 @@ -61,9 +58,6 @@ #define PCIMEM_SIZE 0x80000000 #define PCIMEM_BASE 0x80000000 -#define FLUSH_SIZE 0x00100000 -#define FLUSH_BASE 0x7e000000 - #define WFLUSH_SIZE 0x01000000 #define WFLUSH_BASE 0x7d000000 @@ -94,7 +88,6 @@ #define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5)) #define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6)) -#define FLUSH_BASE_PHYS 0x50000000 #define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108) diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h index 09e335cd687d..99181ffc7e27 100644 --- a/include/asm-arm/arch-ebsa285/memory.h +++ b/include/asm-arm/arch-ebsa285/memory.h @@ -49,12 +49,22 @@ extern unsigned long __bus_to_virt(unsigned long); #define TASK_SIZE UL(0xbf000000) #define PAGE_OFFSET UL(0xc0000000) +/* + * Cache flushing area. + */ +#define FLUSH_BASE 0xf9000000 + #elif defined(CONFIG_ARCH_CO285) /* Task size and page offset at 1.5GB */ #define TASK_SIZE UL(0x5f000000) #define PAGE_OFFSET UL(0x60000000) +/* + * Cache flushing area. + */ +#define FLUSH_BASE 0x7e000000 + #else #error "Undefined footbridge architecture" @@ -72,4 +82,6 @@ extern unsigned long __bus_to_virt(unsigned long); */ #define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3) +#define FLUSH_BASE_PHYS 0x50000000 + #endif diff --git a/include/asm-arm/arch-l7200/hardware.h b/include/asm-arm/arch-l7200/hardware.h index b755079befab..2ab43f3a4a8d 100644 --- a/include/asm-arm/arch-l7200/hardware.h +++ b/include/asm-arm/arch-l7200/hardware.h @@ -52,9 +52,6 @@ #define ISA_SIZE 0x20000000 #define ISA_BASE 0xe0000000 -#define FLUSH_BASE_PHYS 0x40000000 /* ROM */ -#define FLUSH_BASE 0xdf000000 - #define PCIO_BASE IO_BASE #endif diff --git a/include/asm-arm/arch-l7200/memory.h b/include/asm-arm/arch-l7200/memory.h index 9e50a171f78a..402df637e740 100644 --- a/include/asm-arm/arch-l7200/memory.h +++ b/include/asm-arm/arch-l7200/memory.h @@ -20,4 +20,10 @@ #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) +/* + * Cache flushing area - ROM + */ +#define FLUSH_BASE_PHYS 0x40000000 +#define FLUSH_BASE 0xdf000000 + #endif diff --git a/include/asm-arm/arch-rpc/hardware.h b/include/asm-arm/arch-rpc/hardware.h index 9d7f87375aa7..7480f4e8d974 100644 --- a/include/asm-arm/arch-rpc/hardware.h +++ b/include/asm-arm/arch-rpc/hardware.h @@ -46,7 +46,6 @@ #define SCREEN_END 0xdfc00000 #define SCREEN_BASE 0xdf800000 -#define FLUSH_BASE 0xdf000000 #define UNCACHEABLE_ADDR 0xdf010000 /* @@ -59,8 +58,6 @@ #define PCIO_BASE IOMEM(0xe0010000) #define FLOPPYDMA_BASE IOMEM(0xe002a000) -#define FLUSH_BASE_PHYS 0x00000000 /* ROM */ - #define vidc_writel(val) __raw_writel(val, VIDC_BASE) #define IO_EC_EASI_BASE 0x81400000 diff --git a/include/asm-arm/arch-rpc/memory.h b/include/asm-arm/arch-rpc/memory.h index 0592cb3f0c74..303c424ce673 100644 --- a/include/asm-arm/arch-rpc/memory.h +++ b/include/asm-arm/arch-rpc/memory.h @@ -30,4 +30,10 @@ #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) +/* + * Cache flushing area - ROM + */ +#define FLUSH_BASE_PHYS 0x00000000 +#define FLUSH_BASE 0xdf000000 + #endif diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h index 28711aaa4968..ee008a5484f3 100644 --- a/include/asm-arm/arch-sa1100/hardware.h +++ b/include/asm-arm/arch-sa1100/hardware.h @@ -14,10 +14,6 @@ #include -/* Flushing areas */ -#define FLUSH_BASE_PHYS 0xe0000000 /* SA1100 zero bank */ -#define FLUSH_BASE 0xf5000000 -#define FLUSH_BASE_MINICACHE 0xf5800000 #define UNCACHEABLE_ADDR 0xfa050000 diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h index 018a9f0e3986..a29fac1387ca 100644 --- a/include/asm-arm/arch-sa1100/memory.h +++ b/include/asm-arm/arch-sa1100/memory.h @@ -91,4 +91,11 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes); #endif +/* + * Cache flushing area - SA1100 zero bank + */ +#define FLUSH_BASE_PHYS 0xe0000000 +#define FLUSH_BASE 0xf5000000 +#define FLUSH_BASE_MINICACHE 0xf5100000 + #endif diff --git a/include/asm-arm/arch-shark/hardware.h b/include/asm-arm/arch-shark/hardware.h index 4d35f8c154c3..ecba45260898 100644 --- a/include/asm-arm/arch-shark/hardware.h +++ b/include/asm-arm/arch-shark/hardware.h @@ -17,11 +17,6 @@ */ #define IO_BASE 0xe0000000 -/* - * RAM definitions - */ -#define FLUSH_BASE_PHYS 0x80000000 - #else #define IO_BASE 0 @@ -33,7 +28,6 @@ #define ROMCARD_SIZE 0x08000000 #define ROMCARD_START 0x10000000 -#define FLUSH_BASE 0xdf000000 #define PCIO_BASE 0xe0000000 diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h index 95a29b4bc5d0..6968d6103ea0 100644 --- a/include/asm-arm/arch-shark/memory.h +++ b/include/asm-arm/arch-shark/memory.h @@ -39,4 +39,10 @@ static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsig #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) +/* + * Cache flushing area + */ +#define FLUSH_BASE_PHYS 0x80000000 +#define FLUSH_BASE 0xdf000000 + #endif -- cgit v1.2.2 From 6e29ebad0f252b085a3bb0188637f315efda0a48 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 7 Apr 2006 10:16:55 +0100 Subject: [ARM] Fix ebsa110 debug macros Was including debug-8250.h rather than debug-8250.S Signed-off-by: Russell King --- include/asm-arm/arch-ebsa110/debug-macro.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-ebsa110/debug-macro.S b/include/asm-arm/arch-ebsa110/debug-macro.S index f61cadabe0ec..9213bfe4831d 100644 --- a/include/asm-arm/arch-ebsa110/debug-macro.S +++ b/include/asm-arm/arch-ebsa110/debug-macro.S @@ -18,4 +18,4 @@ #define UART_SHIFT 2 #define FLOW_CONTROL -#include +#include -- cgit v1.2.2 From f1dc24d53e9e91cf795f05751eeb7e220c7c15e1 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 7 Apr 2006 11:04:54 +0100 Subject: [ARM] ebsa110: Fix incorrect serial port address Signed-off-by: Russell King --- include/asm-arm/arch-ebsa110/uncompress.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-ebsa110/uncompress.h b/include/asm-arm/arch-ebsa110/uncompress.h index 66b19c7fd908..ae5b775eb0b7 100644 --- a/include/asm-arm/arch-ebsa110/uncompress.h +++ b/include/asm-arm/arch-ebsa110/uncompress.h @@ -10,7 +10,7 @@ #include -#define SERIAL_BASE ((unsigned char *)0xfe000be0) +#define SERIAL_BASE ((unsigned char *)0xf0000be0) /* * This does not append a newline -- cgit v1.2.2 From 932355797530f5bd4e1355a2c384e9f3ccc3dcbc Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sun, 9 Apr 2006 22:20:57 +0100 Subject: [ARM] 3459/1: ixp23xx: fix debug serial macros for big-endian operation Patch from Lennert Buytenhek The debug-8250 macros do byte accesses, which means that if we're in big-endian mode, we need to logically OR the UART address with 3, as the LSB byte lane (where UART data and status is transferred) has the highest byte address in the word when we are in big-endian mode. It's unclear why this problem didn't surface earlier. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-ixp23xx/debug-macro.S | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-arm/arch-ixp23xx/debug-macro.S b/include/asm-arm/arch-ixp23xx/debug-macro.S index eb99fd69fd24..2b25e640247d 100644 --- a/include/asm-arm/arch-ixp23xx/debug-macro.S +++ b/include/asm-arm/arch-ixp23xx/debug-macro.S @@ -17,6 +17,9 @@ tst \rx, #1 @ mmu enabled? ldreq \rx, =IXP23XX_PERIPHERAL_PHYS @ physical ldrne \rx, =IXP23XX_PERIPHERAL_VIRT @ virtual +#ifdef __ARMEB__ + orr \rx, \rx, #0x00000003 +#endif .endm #define UART_SHIFT 2 -- cgit v1.2.2 From bb54a335ae6d282a4f177c7b35cd149aa9b0b9be Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Mon, 10 Apr 2006 21:32:42 +0100 Subject: [ARM] 3472/1: Use the D variants of FLDMIA/FSTMIA on ARMv6 Patch from Catalin Marinas The X variants are deprecated starting with ARMv6. Using the D variants, the fpmx_state in vfp_hard_struct is no longer needed. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- include/asm-arm/fpstate.h | 2 ++ include/asm-arm/vfpmacros.h | 8 ++++++++ 2 files changed, 10 insertions(+) (limited to 'include') diff --git a/include/asm-arm/fpstate.h b/include/asm-arm/fpstate.h index 6246bf83627d..52bae088a185 100644 --- a/include/asm-arm/fpstate.h +++ b/include/asm-arm/fpstate.h @@ -26,7 +26,9 @@ struct vfp_hard_struct { __u64 fpregs[16]; +#if __LINUX_ARM_ARCH__ < 6 __u32 fpmx_state; +#endif __u32 fpexc; __u32 fpscr; /* diff --git a/include/asm-arm/vfpmacros.h b/include/asm-arm/vfpmacros.h index 15bd6e74c9cf..27fe028b4e72 100644 --- a/include/asm-arm/vfpmacros.h +++ b/include/asm-arm/vfpmacros.h @@ -16,10 +16,18 @@ @ read all the working registers back into the VFP .macro VFPFLDMIA, base +#if __LINUX_ARM_ARCH__ < 6 LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15} +#else + LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15} +#endif .endm @ write all the working registers out of the VFP .macro VFPFSTMIA, base +#if __LINUX_ARM_ARCH__ < 6 STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15} +#else + STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15} +#endif .endm -- cgit v1.2.2