From 859deea949c382d9ccb6397fe33df3703ecef45d Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 20 Oct 2006 14:37:05 +1000 Subject: [POWERPC] Cell timebase bug workaround The Cell CPU timebase has an erratum. When reading the entire 64 bits of the timebase with one mftb instruction, there is a handful of cycles window during which one might read a value with the low order 32 bits already reset to 0x00000000 but the high order bits not yet incremeted by one. This fixes it by reading the timebase again until the low order 32 bits is no longer 0. That might introduce occasional latencies if hitting mftb just at the wrong time, but no more than 70ns on a cell blade, and that was considered acceptable. Signed-off-by: Benjamin Herrenschmidt Acked-by: Olof Johansson Signed-off-by: Paul Mackerras --- include/asm-powerpc/time.h | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) (limited to 'include/asm-powerpc/time.h') diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h index b051d4c88c3b..a78285010d62 100644 --- a/include/asm-powerpc/time.h +++ b/include/asm-powerpc/time.h @@ -82,30 +82,35 @@ struct div_result { #define __USE_RTC() 0 #endif -/* On ppc64 this gets us the whole timebase; on ppc32 just the lower half */ +#ifdef CONFIG_PPC64 + +/* For compatibility, get_tbl() is defined as get_tb() on ppc64 */ +#define get_tbl get_tb + +#else + static inline unsigned long get_tbl(void) { - unsigned long tbl; - #if defined(CONFIG_403GCX) + unsigned long tbl; asm volatile("mfspr %0, 0x3dd" : "=r" (tbl)); + return tbl; #else - asm volatile("mftb %0" : "=r" (tbl)); + return mftbl(); #endif - return tbl; } static inline unsigned int get_tbu(void) { +#ifdef CONFIG_403GCX unsigned int tbu; - -#if defined(CONFIG_403GCX) asm volatile("mfspr %0, 0x3dc" : "=r" (tbu)); + return tbu; #else - asm volatile("mftbu %0" : "=r" (tbu)); + return mftbu(); #endif - return tbu; } +#endif /* !CONFIG_PPC64 */ static inline unsigned int get_rtcl(void) { @@ -131,7 +136,7 @@ static inline u64 get_tb(void) { return mftb(); } -#else +#else /* CONFIG_PPC64 */ static inline u64 get_tb(void) { unsigned int tbhi, tblo, tbhi2; @@ -144,7 +149,7 @@ static inline u64 get_tb(void) return ((u64)tbhi << 32) | tblo; } -#endif +#endif /* !CONFIG_PPC64 */ static inline void set_tb(unsigned int upper, unsigned int lower) { -- cgit v1.2.2 From df9c23095fc8652798c41dd860676d3dafb2f1dc Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Tue, 21 Nov 2006 10:31:14 -0600 Subject: [POWERPC] Revert "[POWERPC] Add powerpc get/set_rtc_time interface to new generic rtc class" This reverts commit 7a69af63e788a324d162201a0b23df41bcf158dd. As advised by David Brownell: http://marc.theaimsgroup.com/?l=linux-kernel&m=116387226902131&w=2 Signed-off-by: Kim Phillips Signed-off-by: Paul Mackerras --- include/asm-powerpc/time.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include/asm-powerpc/time.h') diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h index a78285010d62..4cff977ad526 100644 --- a/include/asm-powerpc/time.h +++ b/include/asm-powerpc/time.h @@ -39,10 +39,6 @@ extern void generic_calibrate_decr(void); extern void wakeup_decrementer(void); extern void snapshot_timebase(void); -#ifdef CONFIG_RTC_CLASS -extern int __init rtc_class_hookup(void); -#endif - /* Some sane defaults: 125 MHz timebase, 1GHz processor */ extern unsigned long ppc_proc_freq; #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) -- cgit v1.2.2