From 930bff882296c02ca81db108672ef4ca06c37db5 Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Sun, 25 Nov 2007 11:47:56 +0100 Subject: [MIPS] IP28: added cache barrier to assembly routines IP28 needs special treatment to avoid speculative accesses. gcc takes care for .c code, but for assembly code we need to do it manually. This is taken from Peter Fuersts IP28 patches. Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle --- include/asm-mips/asm.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include/asm-mips') diff --git a/include/asm-mips/asm.h b/include/asm-mips/asm.h index 12e17581b823..608cfcfbb3ea 100644 --- a/include/asm-mips/asm.h +++ b/include/asm-mips/asm.h @@ -398,4 +398,12 @@ symbol = value #define SSNOP sll zero, zero, 1 +#ifdef CONFIG_SGI_IP28 +/* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */ +#include +#define R10KCBARRIER(addr) cache Cache_Barrier, addr; +#else +#define R10KCBARRIER(addr) +#endif + #endif /* __ASM_ASM_H */ -- cgit v1.2.2