From 049b13c358f0187cf3c5003d5fb9848dbcb28bc3 Mon Sep 17 00:00:00 2001 From: Thiemo Seufer Date: Mon, 21 Feb 2005 11:44:31 +0000 Subject: Enable/disable irq's only if needed. Signed-off-by: Thiemo Seufer Signed-off-by: Ralf Baechle --- include/asm-mips/io.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'include/asm-mips/io.h') diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 039845f2e6b0..1f2fe11f4124 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -319,7 +319,8 @@ static inline type pfx##read##bwlq(volatile void __iomem *mem) \ else if (cpu_has_64bits) { \ unsigned long __flags; \ \ - local_irq_save(__flags); \ + if (irq) \ + local_irq_save(__flags); \ __asm__ __volatile__( \ ".set mips3" "\t\t# __readq" "\n\t" \ "ld %L0, %1" "\n\t" \ @@ -328,7 +329,8 @@ static inline type pfx##read##bwlq(volatile void __iomem *mem) \ ".set mips0" "\n" \ : "=r" (__val) \ : "m" (*__mem)); \ - local_irq_restore(__flags); \ + if (irq) \ + local_irq_restore(__flags); \ } else { \ __val = 0; \ BUG(); \ -- cgit v1.2.2 From 4912ba72d6e27d0f19ec062ffd00a8c0165a2f67 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Tue, 22 Feb 2005 21:49:17 +0000 Subject: Define mem_*() I/O accessory functions that preserve byte addresses. Add missing ____raw_*q() functions. Signed-off-by: Ralf Baechle --- include/asm-mips/io.h | 46 +++++++++++++++++++++++++++------------------- 1 file changed, 27 insertions(+), 19 deletions(-) (limited to 'include/asm-mips/io.h') diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 1f2fe11f4124..644c085e29f3 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -34,7 +34,7 @@ #undef CONF_SLOWDOWN_IO /* - * Raw operations are never swapped in software. Otoh values that raw + * Raw operations are never swapped in software. OTOH values that raw * operations are working on may or may not have been swapped by the bus * hardware. An example use would be for flash memory that's used for * execute in place. @@ -43,45 +43,53 @@ # define __raw_ioswabw(x) (x) # define __raw_ioswabl(x) (x) # define __raw_ioswabq(x) (x) +# define ____raw_ioswabq(x) (x) /* * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware; * less sane hardware forces software to fiddle with this... + * + * Regardless, if the host bus endianness mismatches that of PCI/ISA, then + * you can't have the numerical value of data and byte addresses within + * multibyte quantities both preserved at the same time. Hence two + * variations of functions: non-prefixed ones that preserve the value + * and prefixed ones that preserve byte addresses. The latters are + * typically used for moving raw data between a peripheral and memory (cf. + * string I/O functions), hence the "mem_" prefix. */ #if defined(CONFIG_SWAP_IO_SPACE) # define ioswabb(x) (x) +# define mem_ioswabb(x) (x) # ifdef CONFIG_SGI_IP22 /* * IP22 seems braindead enough to swap 16bits values in hardware, but * not 32bits. Go figure... Can't tell without documentation. */ # define ioswabw(x) (x) +# define mem_ioswabw(x) le16_to_cpu(x) # else # define ioswabw(x) le16_to_cpu(x) +# define mem_ioswabw(x) (x) # endif # define ioswabl(x) le32_to_cpu(x) +# define mem_ioswabl(x) (x) # define ioswabq(x) le64_to_cpu(x) +# define mem_ioswabq(x) (x) #else # define ioswabb(x) (x) +# define mem_ioswabb(x) (x) # define ioswabw(x) (x) +# define mem_ioswabw(x) cpu_to_le16(x) # define ioswabl(x) (x) +# define mem_ioswabl(x) cpu_to_le32(x) # define ioswabq(x) (x) +# define mem_ioswabq(x) cpu_to_le32(x) #endif -/* - * Native bus accesses never swapped. - */ -#define bus_ioswabb(x) (x) -#define bus_ioswabw(x) (x) -#define bus_ioswabl(x) (x) -#define bus_ioswabq(x) (x) - -#define __bus_ioswabq bus_ioswabq - #define IO_SPACE_LIMIT 0xffff /* @@ -388,15 +396,15 @@ __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO) #define BUILDIO(bwlq, type) \ \ -__BUILD_MEMORY_PFX(, bwlq, type) \ __BUILD_MEMORY_PFX(__raw_, bwlq, type) \ -__BUILD_MEMORY_PFX(bus_, bwlq, type) \ +__BUILD_MEMORY_PFX(, bwlq, type) \ +__BUILD_MEMORY_PFX(mem_, bwlq, type) \ __BUILD_IOPORT_PFX(, bwlq, type) \ -__BUILD_IOPORT_PFX(__raw_, bwlq, type) +__BUILD_IOPORT_PFX(mem_, bwlq, type) #define __BUILDIO(bwlq, type) \ \ -__BUILD_MEMORY_SINGLE(__bus_, bwlq, type, 0) +__BUILD_MEMORY_SINGLE(____raw_, bwlq, type, 0) BUILDIO(b, u8) BUILDIO(w, u16) @@ -424,7 +432,7 @@ static inline void writes##bwlq(volatile void __iomem *mem, void *addr, \ volatile type *__addr = addr; \ \ while (count--) { \ - __raw_write##bwlq(*__addr, mem); \ + mem_write##bwlq(*__addr, mem); \ __addr++; \ } \ } \ @@ -435,7 +443,7 @@ static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ volatile type *__addr = addr; \ \ while (count--) { \ - *__addr = __raw_read##bwlq(mem); \ + *__addr = mem_read##bwlq(mem); \ __addr++; \ } \ } @@ -448,7 +456,7 @@ static inline void outs##bwlq(unsigned long port, void *addr, \ volatile type *__addr = addr; \ \ while (count--) { \ - __raw_out##bwlq(*__addr, port); \ + mem_out##bwlq(*__addr, port); \ __addr++; \ } \ } \ @@ -459,7 +467,7 @@ static inline void ins##bwlq(unsigned long port, void *addr, \ volatile type *__addr = addr; \ \ while (count--) { \ - *__addr = __raw_in##bwlq(port); \ + *__addr = mem_in##bwlq(port); \ __addr++; \ } \ } -- cgit v1.2.2 From 0f04afb59565c3029563b9a79b3513c9f3327a27 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 1 Mar 2005 10:38:58 +0000 Subject: ISOify. Signed-off-by: Ralf Baechle --- include/asm-mips/io.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/asm-mips/io.h') diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 644c085e29f3..e03cb77b131c 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -202,10 +202,10 @@ extern unsigned long isa_slot_offset; */ #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) -extern void * __ioremap(phys_t offset, phys_t size, unsigned long flags); +extern void __iomem * __ioremap(phys_t offset, phys_t size, unsigned long flags); extern void __iounmap(volatile void __iomem *addr); -static inline void * __ioremap_mode(phys_t offset, unsigned long size, +static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, unsigned long flags) { if (cpu_has_64bit_addresses) { -- cgit v1.2.2 From fe00f943e0ef98b4057abcc2940d631a975b43cd Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 1 Mar 2005 19:22:29 +0000 Subject: Sparseify MIPS. Signed-off-by: Ralf Baechle --- include/asm-mips/io.h | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'include/asm-mips/io.h') diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index e03cb77b131c..cee0562a7851 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -25,6 +25,7 @@ #include #include #include +#include #include @@ -217,7 +218,7 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, */ if (flags == _CACHE_UNCACHED) base = (u64) IO_BASE; - return (void *) (unsigned long) (base + offset); + return (void __iomem *) (unsigned long) (base + offset); } return __ioremap(offset, size, flags); @@ -486,9 +487,18 @@ BUILDSTRING(q, u64) /* Depends on MIPS II instruction set */ #define mmiowb() asm volatile ("sync" ::: "memory") -#define memset_io(a,b,c) memset((void *)(a),(b),(c)) -#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) -#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) +static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) +{ + memset((void __force *) addr, val, count); +} +static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) +{ + memcpy(dst, (void __force *) src, count); +} +static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) +{ + memcpy((void __force *) dst, src, count); +} /* * Memory Mapped I/O -- cgit v1.2.2 From ecba36dad8b635174bcbc32998a019b6d1e6f12f Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 18 Apr 2005 14:54:43 +0000 Subject: Fix a few build warnings. Signed-off-by: Ralf Baechle --- include/asm-mips/io.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/asm-mips/io.h') diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index cee0562a7851..3b4d97d80643 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -451,10 +451,10 @@ static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ #define __BUILD_IOPORT_STRING(bwlq, type) \ \ -static inline void outs##bwlq(unsigned long port, void *addr, \ +static inline void outs##bwlq(unsigned long port, const void *addr, \ unsigned int count) \ { \ - volatile type *__addr = addr; \ + const volatile type *__addr = addr; \ \ while (count--) { \ mem_out##bwlq(*__addr, port); \ -- cgit v1.2.2 From c3455b0efc2b5b1bdc755602f77ce7f43725bf61 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Thu, 30 Jun 2005 10:48:40 +0000 Subject: Inline ioremap() calls for constant addresses that map to KSEG1. Signed-off-by: Ralf Baechle --- include/asm-mips/io.h | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) (limited to 'include/asm-mips/io.h') diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 3b4d97d80643..42f80782acd2 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -27,6 +27,7 @@ #include #include +#include #include /* @@ -209,6 +210,8 @@ extern void __iounmap(volatile void __iomem *addr); static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, unsigned long flags) { +#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL)) + if (cpu_has_64bit_addresses) { u64 base = UNCAC_BASE; @@ -219,9 +222,29 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, if (flags == _CACHE_UNCACHED) base = (u64) IO_BASE; return (void __iomem *) (unsigned long) (base + offset); + } else if (__builtin_constant_p(offset) && + __builtin_constant_p(size) && __builtin_constant_p(flags)) { + phys_t phys_addr, last_addr; + + phys_addr = fixup_bigphys_addr(offset, size); + + /* Don't allow wraparound or zero size. */ + last_addr = phys_addr + size - 1; + if (!size || last_addr < phys_addr) + return NULL; + + /* + * Map uncached objects in the low 512MB of address + * space using KSEG1. + */ + if (__IS_LOW512(phys_addr) && __IS_LOW512(last_addr) && + flags == _CACHE_UNCACHED) + return (void __iomem *)CKSEG1ADDR(phys_addr); } return __ioremap(offset, size, flags); + +#undef __IS_LOW512 } /* @@ -273,12 +296,16 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, static inline void iounmap(volatile void __iomem *addr) { - if (cpu_has_64bit_addresses) +#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1) + + if (cpu_has_64bit_addresses || + (__builtin_constant_p(addr) && __IS_KSEG1(addr))) return; __iounmap(addr); -} +#undef __IS_KSEG1 +} #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \ \ -- cgit v1.2.2 From 9d58f302ca370c720fa47cb419f0b33eaa1a1132 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 23 Sep 2005 20:02:38 +0000 Subject: Glue again after removal of BUILD_BUG(). Signed-off-by: Ralf Baechle --- include/asm-mips/io.h | 57 +++++++++++++++++++++++++++++---------------------- 1 file changed, 32 insertions(+), 25 deletions(-) (limited to 'include/asm-mips/io.h') diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 42f80782acd2..3061870b7f6c 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -387,11 +387,11 @@ static inline void pfx##out##bwlq##p(type val, unsigned long port) \ \ __val = pfx##ioswab##bwlq(val); \ \ - if (sizeof(type) != sizeof(u64)) { \ - *__addr = __val; \ - slow; \ - } else \ - BUILD_BUG(); \ + /* Really, we want this to be atomic */ \ + BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ + \ + *__addr = __val; \ + slow; \ } \ \ static inline type pfx##in##bwlq##p(unsigned long port) \ @@ -402,13 +402,10 @@ static inline type pfx##in##bwlq##p(unsigned long port) \ port = __swizzle_addr_##bwlq(port); \ __addr = (void *)(mips_io_port_base + port); \ \ - if (sizeof(type) != sizeof(u64)) { \ - __val = *__addr; \ - slow; \ - } else { \ - __val = 0; \ - BUILD_BUG(); \ - } \ + BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ + \ + __val = *__addr; \ + slow; \ \ return pfx##ioswab##bwlq(__val); \ } @@ -417,28 +414,36 @@ static inline type pfx##in##bwlq##p(unsigned long port) \ \ __BUILD_MEMORY_SINGLE(bus, bwlq, type, 1) -#define __BUILD_IOPORT_PFX(bus, bwlq, type) \ - \ -__BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) \ -__BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO) - -#define BUILDIO(bwlq, type) \ +#define BUILDIO_MEM(bwlq, type) \ \ __BUILD_MEMORY_PFX(__raw_, bwlq, type) \ __BUILD_MEMORY_PFX(, bwlq, type) \ __BUILD_MEMORY_PFX(mem_, bwlq, type) \ -__BUILD_IOPORT_PFX(, bwlq, type) \ -__BUILD_IOPORT_PFX(mem_, bwlq, type) + +BUILDIO_MEM(b, u8) +BUILDIO_MEM(w, u16) +BUILDIO_MEM(l, u32) +BUILDIO_MEM(q, u64) + +#define __BUILD_IOPORT_PFX(bus, bwlq, type) \ + __BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) \ + __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO) + +#define BUILDIO_IOPORT(bwlq, type) \ + __BUILD_IOPORT_PFX(, bwlq, type) \ + __BUILD_IOPORT_PFX(mem_, bwlq, type) + +BUILDIO_IOPORT(b, u8) +BUILDIO_IOPORT(w, u16) +BUILDIO_IOPORT(l, u32) +#ifdef CONFIG_64BIT +BUILDIO_IOPORT(q, u64) +#endif #define __BUILDIO(bwlq, type) \ \ __BUILD_MEMORY_SINGLE(____raw_, bwlq, type, 0) -BUILDIO(b, u8) -BUILDIO(w, u16) -BUILDIO(l, u32) -BUILDIO(q, u64) - __BUILDIO(q, u64) #define readb_relaxed readb @@ -508,7 +513,9 @@ __BUILD_IOPORT_STRING(bwlq, type) BUILDSTRING(b, u8) BUILDSTRING(w, u16) BUILDSTRING(l, u32) +#ifdef CONFIG_64BIT BUILDSTRING(q, u64) +#endif /* Depends on MIPS II instruction set */ -- cgit v1.2.2