From e39d5ce13201b18a3ae458c023fc7b4cb33263e8 Mon Sep 17 00:00:00 2001 From: Jinyoung Jeon Date: Sat, 22 Dec 2012 17:49:28 +0900 Subject: drm/exynos: fix incorrect interrupt induced by m2m operation. This patch fixes incorrect interrupt induced by m2m operation. the m2m operation calls s/w reset every frame but there is the case that the interrupt to m2m operation occures after s/w reset sometimes. So this patch makes dma and capture operations stop at s/w reset to avoid incorrect interrupt. Signed-off-by: Jinyoung Jeon Signed-off-by: Eunchul Kim Signed-off-by: Inki Dae --- drivers/gpu/drm/exynos/exynos_drm_fimc.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'drivers') diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimc.c b/drivers/gpu/drm/exynos/exynos_drm_fimc.c index a99ceefcc286..9f52b7faa4b3 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimc.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimc.c @@ -169,10 +169,23 @@ static void fimc_sw_reset(struct fimc_context *ctx) DRM_DEBUG_KMS("%s\n", __func__); + /* stop dma operation */ + cfg = fimc_read(EXYNOS_CISTATUS); + if (EXYNOS_CISTATUS_GET_ENVID_STATUS(cfg)) { + cfg = fimc_read(EXYNOS_MSCTRL); + cfg &= ~EXYNOS_MSCTRL_ENVID; + fimc_write(cfg, EXYNOS_MSCTRL); + } + cfg = fimc_read(EXYNOS_CISRCFMT); cfg |= EXYNOS_CISRCFMT_ITU601_8BIT; fimc_write(cfg, EXYNOS_CISRCFMT); + /* disable image capture */ + cfg = fimc_read(EXYNOS_CIIMGCPT); + cfg &= ~(EXYNOS_CIIMGCPT_IMGCPTEN_SC | EXYNOS_CIIMGCPT_IMGCPTEN); + fimc_write(cfg, EXYNOS_CIIMGCPT); + /* s/w reset */ cfg = fimc_read(EXYNOS_CIGCTRL); cfg |= (EXYNOS_CIGCTRL_SWRST); -- cgit v1.2.2