/*
* rt5677.c -- RT5677 ALSA SoC audio codec driver
*
* Copyright 2013 Realtek Semiconductor Corp.
* Author: Oder Chiou <oder_chiou@realtek.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/fs.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/regmap.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/firmware.h>
#include <linux/property.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>
#include <sound/tlv.h>
#include "rl6231.h"
#include "rt5677.h"
#include "rt5677-spi.h"
#define RT5677_DEVICE_ID 0x6327
#define RT5677_PR_RANGE_BASE (0xff + 1)
#define RT5677_PR_SPACING 0x100
#define RT5677_PR_BASE (RT5677_PR_RANGE_BASE + (0 * RT5677_PR_SPACING))
static const struct regmap_range_cfg rt5677_ranges[] = {
{
.name = "PR",
.range_min = RT5677_PR_BASE,
.range_max = RT5677_PR_BASE + 0xfd,
.selector_reg = RT5677_PRIV_INDEX,
.selector_mask = 0xff,
.selector_shift = 0x0,
.window_start = RT5677_PRIV_DATA,
.window_len = 0x1,
},
};
static const struct reg_sequence init_list[] = {
{RT5677_ASRC_12, 0x0018},
{RT5677_PR_BASE + 0x3d, 0x364d},
{RT5677_PR_BASE + 0x17, 0x4fc0},
{RT5677_PR_BASE + 0x13, 0x0312},
{RT5677_PR_BASE + 0x1e, 0x0000},
{RT5677_PR_BASE + 0x12, 0x0eaa},
{RT5677_PR_BASE + 0x14, 0x018a},
{RT5677_PR_BASE + 0x15, 0x0490},
{RT5677_PR_BASE + 0x38, 0x0f71},
{RT5677_PR_BASE + 0x39, 0x0f71},
};
#define RT5677_INIT_REG_LEN ARRAY_SIZE(init_list)
static const struct reg_default rt5677_reg[] = {
{RT5677_RESET , 0x0000},
{RT5677_LOUT1 , 0xa800},
{RT5677_IN1 , 0x0000},
{RT5677_MICBIAS , 0x0000},
{RT5677_SLIMBUS_PARAM , 0x0000},
{RT5677_SLIMBUS_RX , 0x0000},
{RT5677_SLIMBUS_CTRL , 0x0000},
{RT5677_SIDETONE_CTRL , 0x000b},
{RT5677_ANA_DAC1_2_3_SRC , 0x0000},
{RT5677_IF_DSP_DAC3_4_MIXER , 0x1111},
{RT5677_DAC4_DIG_VOL , 0xafaf},
{RT5677_DAC3_DIG_VOL , 0xafaf},
{RT5677_DAC1_DIG_VOL , 0xafaf},
{RT5677_DAC2_DIG_VOL , 0xafaf},
{RT5677_IF_DSP_DAC2_MIXER , 0x0011},
{RT5677_STO1_ADC_DIG_VOL , 0x2f2f},
{RT5677_MONO_ADC_DIG_VOL , 0x2f2f},
{RT5677_STO1_2_ADC_BST , 0x0000},
{RT5677_STO2_ADC_DIG_VOL , 0x2f2f},
{RT5677_ADC_BST_CTRL2 , 0x0000},
{RT5677_STO3_4_ADC_BST , 0x0000},
{RT5677_STO3_ADC_DIG_VOL , 0x2f2f},
{RT5677_STO4_ADC_DIG_VOL , 0x2f2f},
{RT5677_STO4_ADC_MIXER , 0xd4c0},
{RT5677_STO3_ADC_MIXER , 0xd4c0},
{RT5677_STO2_ADC_MIXER , 0xd4c0},
{RT5677_STO1_ADC_MIXER , 0xd4c0},
{RT5677_MONO_ADC_MIXER , 0xd4d1},
{RT5677_ADC_IF_DSP_DAC1_MIXER , 0x8080},
{RT5677_STO1_DAC_MIXER , 0xaaaa},
{RT5677_MONO_DAC_MIXER , 0xaaaa},
{RT5677_DD1_MIXER , 0xaaaa},
{RT5677_DD2_MIXER , 0xaaaa},
{RT5677_IF3_DATA , 0x0000},
{RT5677_IF4_DATA , 0x0000},
{RT5677_PDM_OUT_CTRL , 0x8888},
{RT5677_PDM_DATA_CTRL1 , 0x0000},
{RT5677_PDM_DATA_CTRL2 , 0x0000},
{RT5677_PDM1_DATA_CTRL2 , 0x0000},
{RT5677_PDM1_DATA_CTRL3 , 0x0000},
{RT5677_PDM1_DATA_CTRL4 , 0x0000},
{RT5677_PDM2_DATA_CTRL2 , 0x0000},
{RT5677_PDM2_DATA_CTRL3 , 0x0000},
{RT5677_PDM2_DATA_CTRL4 , 0x0000},
{RT5677_TDM1_CTRL1 , 0x0300},
{RT5677_TDM1_CTRL2 , 0x0000},
{RT5677_TDM1_CTRL3 , 0x4000},
{RT5677_TDM1_CTRL4 , 0x0123},
{RT5677_TDM1_CTRL5 , 0x4567},
{RT5677_TDM2_CTRL1 , 0x0300},
{RT5677_TDM2_CTRL2 , 0x0000},
{RT5677_TDM2_CTRL3 , 0x4000},
{RT5677_TDM2_CTRL4 , 0x0123},
{RT5677_TDM2_CTRL5 , 0x4567},
{RT5677_I2C_MASTER_CTRL1 , 0x0001},
{RT5677_I2C_MASTER_CTRL2 , 0x0000},
{RT5677_I2C_MASTER_CTRL3 , 0x0000},
{RT5677_I2C_MASTER_CTRL4 , 0x0000},
{RT5677_I2C_MASTER_CTRL5 , 0x0000},
{RT5677_I2C_MASTER_CTRL6 , 0x0000},
{RT5677_I2C_MASTER_CTRL7 , 0x0000},
{RT5677_I2C_MASTER_CTRL8 , 0x0000},
{RT5677_DMIC_CTRL1 , 0x1505},
{RT5677_DMIC_CTRL2 , 0x0055},
{RT5677_HAP_GENE_CTRL1 , 0x0111},
{RT5677_HAP_GENE_CTRL2 , 0x0064},
{RT5677_HAP_GENE_CTRL3 , 0xef0e},
{RT5677_HAP_GENE_CTRL4 , 0xf0f0},
{RT5677_HAP_GENE_CTRL5 , 0xef0e},
{RT5677_HAP_GENE_CTRL6 , 0xf0f0},
{RT5677_HAP_GENE_CTRL7 , 0xef0e},
{RT5677_HAP_GENE_CTRL8 , 0xf0f0},
{RT5677_HAP_GENE_CTRL9 , 0xf000},
{RT5677_HAP_GENE_CTRL10 , 0x0000},
{RT5677_PWR_DIG1 , 0x0000},
{RT5677_PWR_DIG2 , 0x0000},
{RT5677_PWR_ANLG1 , 0x0055},
{RT5677_PWR_ANLG2 , 0x0000},
{RT5677_PWR_DSP1 , 0x0001},
{RT5677_PWR_DSP_ST , 0x0000},
{RT5677_PWR_DSP2 , 0x0000},
{RT5677_ADC_DAC_HPF_CTRL1 , 0x0e00},
{RT5677_PRIV_INDEX , 0x0000},
{RT5677_PRIV_DATA , 0x0000},
{RT5677_I2S4_SDP , 0x8000},
{RT5677_I2S1_SDP , 0x8000},
{RT5677_I2S2_SDP , 0x8000},
{RT5677_I2S3_SDP , 0x8000},
{RT5677_CLK_TREE_CTRL1 , 0x1111},
{RT5677_CLK_TREE_CTRL2 , 0x1111},
{RT5677_CLK_TREE_CTRL3 , 0x0000},
{RT5677_PLL1_CTRL1 , 0x0000},
{RT5677_PLL1_CTRL2 , 0x0000},
{RT5677_PLL2_CTRL1 , 0x0c60},
{RT5677_PLL2_CTRL2 , 0x2000},
{RT5677_GLB_CLK1 , 0x0000},
{RT5677_GLB_CLK2 , 0x0000},
{RT5677_ASRC_1 , 0x0000},
{RT5677_ASRC_2 , 0x0000},
{RT5677_ASRC_3 , 0x0000},
{RT5677_ASRC_4 , 0x0000},
{RT5677_ASRC_5 , 0x0000},
{RT5677_ASRC_6 , 0x0000},
{RT5677_ASRC_7 , 0x0000},
{RT5677_ASRC_8 , 0x0000},
{RT5677_ASRC_9 , 0x0000},
{RT5677_ASRC_10 , 0x0000},
{RT5677_ASRC_11 , 0x0000},
{RT5677_ASRC_12 , 0x0018},
{RT5677_ASRC_13 , 0x0000},
{RT5677_ASRC_14 , 0x0000},
{RT5677_ASRC_15 , 0x0000},
{RT5677_ASRC_16 , 0x0000},
{RT5677_ASRC_17 , 0x0000},
{RT5677_ASRC_18 , 0x0000},
{RT5677_ASRC_19 , 0x0000},
{RT5677_ASRC_20 , 0x0000},
{RT5677_ASRC_21 , 0x000c},
{RT5677_ASRC_22 , 0x0000},
{RT5677_ASRC_23 , 0x0000},
{RT5677_VAD_CTRL1 , 0x2184},
{RT5677_VAD_CTRL2 , 0x010a},
{RT5677_VAD_CTRL3 , 0x0aea},
{RT5677_VAD_CTRL4 , 0x000c},
{RT5677_VAD_CTRL5 , 0x0000},
{RT5677_DSP_INB_CTRL1 , 0x0000},
{RT5677_DSP_INB_CTRL2 , 0x0000},
{RT5677_DSP_IN_OUTB_CTRL , 0x0000},
{RT5677_DSP_OUTB0_1_DIG_VOL , 0x2f2f},
{RT5677_DSP_OUTB2_3_DIG_VOL , 0x2f2f},
{RT5677_DSP_OUTB4_5_DIG_VOL , 0x2f2f},
{RT5677_DSP_OUTB6_7_DIG_VOL , 0x2f2f},
{RT5677_ADC_EQ_CTRL1 , 0x6000},
{RT5677_ADC_EQ_CTRL2 , 0x0000},
{RT5677_EQ_CTRL1 , 0xc000},
{RT5677_EQ_CTRL2 , 0x0000},
{RT5677_EQ_CTRL3 , 0x0000},
{RT5677_SOFT_VOL_ZERO_CROSS1 , 0x0009},
{RT5677_JD_CTRL1 , 0x0000},
{RT5677_JD_CTRL2 , 0x0000},
{RT5677_JD_CTRL3 , 0x0000},
{RT5677_IRQ_CTRL1 , 0x0000},
{RT5677_IRQ_CTRL2 , 0x0000},
{RT5677_GPIO_ST , 0x0000},
{RT5677_GPIO_CTRL1 , 0x0000},
{RT5677_GPIO_CTRL2 , 0x0000},
{RT5677_GPIO_CTRL3 , 0x0000},
{RT5677_STO1_ADC_HI_FILTER1 , 0xb320},
{RT5677_STO1_ADC_HI_FILTER2 , 0x0000},
{RT5677_MONO_ADC_HI_FILTER1 , 0xb300},
{RT5677_MONO_ADC_HI_FILTER2 , 0x0000},
{RT5677_STO2_ADC_HI_FILTER1 , 0xb300},
{RT5677_STO2_ADC_HI_FILTER2 , 0x0000},
{RT5677_STO3_ADC_HI_FILTER1 , 0xb300},
{RT5677_STO3_ADC_HI_FILTER2 , 0x0000},
{RT5677_STO4_ADC_HI_FILTER1 , 0xb300},
{RT5677_STO4_ADC_HI_FILTER2 , 0x0000},
{RT5677_MB_DRC_CTRL1 , 0x0f20},
{RT5677_DRC1_CTRL1 , 0x001f},
{RT5677_DRC1_CTRL2 , 0x020c},
{RT5677_DRC1_CTRL3 , 0x1f00},
{RT5677_DRC1_CTRL4 , 0x0000},
{RT5677_DRC1_CTRL5 , 0x0000},
{RT5677_DRC1_CTRL6 , 0x0029},
{RT5677_DRC2_CTRL1 , 0x001f},
{RT5677_DRC2_CTRL2 , 0x020c},
{RT5677_DRC2_CTRL3 , 0x1f00},
{RT5677_DRC2_CTRL4 , 0x0000},
{RT5677_DRC2_CTRL5 , 0x0000},
{RT5677_DRC2_CTRL6 , 0x0029},
{RT5677_DRC1_HL_CTRL1 , 0x8000},
{RT5677_DRC1_HL_CTRL2 , 0x0200},
{RT5677_DRC2_HL_CTRL1 , 0x8000},
{RT5677_DRC2_HL_CTRL2 , 0x0200},
{RT5677_DSP_INB1_SRC_CTRL1 , 0x5800},
{RT5677_DSP_INB1_SRC_CTRL2 , 0x0000},
{RT5677_DSP_INB1_SRC_CTRL3 , 0x0000},
{RT5677_DSP_INB1_SRC_CTRL4 , 0x0800},
{RT5677_DSP_INB2_SRC_CTRL1 , 0x5800},
{RT5677_DSP_INB2_SRC_CTRL2 , 0x0000},
{RT5677_DSP_INB2_SRC_CTRL3 , 0x0000},
{RT5677_DSP_INB2_SRC_CTRL4 , 0x0800},
{RT5677_DSP_INB3_SRC_CTRL1 , 0x5800},
{RT5677_DSP_INB3_SRC_CTRL2 , 0x0000},
{RT5677_DSP_INB3_SRC_CTRL3 , 0x0000},
{RT5677_DSP_INB3_SRC_CTRL4 , 0x0800},
{RT5677_DSP_OUTB1_SRC_CTRL1 , 0x5800},
{RT5677_DSP_OUTB1_SRC_CTRL2 , 0x0000},
{RT5677_DSP_OUTB1_SRC_CTRL3 , 0x0000},
{RT5677_DSP_OUTB1_SRC_CTRL4 , 0x0800},
{RT5677_DSP_OUTB2_SRC_CTRL1 , 0x5800},
{RT5677_DSP_OUTB2_SRC_CTRL2 , 0x0000},
{RT5677_DSP_OUTB2_SRC_CTRL3 , 0x0000},
{RT5677_DSP_OUTB2_SRC_CTRL4 , 0x0800},
{RT5677_DSP_OUTB_0123_MIXER_CTRL, 0xfefe},
{RT5677_DSP_OUTB_45_MIXER_CTRL , 0xfefe},
{RT5677_DSP_OUTB_67_MIXER_CTRL , 0xfefe},
{RT5677_DIG_MISC , 0x0000},
{RT5677_GEN_CTRL1 , 0x0000},
{RT5677_GEN_CTRL2 , 0x0000},
{RT5677_VENDOR_ID , 0x0000},
{RT5677_VENDOR_ID1 , 0x10ec},
{RT5677_VENDOR_ID2 , 0x6327},
};
static bool rt5677_volatile_register(struct device *dev, unsigned int reg)
{
int i;
for (i = 0; i < ARRAY_SIZE(rt5677_ranges); i++) {
if (reg >= rt5677_ranges[i].range_min &&
reg <= rt5677_ranges[i].range_max) {
return true;
}
}
switch (reg) {
case RT5677_RESET:
case RT5677_SLIMBUS_PARAM:
case RT5677_PDM_DATA_CTRL1:
case RT5677_PDM_DATA_CTRL2:
case RT5677_PDM1_DATA_CTRL4:
case RT5677_PDM2_DATA_CTRL4:
case RT5677_I2C_MASTER_CTRL1:
case RT5677_I2C_MASTER_CTRL7:
case RT5677_I2C_MASTER_CTRL8:
case RT5677_HAP_GENE_CTRL2:
case RT5677_PWR_DSP_ST:
case RT5677_PRIV_DATA:
case RT5677_ASRC_22:
case RT5677_ASRC_23:
case RT5677_VAD_CTRL5:
case RT5677_ADC_EQ_CTRL1:
case RT5677_EQ_CTRL1:
case RT5677_IRQ_CTRL1:
case RT5677_IRQ_CTRL2:
case RT5677_GPIO_ST:
case RT5677_DSP_INB1_SRC_CTRL4:
case RT5677_DSP_INB2_SRC_CTRL4:
case RT5677_DSP_INB3_SRC_CTRL4:
case RT5677_DSP_OUTB1_SRC_CTRL4:
case RT5677_DSP_OUTB2_SRC_CTRL4:
case RT5677_VENDOR_ID:
case RT5677_VENDOR_ID1:
case RT5677_VENDOR_ID2:
return true;
default:
return false;
}
}
static bool rt5677_readable_register(struct device *dev, unsigned int reg)
{
int i;
for (i = 0; i < ARRAY_SIZE(rt5677_ranges); i++) {
if (reg >= rt5677_ranges[i].range_min &&
reg <= rt5677_ranges[i].range_max) {
return true;
}
}
switch (reg) {
case RT5677_RESET:
case RT5677_LOUT1:
case RT5677_IN1:
case RT5677_MICBIAS:
case RT5677_SLIMBUS_PARAM:
case RT5677_SLIMBUS_RX:
case RT5677_SLIMBUS_CTRL:
case RT5677_SIDETONE_CTRL:
case RT5677_ANA_DAC1_2_3_SRC:
case RT5677_IF_DSP_DAC3_4_MIXER:
case RT5677_DAC4_DIG_VOL:
case RT5677_DAC3_DIG_VOL:
case RT5677_DAC1_DIG_VOL:
case RT5677_DAC2_DIG_VOL:
case RT5677_IF_DSP_DAC2_MIXER:
case RT5677_STO1_ADC_DIG_VOL:
case RT5677_MONO_ADC_DIG_VOL:
case RT5677_STO1_2_ADC_BST:
case RT5677_STO2_ADC_DIG_VOL:
case RT5677_ADC_BST_CTRL2:
case RT5677_STO3_4_ADC_BST:
case RT5677_STO3_ADC_DIG_VOL:
case RT5677_STO4_ADC_DIG_VOL:
case RT5677_STO4_ADC_MIXER:
case RT5677_STO3_ADC_MIXER:
case RT5677_STO2_ADC_MIXER:
case RT5677_STO1_ADC_MIXER:
case RT5677_MONO_ADC_MIXER:
case RT5677_ADC_IF_DSP_DAC1_MIXER:
case RT5677_STO1_DAC_MIXER:
case RT5677_MONO_DAC_MIXER:
case RT5677_DD1_MIXER:
case RT5677_DD2_MIXER:
case RT5677_IF3_DATA:
case RT5677_IF4_DATA:
case RT5677_PDM_OUT_CTRL:
case RT5677_PDM_DATA_CTRL1:
case RT5677_PDM_DATA_CTRL2:
case RT5677_PDM1_DATA_CTRL2:
case RT5677_PDM1_DATA_CTRL3:
case RT5677_PDM1_DATA_CTRL4:
case RT5677_PDM2_DATA_CTRL2:
case RT5677_PDM2_DATA_CTRL3:
case RT5677_PDM2_DATA_CTRL4:
case RT5677_TDM1_CTRL1:
case RT5677_TDM1_CTRL2:
case RT5677_TDM1_CTRL3:
case RT5677_TDM1_CTRL4:
case RT5677_TDM1_CTRL5:
case RT5677_TDM2_CTRL1:
case RT5677_TDM2_CTRL2:
case RT5677_TDM2_CTRL3:
case RT5677_TDM2_CTRL4:
case RT5677_TDM2_CTRL5:
case RT5677_I2C_MASTER_CTRL1:
case RT5677_I2C_MASTER_CTRL2:
case RT5677_I2C_MASTER_CTRL3:
case RT5677_I2C_MASTER_CTRL4:
case RT5677_I2C_MASTER_CTRL5:
case RT5677_I2C_MASTER_CTRL6:
case RT5677_I2C_MASTER_CTRL7:
case RT5677_I2C_MASTER_CTRL8:
case RT5677_DMIC_CTRL1:
case RT5677_DMIC_CTRL2:
case RT5677_HAP_GENE_CTRL1:
case RT5677_HAP_GENE_CTRL2:
case RT5677_HAP_GENE_CTRL3:
case RT5677_HAP_GENE_CTRL4:
case RT5677_HAP_GENE_CTRL5:
case RT5677_HAP_GENE_CTRL6:
case RT5677_HAP_GENE_CTRL7:
case RT5677_HAP_GENE_CTRL8:
case RT5677_HAP_GENE_CTRL9:
case RT5677_HAP_GENE_CTRL10:
case RT5677_PWR_DIG1:
case RT5677_PWR_DIG2:
case RT5677_PWR_ANLG1:
case RT5677_PWR_ANLG2:
case RT5677_PWR_DSP1:
case RT5677_PWR_DSP_ST:
case RT5677_PWR_DSP2:
case RT5677_ADC_DAC_HPF_CTRL1:
case RT5677_PRIV_INDEX:
case RT5677_PRIV_DATA:
case RT5677_I2S4_SDP:
case RT5677_I2S1_SDP:
case RT5677_I2S2_SDP:
case RT5677_I2S3_SDP:
case RT5677_CLK_TREE_CTRL1:
case RT5677_CLK_TREE_CTRL2:
case RT5677_CLK_TREE_CTRL3:
case RT5677_PLL1_CTRL1:
case RT5677_PLL1_CTRL2:
case RT5677_PLL2_CTRL1:
case RT5677_PLL2_CTRL2:
case RT5677_GLB_CLK1:
case RT5677_GLB_CLK2:
case RT5677_ASRC_1:
case RT5677_ASRC_2:
case RT5677_ASRC_3:
case RT5677_ASRC_4:
case RT5677_ASRC_5:
case RT5677_ASRC_6:
case RT5677_ASRC_7:
case RT5677_ASRC_8:
case RT5677_ASRC_9:
case RT5677_ASRC_10:
case RT5677_ASRC_11:
case RT5677_ASRC_12:
case RT5677_ASRC_13:
case RT5677_ASRC_14:
case RT5677_ASRC_15:
case RT5677_ASRC_16:
case RT5677_ASRC_17:
case RT5677_ASRC_18:
case RT5677_ASRC_19:
case RT5677_ASRC_20:
case RT5677_ASRC_21:
case RT5677_ASRC_22:
case RT5677_ASRC_23:
case RT5677_VAD_CTRL1:
case RT5677_VAD_CTRL2:
case RT5677_VAD_CTRL3:
case RT5677_VAD_CTRL4:
case RT5677_VAD_CTRL5:
case RT5677_DSP_INB_CTRL1:
case RT5677_DSP_INB_CTRL2:
case RT5677_DSP_IN_OUTB_CTRL:
| 