From 79e57d32fe6d2d5bd38378f6dccfdbe6bd1d1dab Mon Sep 17 00:00:00 2001 From: Stephen Hemminger Date: Mon, 19 Sep 2005 15:42:33 -0700 Subject: [PATCH] sky2: fix FIFO DMA alignment problems The Yukon2 chip FIFO has a problem recovering from a pause frame if the receive buffer is not aligned. The workaround is to just leave receive buffer at original alignment, which will make IP header unaligned. Rework receive logic for clarity. Need to ignore receive overrun interrupts (or mac hangs). These fixes make the sky2 driver generally usable. Signed-off-by: Stephen Hemminger Signed-off-by: Jeff Garzik --- drivers/net/sky2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/net/sky2.h') diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index 9256303acf76..1a8a004e1060 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h @@ -1679,7 +1679,7 @@ enum { GM_IS_RX_FF_OR = 1<<1, /* Receive FIFO Overrun */ GM_IS_RX_COMPL = 1<<0, /* Frame Reception Complete */ -#define GMAC_DEF_MSK (GM_IS_TX_FF_UR|GM_IS_RX_FF_OR) +#define GMAC_DEF_MSK GM_IS_TX_FF_UR /* GMAC_LINK_CTRL 16 bit GMAC Link Control Reg (YUKON only) */ /* Bits 15.. 2: reserved */ -- cgit v1.2.2