From 7e8b60faea972604c315634cff62d44803731ea9 Mon Sep 17 00:00:00 2001 From: Andrew Lutomirski Date: Sun, 8 Nov 2009 13:49:51 -0500 Subject: drm/i915: restore render clock gating on resume Rather than restoring just a few clock gating registers on resume, just reinitialize the whole thing. Signed-off-by: Andy Lutomirski [anholt: Fixed up for RC6 support landed since the patch was written] Signed-off-by: Eric Anholt --- drivers/gpu/drm/i915/intel_display.c | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) (limited to 'drivers/gpu/drm/i915/intel_display.c') diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 902cc5386f19..279dc96e3eb2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4584,28 +4584,33 @@ void intel_init_clock_gating(struct drm_device *dev) struct drm_i915_gem_object *obj_priv; int ret; - pwrctx = drm_gem_object_alloc(dev, 4096); - if (!pwrctx) { - DRM_DEBUG("failed to alloc power context, RC6 disabled\n"); - goto out; - } + if (dev_priv->pwrctx) { + obj_priv = dev_priv->pwrctx->driver_private; + } else { + pwrctx = drm_gem_object_alloc(dev, 4096); + if (!pwrctx) { + DRM_DEBUG("failed to alloc power context, " + "RC6 disabled\n"); + goto out; + } - ret = i915_gem_object_pin(pwrctx, 4096); - if (ret) { - DRM_ERROR("failed to pin power context: %d\n", ret); - drm_gem_object_unreference(pwrctx); - goto out; - } + ret = i915_gem_object_pin(pwrctx, 4096); + if (ret) { + DRM_ERROR("failed to pin power context: %d\n", + ret); + drm_gem_object_unreference(pwrctx); + goto out; + } - i915_gem_object_set_to_gtt_domain(pwrctx, 1); + i915_gem_object_set_to_gtt_domain(pwrctx, 1); - obj_priv = pwrctx->driver_private; + dev_priv->pwrctx = pwrctx; + obj_priv = pwrctx->driver_private; + } I915_WRITE(PWRCTXA, obj_priv->gtt_offset | PWRCTX_EN); I915_WRITE(MCHBAR_RENDER_STANDBY, I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT); - - dev_priv->pwrctx = pwrctx; } out: -- cgit v1.2.2