From c2494ace990c5d37cfe66911b85d28e6945eadfc Mon Sep 17 00:00:00 2001 From: Keith Mannthey Date: Mon, 26 Oct 2009 16:50:11 -0700 Subject: edac: i5100 fix initialization code Allow csrows to properly initialize when the topology only has active channels on 2 and 3. This new check allows proper detection and initialization in this topology. Only checking the first mrt that represented channels 0 and 1 is not sufficient. I also fixed up the related debug information path. I can submit as a 2nd patch if needed. Signed-off-by: Keith Mannthey Acked-by: Aristeu Rozanski Signed-off-by: Doug Thompson Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/edac/i5000_edac.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'drivers/edac/i5000_edac.c') diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index d335086f4a26..77a9579d7167 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -1173,7 +1173,7 @@ static void i5000_get_mc_regs(struct mem_ctl_info *mci) pci_read_config_word(pvt->branch_1, where, &pvt->b1_mtr[slot_row]); debugf2("MTR%d where=0x%x B1 value=0x%x\n", slot_row, - where, pvt->b0_mtr[slot_row]); + where, pvt->b1_mtr[slot_row]); } else { pvt->b1_mtr[slot_row] = 0; } @@ -1232,7 +1232,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) struct csrow_info *p_csrow; int empty, channel_count; int max_csrows; - int mtr; + int mtr, mtr1; int csrow_megs; int channel; int csrow; @@ -1251,9 +1251,10 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) /* use branch 0 for the basis */ mtr = pvt->b0_mtr[csrow >> 1]; + mtr1 = pvt->b1_mtr[csrow >> 1]; /* if no DIMMS on this row, continue */ - if (!MTR_DIMMS_PRESENT(mtr)) + if (!MTR_DIMMS_PRESENT(mtr) && !MTR_DIMMS_PRESENT(mtr1)) continue; /* FAKE OUT VALUES, FIXME */ -- cgit v1.2.2