From 5b4f95e570dd76a4606c4bbd0dec652db8a32fd0 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 22 Mar 2012 20:41:13 +0800 Subject: ARM: SPEAr600: Change FSMC and SMI clock names Change FSMC and SMI clock names to match the ones needed for DT based probing. Signed-off-by: Stefan Roese Cc: Viresh Kumar --- arch/arm/mach-spear6xx/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c index a86499a8a15f..f0518049c12e 100644 --- a/arch/arm/mach-spear6xx/clock.c +++ b/arch/arm/mach-spear6xx/clock.c @@ -660,8 +660,8 @@ static struct clk_lookup spear_clk_lookups[] = { { .dev_id = "dma", .clk = &dma_clk}, { .dev_id = "jpeg", .clk = &jpeg_clk}, { .dev_id = "gmac", .clk = &gmac_clk}, - { .dev_id = "smi", .clk = &smi_clk}, - { .dev_id = "fsmc-nand", .clk = &fsmc_clk}, + { .dev_id = "fc000000.flash", .clk = &smi_clk}, + { .dev_id = "d1800000.flash", .clk = &fsmc_clk}, /* clock derived from apb clk */ { .dev_id = "adc", .clk = &adc_clk}, { .dev_id = "ssp-pl022.0", .clk = &ssp0_clk}, -- cgit v1.2.2 From f08472f298627f110fb596d7a94e2621dba1953d Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Wed, 21 Mar 2012 20:42:51 +0530 Subject: SPEAr: Use CLKDEV_INIT for defining clk_lookups Signed-off-by: Viresh Kumar --- arch/arm/mach-spear3xx/clock.c | 111 +++++++++++++++++++++-------------------- arch/arm/mach-spear6xx/clock.c | 80 ++++++++++++++--------------- 2 files changed, 96 insertions(+), 95 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c index 6c4841f55223..6b2cd9ba4fd9 100644 --- a/arch/arm/mach-spear3xx/clock.c +++ b/arch/arm/mach-spear3xx/clock.c @@ -11,6 +11,7 @@ * warranty of any kind, whether express or implied. */ +#include #include #include #include @@ -652,85 +653,85 @@ static struct clk pwm_clk = { /* array of all spear 3xx clock lookups */ static struct clk_lookup spear_clk_lookups[] = { - { .con_id = "apb_pclk", .clk = &dummy_apb_pclk}, + CLKDEV_INIT(NULL, "apb_pclk", &dummy_apb_pclk), /* root clks */ - { .con_id = "osc_32k_clk", .clk = &osc_32k_clk}, - { .con_id = "osc_24m_clk", .clk = &osc_24m_clk}, + CLKDEV_INIT(NULL, "osc_32k_clk", &osc_32k_clk), + CLKDEV_INIT(NULL, "osc_24m_clk", &osc_24m_clk), /* clock derived from 32 KHz osc clk */ - { .dev_id = "rtc-spear", .clk = &rtc_clk}, + CLKDEV_INIT("rtc-spear", NULL, &rtc_clk), /* clock derived from 24 MHz osc clk */ - { .con_id = "pll1_clk", .clk = &pll1_clk}, - { .con_id = "pll3_48m_clk", .clk = &pll3_48m_clk}, - { .dev_id = "wdt", .clk = &wdt_clk}, + CLKDEV_INIT(NULL, "pll1_clk", &pll1_clk), + CLKDEV_INIT(NULL, "pll3_48m_clk", &pll3_48m_clk), + CLKDEV_INIT("wdt", NULL, &wdt_clk), /* clock derived from pll1 clk */ - { .con_id = "cpu_clk", .clk = &cpu_clk}, - { .con_id = "ahb_clk", .clk = &ahb_clk}, - { .con_id = "uart_synth_clk", .clk = &uart_synth_clk}, - { .con_id = "firda_synth_clk", .clk = &firda_synth_clk}, - { .con_id = "gpt0_synth_clk", .clk = &gpt0_synth_clk}, - { .con_id = "gpt1_synth_clk", .clk = &gpt1_synth_clk}, - { .con_id = "gpt2_synth_clk", .clk = &gpt2_synth_clk}, - { .dev_id = "uart", .clk = &uart_clk}, - { .dev_id = "firda", .clk = &firda_clk}, - { .dev_id = "gpt0", .clk = &gpt0_clk}, - { .dev_id = "gpt1", .clk = &gpt1_clk}, - { .dev_id = "gpt2", .clk = &gpt2_clk}, + CLKDEV_INIT(NULL, "cpu_clk", &cpu_clk), + CLKDEV_INIT(NULL, "ahb_clk", &ahb_clk), + CLKDEV_INIT(NULL, "uart_synth_clk", &uart_synth_clk), + CLKDEV_INIT(NULL, "firda_synth_clk", &firda_synth_clk), + CLKDEV_INIT(NULL, "gpt0_synth_clk", &gpt0_synth_clk), + CLKDEV_INIT(NULL, "gpt1_synth_clk", &gpt1_synth_clk), + CLKDEV_INIT(NULL, "gpt2_synth_clk", &gpt2_synth_clk), + CLKDEV_INIT("uart", NULL, &uart_clk), + CLKDEV_INIT("firda", NULL, &firda_clk), + CLKDEV_INIT("gpt0", NULL, &gpt0_clk), + CLKDEV_INIT("gpt1", NULL, &gpt1_clk), + CLKDEV_INIT("gpt2", NULL, &gpt2_clk), /* clock derived from pll3 clk */ - { .dev_id = "designware_udc", .clk = &usbd_clk}, - { .con_id = "usbh_clk", .clk = &usbh_clk}, + CLKDEV_INIT("designware_udc", NULL, &usbd_clk), + CLKDEV_INIT(NULL, "usbh_clk", &usbh_clk), /* clock derived from ahb clk */ - { .con_id = "apb_clk", .clk = &apb_clk}, - { .dev_id = "i2c_designware.0", .clk = &i2c_clk}, - { .dev_id = "dma", .clk = &dma_clk}, - { .dev_id = "jpeg", .clk = &jpeg_clk}, - { .dev_id = "gmac", .clk = &gmac_clk}, - { .dev_id = "smi", .clk = &smi_clk}, - { .dev_id = "c3", .clk = &c3_clk}, + CLKDEV_INIT(NULL, "apb_clk", &apb_clk), + CLKDEV_INIT("i2c_designware.0", NULL, &i2c_clk), + CLKDEV_INIT("dma", NULL, &dma_clk), + CLKDEV_INIT("jpeg", NULL, &jpeg_clk), + CLKDEV_INIT("gmac", NULL, &gmac_clk), + CLKDEV_INIT("smi", NULL, &smi_clk), + CLKDEV_INIT("c3", NULL, &c3_clk), /* clock derived from apb clk */ - { .dev_id = "adc", .clk = &adc_clk}, - { .dev_id = "ssp-pl022.0", .clk = &ssp0_clk}, - { .dev_id = "gpio", .clk = &gpio_clk}, + CLKDEV_INIT("adc", NULL, &adc_clk), + CLKDEV_INIT("ssp-pl022.0", NULL, &ssp0_clk), + CLKDEV_INIT("gpio", NULL, &gpio_clk), }; /* array of all spear 300 clock lookups */ #ifdef CONFIG_MACH_SPEAR300 static struct clk_lookup spear300_clk_lookups[] = { - { .dev_id = "clcd", .clk = &clcd_clk}, - { .con_id = "fsmc", .clk = &fsmc_clk}, - { .dev_id = "gpio1", .clk = &gpio1_clk}, - { .dev_id = "keyboard", .clk = &kbd_clk}, - { .dev_id = "sdhci", .clk = &sdhci_clk}, + CLKDEV_INIT("clcd", NULL, &clcd_clk), + CLKDEV_INIT("fsmc", NULL, &fsmc_clk), + CLKDEV_INIT("gpio1", NULL, &gpio1_clk), + CLKDEV_INIT("keyboard", NULL, &kbd_clk), + CLKDEV_INIT("sdhci", NULL, &sdhci_clk), }; #endif /* array of all spear 310 clock lookups */ #ifdef CONFIG_MACH_SPEAR310 static struct clk_lookup spear310_clk_lookups[] = { - { .con_id = "fsmc", .clk = &fsmc_clk}, - { .con_id = "emi", .clk = &emi_clk}, - { .dev_id = "uart1", .clk = &uart1_clk}, - { .dev_id = "uart2", .clk = &uart2_clk}, - { .dev_id = "uart3", .clk = &uart3_clk}, - { .dev_id = "uart4", .clk = &uart4_clk}, - { .dev_id = "uart5", .clk = &uart5_clk}, + CLKDEV_INIT("fsmc", NULL, &fsmc_clk), + CLKDEV_INIT(NULL, "emi", &emi_clk), + CLKDEV_INIT("uart1", NULL, &uart1_clk), + CLKDEV_INIT("uart2", NULL, &uart2_clk), + CLKDEV_INIT("uart3", NULL, &uart3_clk), + CLKDEV_INIT("uart4", NULL, &uart4_clk), + CLKDEV_INIT("uart5", NULL, &uart5_clk), }; #endif /* array of all spear 320 clock lookups */ #ifdef CONFIG_MACH_SPEAR320 static struct clk_lookup spear320_clk_lookups[] = { - { .dev_id = "clcd", .clk = &clcd_clk}, - { .con_id = "fsmc", .clk = &fsmc_clk}, - { .dev_id = "i2c_designware.1", .clk = &i2c1_clk}, - { .con_id = "emi", .clk = &emi_clk}, - { .dev_id = "pwm", .clk = &pwm_clk}, - { .dev_id = "sdhci", .clk = &sdhci_clk}, - { .dev_id = "c_can_platform.0", .clk = &can0_clk}, - { .dev_id = "c_can_platform.1", .clk = &can1_clk}, - { .dev_id = "ssp-pl022.1", .clk = &ssp1_clk}, - { .dev_id = "ssp-pl022.2", .clk = &ssp2_clk}, - { .dev_id = "uart1", .clk = &uart1_clk}, - { .dev_id = "uart2", .clk = &uart2_clk}, + CLKDEV_INIT("clcd", NULL, &clcd_clk), + CLKDEV_INIT("fsmc", NULL, &fsmc_clk), + CLKDEV_INIT("i2c_designware.1", NULL, &i2c1_clk), + CLKDEV_INIT(NULL, "emi", &emi_clk), + CLKDEV_INIT("pwm", NULL, &pwm_clk), + CLKDEV_INIT("sdhci", NULL, &sdhci_clk), + CLKDEV_INIT("c_can_platform.0", NULL, &can0_clk), + CLKDEV_INIT("c_can_platform.1", NULL, &can1_clk), + CLKDEV_INIT("ssp-pl022.1", NULL, &ssp1_clk), + CLKDEV_INIT("ssp-pl022.2", NULL, &ssp2_clk), + CLKDEV_INIT("uart1", NULL, &uart1_clk), + CLKDEV_INIT("uart2", NULL, &uart2_clk), }; #endif diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c index f0518049c12e..5a469800b142 100644 --- a/arch/arm/mach-spear6xx/clock.c +++ b/arch/arm/mach-spear6xx/clock.c @@ -623,53 +623,53 @@ static struct clk dummy_apb_pclk; /* array of all spear 6xx clock lookups */ static struct clk_lookup spear_clk_lookups[] = { - { .con_id = "apb_pclk", .clk = &dummy_apb_pclk}, + CLKDEV_INIT(NULL, "apb_pclk", &dummy_apb_pclk), /* root clks */ - { .con_id = "osc_32k_clk", .clk = &osc_32k_clk}, - { .con_id = "osc_30m_clk", .clk = &osc_30m_clk}, + CLKDEV_INIT(NULL, "osc_32k_clk", &osc_32k_clk), + CLKDEV_INIT(NULL, "osc_30m_clk", &osc_30m_clk), /* clock derived from 32 KHz os clk */ - { .dev_id = "rtc-spear", .clk = &rtc_clk}, + CLKDEV_INIT("rtc-spear", NULL, &rtc_clk), /* clock derived from 30 MHz os clk */ - { .con_id = "pll1_clk", .clk = &pll1_clk}, - { .con_id = "pll3_48m_clk", .clk = &pll3_48m_clk}, - { .dev_id = "wdt", .clk = &wdt_clk}, + CLKDEV_INIT(NULL, "pll1_clk", &pll1_clk), + CLKDEV_INIT(NULL, "pll3_48m_clk", &pll3_48m_clk), + CLKDEV_INIT("wdt", NULL, &wdt_clk), /* clock derived from pll1 clk */ - { .con_id = "cpu_clk", .clk = &cpu_clk}, - { .con_id = "ahb_clk", .clk = &ahb_clk}, - { .con_id = "uart_synth_clk", .clk = &uart_synth_clk}, - { .con_id = "firda_synth_clk", .clk = &firda_synth_clk}, - { .con_id = "clcd_synth_clk", .clk = &clcd_synth_clk}, - { .con_id = "gpt0_synth_clk", .clk = &gpt0_synth_clk}, - { .con_id = "gpt2_synth_clk", .clk = &gpt2_synth_clk}, - { .con_id = "gpt3_synth_clk", .clk = &gpt3_synth_clk}, - { .dev_id = "d0000000.serial", .clk = &uart0_clk}, - { .dev_id = "d0080000.serial", .clk = &uart1_clk}, - { .dev_id = "firda", .clk = &firda_clk}, - { .dev_id = "clcd", .clk = &clcd_clk}, - { .dev_id = "gpt0", .clk = &gpt0_clk}, - { .dev_id = "gpt1", .clk = &gpt1_clk}, - { .dev_id = "gpt2", .clk = &gpt2_clk}, - { .dev_id = "gpt3", .clk = &gpt3_clk}, + CLKDEV_INIT(NULL, "cpu_clk", &cpu_clk), + CLKDEV_INIT(NULL, "ahb_clk", &ahb_clk), + CLKDEV_INIT(NULL, "uart_synth_clk", &uart_synth_clk), + CLKDEV_INIT(NULL, "firda_synth_clk", &firda_synth_clk), + CLKDEV_INIT(NULL, "clcd_synth_clk", &clcd_synth_clk), + CLKDEV_INIT(NULL, "gpt0_synth_clk", &gpt0_synth_clk), + CLKDEV_INIT(NULL, "gpt2_synth_clk", &gpt2_synth_clk), + CLKDEV_INIT(NULL, "gpt3_synth_clk", &gpt3_synth_clk), + CLKDEV_INIT("d0000000.serial", NULL, &uart0_clk), + CLKDEV_INIT("d0080000.serial", NULL, &uart1_clk), + CLKDEV_INIT("firda", NULL, &firda_clk), + CLKDEV_INIT("clcd", NULL, &clcd_clk), + CLKDEV_INIT("gpt0", NULL, &gpt0_clk), + CLKDEV_INIT("gpt1", NULL, &gpt1_clk), + CLKDEV_INIT("gpt2", NULL, &gpt2_clk), + CLKDEV_INIT("gpt3", NULL, &gpt3_clk), /* clock derived from pll3 clk */ - { .dev_id = "designware_udc", .clk = &usbd_clk}, - { .con_id = "usbh.0_clk", .clk = &usbh0_clk}, - { .con_id = "usbh.1_clk", .clk = &usbh1_clk}, + CLKDEV_INIT("designware_udc", NULL, &usbd_clk), + CLKDEV_INIT(NULL, "usbh.0_clk", &usbh0_clk), + CLKDEV_INIT(NULL, "usbh.1_clk", &usbh1_clk), /* clock derived from ahb clk */ - { .con_id = "apb_clk", .clk = &apb_clk}, - { .dev_id = "d0200000.i2c", .clk = &i2c_clk}, - { .dev_id = "dma", .clk = &dma_clk}, - { .dev_id = "jpeg", .clk = &jpeg_clk}, - { .dev_id = "gmac", .clk = &gmac_clk}, - { .dev_id = "fc000000.flash", .clk = &smi_clk}, - { .dev_id = "d1800000.flash", .clk = &fsmc_clk}, + CLKDEV_INIT(NULL, "apb_clk", &apb_clk), + CLKDEV_INIT("d0200000.i2c", NULL, &i2c_clk), + CLKDEV_INIT("dma", NULL, &dma_clk), + CLKDEV_INIT("jpeg", NULL, &jpeg_clk), + CLKDEV_INIT("gmac", NULL, &gmac_clk), + CLKDEV_INIT("fc000000.flash", NULL, &smi_clk), + CLKDEV_INIT("d1800000.flash", NULL, &fsmc_clk), /* clock derived from apb clk */ - { .dev_id = "adc", .clk = &adc_clk}, - { .dev_id = "ssp-pl022.0", .clk = &ssp0_clk}, - { .dev_id = "ssp-pl022.1", .clk = &ssp1_clk}, - { .dev_id = "ssp-pl022.2", .clk = &ssp2_clk}, - { .dev_id = "f0100000.gpio", .clk = &gpio0_clk}, - { .dev_id = "fc980000.gpio", .clk = &gpio1_clk}, - { .dev_id = "d8100000.gpio", .clk = &gpio2_clk}, + CLKDEV_INIT("adc", NULL, &adc_clk), + CLKDEV_INIT("ssp-pl022.0", NULL, &ssp0_clk), + CLKDEV_INIT("ssp-pl022.1", NULL, &ssp1_clk), + CLKDEV_INIT("ssp-pl022.2", NULL, &ssp2_clk), + CLKDEV_INIT("f0100000.gpio", NULL, &gpio0_clk), + CLKDEV_INIT("fc980000.gpio", NULL, &gpio1_clk), + CLKDEV_INIT("d8100000.gpio", NULL, &gpio2_clk), }; void __init spear6xx_clk_init(void) -- cgit v1.2.2 From 7477bd8f7eea54e8515fca0e6460ead374571241 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Wed, 28 Mar 2012 14:45:30 +0530 Subject: SPEAr3xx: Add clock instance of usb hosts - ehci and ohci 0 and 1 This patch adds following clocks: "usbh.0_clk" and "usbh.1_clk". They are used by ehci and ohci drivers for SPEAr3xx usb host devices. Signed-off-by: Viresh Kumar --- arch/arm/mach-spear3xx/clock.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c index 6b2cd9ba4fd9..47d4535b6f59 100644 --- a/arch/arm/mach-spear3xx/clock.c +++ b/arch/arm/mach-spear3xx/clock.c @@ -412,6 +412,21 @@ static struct clk usbd_clk = { .recalc = &follow_parent, }; +/* clock derived from usbh clk */ +/* usbh0 clock */ +static struct clk usbh0_clk = { + .flags = ALWAYS_ENABLED, + .pclk = &usbh_clk, + .recalc = &follow_parent, +}; + +/* usbh1 clock */ +static struct clk usbh1_clk = { + .flags = ALWAYS_ENABLED, + .pclk = &usbh_clk, + .recalc = &follow_parent, +}; + /* clock derived from ahb clk */ /* apb masks structure */ static struct bus_clk_masks apb_masks = { @@ -679,6 +694,9 @@ static struct clk_lookup spear_clk_lookups[] = { /* clock derived from pll3 clk */ CLKDEV_INIT("designware_udc", NULL, &usbd_clk), CLKDEV_INIT(NULL, "usbh_clk", &usbh_clk), + /* clock derived from usbh clk */ + CLKDEV_INIT(NULL, "usbh.0_clk", &usbh0_clk), + CLKDEV_INIT(NULL, "usbh.1_clk", &usbh1_clk), /* clock derived from ahb clk */ CLKDEV_INIT(NULL, "apb_clk", &apb_clk), CLKDEV_INIT("i2c_designware.0", NULL, &i2c_clk), -- cgit v1.2.2 From a3a4513b692d147d839c7e6d2e3f0d3280a503ce Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Mon, 26 Mar 2012 10:06:57 +0530 Subject: SPEAr6xx: Add compilation support for dtbs using 'make dtbs' 'make dtbs' compiles all dtbs for a family. For this we need to add entries for all board dtb's in Makefile.boot file. This patch does it. Signed-off-by: Viresh Kumar --- arch/arm/mach-spear6xx/Makefile.boot | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-spear6xx/Makefile.boot b/arch/arm/mach-spear6xx/Makefile.boot index 4674a4c221db..af493da37ab6 100644 --- a/arch/arm/mach-spear6xx/Makefile.boot +++ b/arch/arm/mach-spear6xx/Makefile.boot @@ -1,3 +1,5 @@ zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 + +dtb-$(CONFIG_BOARD_SPEAR600_DT) += spear600-evb.dtb -- cgit v1.2.2 From 5fb00f965eeac548015bcd45414cccbe53b13d3f Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Mon, 26 Mar 2012 10:39:43 +0530 Subject: SPEAr3xx: Replace printk() with pr_*() For better print logs/messages, it is advisable to use pr_*() routines instead of directly calling printks. This patch removes direct calling of printks for spear3xx. Signed-off-by: Viresh Kumar --- arch/arm/mach-spear3xx/spear300.c | 8 +++++--- arch/arm/mach-spear3xx/spear310.c | 13 +++++++------ arch/arm/mach-spear3xx/spear320.c | 11 ++++++----- arch/arm/mach-spear3xx/spear3xx.c | 2 ++ 4 files changed, 20 insertions(+), 14 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index f7db66812abb..adee72bb68ec 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c @@ -11,6 +11,8 @@ * warranty of any kind, whether express or implied. */ +#define pr_fmt(fmt) "SPEAr300: " fmt + #include #include #include @@ -447,7 +449,7 @@ void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, if (shirq_ras1.regs.base) { ret = spear_shirq_register(&shirq_ras1); if (ret) - printk(KERN_ERR "Error registering Shared IRQ\n"); + pr_err("Error registering Shared IRQ\n"); } /* pmx initialization */ @@ -459,8 +461,8 @@ void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, if (pmx_driver.base) { ret = pmx_register(&pmx_driver); if (ret) - printk(KERN_ERR "padmux: registration failed. err no" - ": %d\n", ret); + pr_err("padmux: registration failed. err no: %d\n", + ret); /* Free Mapping, device selection already done */ iounmap(pmx_driver.base); } diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c index febaa6fcfb6a..b7c28764df92 100644 --- a/arch/arm/mach-spear3xx/spear310.c +++ b/arch/arm/mach-spear3xx/spear310.c @@ -11,6 +11,8 @@ * warranty of any kind, whether express or implied. */ +#define pr_fmt(fmt) "SPEAr310: " fmt + #include #include #include @@ -274,25 +276,25 @@ void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, shirq_ras1.regs.base = base; ret = spear_shirq_register(&shirq_ras1); if (ret) - printk(KERN_ERR "Error registering Shared IRQ 1\n"); + pr_err("Error registering Shared IRQ 1\n"); /* shirq 2 */ shirq_ras2.regs.base = base; ret = spear_shirq_register(&shirq_ras2); if (ret) - printk(KERN_ERR "Error registering Shared IRQ 2\n"); + pr_err("Error registering Shared IRQ 2\n"); /* shirq 3 */ shirq_ras3.regs.base = base; ret = spear_shirq_register(&shirq_ras3); if (ret) - printk(KERN_ERR "Error registering Shared IRQ 3\n"); + pr_err("Error registering Shared IRQ 3\n"); /* shirq 4 */ shirq_intrcomm_ras.regs.base = base; ret = spear_shirq_register(&shirq_intrcomm_ras); if (ret) - printk(KERN_ERR "Error registering Shared IRQ 4\n"); + pr_err("Error registering Shared IRQ 4\n"); } /* pmx initialization */ @@ -303,6 +305,5 @@ void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, ret = pmx_register(&pmx_driver); if (ret) - printk(KERN_ERR "padmux: registration failed. err no: %d\n", - ret); + pr_err("padmux: registration failed. err no: %d\n", ret); } diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c index deaaf199612c..7bd39c0032bd 100644 --- a/arch/arm/mach-spear3xx/spear320.c +++ b/arch/arm/mach-spear3xx/spear320.c @@ -11,6 +11,8 @@ * warranty of any kind, whether express or implied. */ +#define pr_fmt(fmt) "SPEAr320: " fmt + #include #include #include @@ -527,19 +529,19 @@ void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, shirq_ras1.regs.base = base; ret = spear_shirq_register(&shirq_ras1); if (ret) - printk(KERN_ERR "Error registering Shared IRQ 1\n"); + pr_err("Error registering Shared IRQ 1\n"); /* shirq 3 */ shirq_ras3.regs.base = base; ret = spear_shirq_register(&shirq_ras3); if (ret) - printk(KERN_ERR "Error registering Shared IRQ 3\n"); + pr_err("Error registering Shared IRQ 3\n"); /* shirq 4 */ shirq_intrcomm_ras.regs.base = base; ret = spear_shirq_register(&shirq_intrcomm_ras); if (ret) - printk(KERN_ERR "Error registering Shared IRQ 4\n"); + pr_err("Error registering Shared IRQ 4\n"); } /* pmx initialization */ @@ -550,6 +552,5 @@ void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, ret = pmx_register(&pmx_driver); if (ret) - printk(KERN_ERR "padmux: registration failed. err no: %d\n", - ret); + pr_err("padmux: registration failed. err no: %d\n", ret); } diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index b1733c37f209..a236925e13b3 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c @@ -11,6 +11,8 @@ * warranty of any kind, whether express or implied. */ +#define pr_fmt(fmt) "SPEAr3xx: " fmt + #include #include #include -- cgit v1.2.2 From c5fa4fdcdbe5f52c3e36892cc81f9378339b00ce Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Fri, 23 Mar 2012 00:17:43 +0530 Subject: ARM: SPEAr3xx: Add device-tree support to SPEAr3xx architecture This patch adds a generic target for SPEAr3xx machines that can be configured via the device-tree. Currently the following devices are supported via the devicetree: - VIC interrupts - PL011 UART - PL061 GPIO - PL110 CLCD - SP805 WDT - Synopsys DW I2C - Synopsys DW ethernet - ST FSMC-NAND - ST SPEAR-SMI - ST SPEAR-KEYBOARD - ST SPEAR-RTC - ARASAN SDHCI-SPEAR - SPEAR-EHCI - SPEAR-OHCI Other peripheral devices will follow in later patches. This also removes IO_ADDRESS macro and creates 16 MB static mappings instead of 4K for individual peripherals. This is done to have efficient TLB lookup for any I/O windows that are located closely together. ioremap() on this range will return this mapping only instead of creating another. Signed-off-by: Viresh Kumar --- arch/arm/boot/dts/spear300-evb.dts | 179 +++++++++++++++++++++++++ arch/arm/boot/dts/spear300.dtsi | 72 ++++++++++ arch/arm/boot/dts/spear310-evb.dts | 107 +++++++++++++++ arch/arm/boot/dts/spear310.dtsi | 75 +++++++++++ arch/arm/boot/dts/spear320-evb.dts | 108 +++++++++++++++ arch/arm/boot/dts/spear320.dtsi | 90 +++++++++++++ arch/arm/boot/dts/spear3xx.dtsi | 136 +++++++++++++++++++ arch/arm/mach-spear3xx/Kconfig | 34 +---- arch/arm/mach-spear3xx/Makefile | 13 +- arch/arm/mach-spear3xx/Makefile.boot | 4 + arch/arm/mach-spear3xx/clock.c | 103 ++++++++------ arch/arm/mach-spear3xx/include/mach/generic.h | 29 ++-- arch/arm/mach-spear3xx/include/mach/hardware.h | 3 - arch/arm/mach-spear3xx/include/mach/spear.h | 9 +- arch/arm/mach-spear3xx/spear300.c | 97 +++++++++----- arch/arm/mach-spear3xx/spear300_evb.c | 75 ----------- arch/arm/mach-spear3xx/spear310.c | 126 ++++++++++++++--- arch/arm/mach-spear3xx/spear310_evb.c | 81 ----------- arch/arm/mach-spear3xx/spear320.c | 127 +++++++++++++++--- arch/arm/mach-spear3xx/spear320_evb.c | 79 ----------- arch/arm/mach-spear3xx/spear3xx.c | 127 +++++++++--------- arch/arm/plat-spear/Kconfig | 3 +- 22 files changed, 1197 insertions(+), 480 deletions(-) create mode 100644 arch/arm/boot/dts/spear300-evb.dts create mode 100644 arch/arm/boot/dts/spear300.dtsi create mode 100644 arch/arm/boot/dts/spear310-evb.dts create mode 100644 arch/arm/boot/dts/spear310.dtsi create mode 100644 arch/arm/boot/dts/spear320-evb.dts create mode 100644 arch/arm/boot/dts/spear320.dtsi create mode 100644 arch/arm/boot/dts/spear3xx.dtsi delete mode 100644 arch/arm/mach-spear3xx/spear300_evb.c delete mode 100644 arch/arm/mach-spear3xx/spear310_evb.c delete mode 100644 arch/arm/mach-spear3xx/spear320_evb.c (limited to 'arch') diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts new file mode 100644 index 000000000000..f2ee991705a4 --- /dev/null +++ b/arch/arm/boot/dts/spear300-evb.dts @@ -0,0 +1,179 @@ +/* + * DTS file for SPEAr300 Evaluation Baord + * + * Copyright 2012 Viresh Kumar + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "spear300.dtsi" + +/ { + model = "ST SPEAr300 Evaluation Board"; + compatible = "st,spear300-evb", "st,spear300"; + #address-cells = <1>; + #size-cells = <1>; + + memory { + reg = <0 0x40000000>; + }; + + ahb { + clcd@60000000 { + status = "okay"; + }; + + fsmc: flash@94000000 { + status = "okay"; + }; + + gmac: eth@e0800000 { + status = "okay"; + }; + + sdhci@70000000 { + int-gpio = <&gpio1 0 0>; + power-gpio = <&gpio1 2 1>; + status = "okay"; + }; + + smi: flash@fc000000 { + status = "okay"; + }; + + spi0: spi@d0100000 { + status = "okay"; + }; + + ehci@e1800000 { + status = "okay"; + }; + + ohci@e1900000 { + status = "okay"; + }; + + ohci@e2100000 { + status = "okay"; + }; + + apb { + gpio0: gpio@fc980000 { + status = "okay"; + }; + + gpio1: gpio@a9000000 { + status = "okay"; + }; + + i2c0: i2c@d0180000 { + status = "okay"; + }; + + kbd@a0000000 { + linux,keymap = < 0x00010000 + 0x00020100 + 0x00030200 + 0x00040300 + 0x00050400 + 0x00060500 + 0x00070600 + 0x00080700 + 0x00090800 + 0x000a0001 + 0x000c0101 + 0x000d0201 + 0x000e0301 + 0x000f0401 + 0x00100501 + 0x00110601 + 0x00120701 + 0x00130801 + 0x00140002 + 0x00150102 + 0x00160202 + 0x00170302 + 0x00180402 + 0x00190502 + 0x001a0602 + 0x001b0702 + 0x001c0802 + 0x001d0003 + 0x001e0103 + 0x001f0203 + 0x00200303 + 0x00210403 + 0x00220503 + 0x00230603 + 0x00240703 + 0x00250803 + 0x00260004 + 0x00270104 + 0x00280204 + 0x00290304 + 0x002a0404 + 0x002b0504 + 0x002c0604 + 0x002d0704 + 0x002e0804 + 0x002f0005 + 0x00300105 + 0x00310205 + 0x00320305 + 0x00330405 + 0x00340505 + 0x00350605 + 0x00360705 + 0x00370805 + 0x00380006 + 0x00390106 + 0x003a0206 + 0x003b0306 + 0x003c0406 + 0x003d0506 + 0x003e0606 + 0x003f0706 + 0x00400806 + 0x00410007 + 0x00420107 + 0x00430207 + 0x00440307 + 0x00450407 + 0x00460507 + 0x00470607 + 0x00480707 + 0x00490807 + 0x004a0008 + 0x004b0108 + 0x004c0208 + 0x004d0308 + 0x004e0408 + 0x004f0508 + 0x00500608 + 0x00510708 + 0x00520808 >; + autorepeat; + st,mode = <0>; + status = "okay"; + }; + + rtc@fc900000 { + status = "okay"; + }; + + serial@d0000000 { + status = "okay"; + }; + + wdt@fc880000 { + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/spear300.dtsi b/arch/arm/boot/dts/spear300.dtsi new file mode 100644 index 000000000000..f9fcbf4f477b --- /dev/null +++ b/arch/arm/boot/dts/spear300.dtsi @@ -0,0 +1,72 @@ +/* + * DTS file for SPEAr300 SoC + * + * Copyright 2012 Viresh Kumar + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "spear3xx.dtsi" + +/ { + ahb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x60000000 0x60000000 0x50000000 + 0xd0000000 0xd0000000 0x30000000>; + + clcd@60000000 { + compatible = "arm,clcd-pl110", "arm,primecell"; + reg = <0x60000000 0x1000>; + interrupts = <30>; + status = "disabled"; + }; + + fsmc: flash@94000000 { + compatible = "st,spear600-fsmc-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x94000000 0x1000 /* FSMC Register */ + 0x80000000 0x0010>; /* NAND Base */ + reg-names = "fsmc_regs", "nand_data"; + st,ale-off = <0x20000>; + st,cle-off = <0x10000>; + status = "disabled"; + }; + + sdhci@70000000 { + compatible = "st,sdhci-spear"; + reg = <0x70000000 0x100>; + interrupts = <1>; + status = "disabled"; + }; + + apb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0xa0000000 0xa0000000 0x10000000 + 0xd0000000 0xd0000000 0x30000000>; + + gpio1: gpio@a9000000 { + #gpio-cells = <2>; + compatible = "arm,pl061", "arm,primecell"; + gpio-controller; + reg = <0xa9000000 0x1000>; + status = "disabled"; + }; + + kbd@a0000000 { + compatible = "st,spear300-kbd"; + reg = <0xa0000000 0x1000>; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts new file mode 100644 index 000000000000..ec19d7b9795a --- /dev/null +++ b/arch/arm/boot/dts/spear310-evb.dts @@ -0,0 +1,107 @@ +/* + * DTS file for SPEAr310 Evaluation Baord + * + * Copyright 2012 Viresh Kumar + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "spear310.dtsi" + +/ { + model = "ST SPEAr310 Evaluation Board"; + compatible = "st,spear310-evb", "st,spear310"; + #address-cells = <1>; + #size-cells = <1>; + + memory { + reg = <0 0x40000000>; + }; + + ahb { + fsmc: flash@44000000 { + status = "okay"; + }; + + gmac: eth@e0800000 { + status = "okay"; + }; + + smi: flash@fc000000 { + status = "okay"; + clock-rate=<50000000>; + + flash@f8000000 { + label = "m25p64"; + reg = <0xf8000000 0x800000>; + #address-cells = <1>; + #size-cells = <1>; + st,smi-fast-mode; + }; + }; + + spi0: spi@d0100000 { + status = "okay"; + }; + + ehci@e1800000 { + status = "okay"; + }; + + ohci@e1900000 { + status = "okay"; + }; + + ohci@e2100000 { + status = "okay"; + }; + + apb { + gpio0: gpio@fc980000 { + status = "okay"; + }; + + i2c0: i2c@d0180000 { + status = "okay"; + }; + + rtc@fc900000 { + status = "okay"; + }; + + serial@d0000000 { + status = "okay"; + }; + + serial@b2000000 { + status = "okay"; + }; + + serial@b2080000 { + status = "okay"; + }; + + serial@b2100000 { + status = "okay"; + }; + + serial@b2180000 { + status = "okay"; + }; + + serial@b2200000 { + status = "okay"; + }; + + wdt@fc880000 { + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi new file mode 100644 index 000000000000..dc7fa14da846 --- /dev/null +++ b/arch/arm/boot/dts/spear310.dtsi @@ -0,0 +1,75 @@ +/* + * DTS file for SPEAr310 SoC + * + * Copyright 2012 Viresh Kumar + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "spear3xx.dtsi" + +/ { + ahb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x40000000 0x40000000 0x10000000 + 0xb0000000 0xb0000000 0x10000000 + 0xd0000000 0xd0000000 0x30000000>; + + fsmc: flash@44000000 { + compatible = "st,spear600-fsmc-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x44000000 0x1000 /* FSMC Register */ + 0x40000000 0x0010>; /* NAND Base */ + reg-names = "fsmc_regs", "nand_data"; + st,ale-off = <0x10000>; + st,cle-off = <0x20000>; + status = "disabled"; + }; + + apb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0xb0000000 0xb0000000 0x10000000 + 0xd0000000 0xd0000000 0x30000000>; + + serial@b2000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xb2000000 0x1000>; + status = "disabled"; + }; + + serial@b2080000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xb2080000 0x1000>; + status = "disabled"; + }; + + serial@b2100000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xb2100000 0x1000>; + status = "disabled"; + }; + + serial@b2180000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xb2180000 0x1000>; + status = "disabled"; + }; + + serial@b2200000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xb2200000 0x1000>; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts new file mode 100644 index 000000000000..5681a974d9d5 --- /dev/null +++ b/arch/arm/boot/dts/spear320-evb.dts @@ -0,0 +1,108 @@ +/* + * DTS file for SPEAr320 Evaluation Baord + * + * Copyright 2012 Viresh Kumar + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "spear320.dtsi" + +/ { + model = "ST SPEAr300 Evaluation Board"; + compatible = "st,spear300-evb", "st,spear300"; + #address-cells = <1>; + #size-cells = <1>; + + memory { + reg = <0 0x40000000>; + }; + + ahb { + clcd@90000000 { + status = "okay"; + }; + + fsmc: flash@4c000000 { + status = "okay"; + }; + + gmac: eth@e0800000 { + status = "okay"; + }; + + sdhci@70000000 { + power-gpio = <&gpio0 2 1>; + power_always_enb; + status = "okay"; + }; + + smi: flash@fc000000 { + status = "okay"; + }; + + spi0: spi@d0100000 { + status = "okay"; + }; + + spi1: spi@a5000000 { + status = "okay"; + }; + + spi2: spi@a6000000 { + status = "okay"; + }; + + ehci@e1800000 { + status = "okay"; + }; + + ohci@e1900000 { + status = "okay"; + }; + + ohci@e2100000 { + status = "okay"; + }; + + apb { + gpio0: gpio@fc980000 { + status = "okay"; + }; + + i2c0: i2c@d0180000 { + status = "okay"; + }; + + i2c1: i2c@a7000000 { + status = "okay"; + }; + + rtc@fc900000 { + status = "okay"; + }; + + serial@d0000000 { + status = "okay"; + }; + + serial@a3000000 { + status = "okay"; + }; + + serial@a4000000 { + status = "okay"; + }; + + wdt@fc880000 { + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi new file mode 100644 index 000000000000..9a0267a5a0b7 --- /dev/null +++ b/arch/arm/boot/dts/spear320.dtsi @@ -0,0 +1,90 @@ +/* + * DTS file for SPEAr320 SoC + * + * Copyright 2012 Viresh Kumar + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "spear3xx.dtsi" + +/ { + ahb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x40000000 0x40000000 0x70000000 + 0xd0000000 0xd0000000 0x30000000>; + + clcd@90000000 { + compatible = "arm,clcd-pl110", "arm,primecell"; + reg = <0x90000000 0x1000>; + interrupts = <33>; + status = "disabled"; + }; + + fsmc: flash@4c000000 { + compatible = "st,spear600-fsmc-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x4c000000 0x1000 /* FSMC Register */ + 0x50000000 0x0010>; /* NAND Base */ + reg-names = "fsmc_regs", "nand_data"; + st,ale-off = <0x20000>; + st,cle-off = <0x10000>; + status = "disabled"; + }; + + sdhci@70000000 { + compatible = "st,sdhci-spear"; + reg = <0x70000000 0x100>; + interrupts = <29>; + status = "disabled"; + }; + + spi1: spi@a5000000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0xa5000000 0x1000>; + status = "disabled"; + }; + + spi2: spi@a6000000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0xa6000000 0x1000>; + status = "disabled"; + }; + + apb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0xa0000000 0xa0000000 0x10000000 + 0xd0000000 0xd0000000 0x30000000>; + + i2c1: i2c@a7000000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,designware-i2c"; + reg = <0xa7000000 0x1000>; + status = "disabled"; + }; + + serial@a3000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xa3000000 0x1000>; + status = "disabled"; + }; + + serial@a4000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xa4000000 0x1000>; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi new file mode 100644 index 000000000000..924a6f67ed05 --- /dev/null +++ b/arch/arm/boot/dts/spear3xx.dtsi @@ -0,0 +1,136 @@ +/* + * DTS file for all SPEAr3xx SoCs + * + * Copyright 2012 Viresh Kumar + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "skeleton.dtsi" + +/ { + interrupt-parent = <&vic>; + + cpus { + cpu@0 { + compatible = "arm,arm926ejs"; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0x40000000>; + }; + + ahb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0xd0000000 0xd0000000 0x30000000>; + + vic: interrupt-controller@f1100000 { + compatible = "arm,pl190-vic"; + interrupt-controller; + reg = <0xf1100000 0x1000>; + #interrupt-cells = <1>; + }; + + gmac: eth@e0800000 { + compatible = "st,spear600-gmac"; + reg = <0xe0800000 0x8000>; + interrupts = <23 22>; + interrupt-names = "macirq", "eth_wake_irq"; + status = "disabled"; + }; + + smi: flash@fc000000 { + compatible = "st,spear600-smi"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0xfc000000 0x1000>; + interrupts = <9>; + status = "disabled"; + }; + + spi0: spi@d0100000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0xd0100000 0x1000>; + interrupts = <20>; + status = "disabled"; + }; + + ehci@e1800000 { + compatible = "st,spear600-ehci", "usb-ehci"; + reg = <0xe1800000 0x1000>; + interrupts = <26>; + status = "disabled"; + }; + + ohci@e1900000 { + compatible = "st,spear600-ohci", "usb-ohci"; + reg = <0xe1900000 0x1000>; + interrupts = <25>; + status = "disabled"; + }; + + ohci@e2100000 { + compatible = "st,spear600-ohci", "usb-ohci"; + reg = <0xe2100000 0x1000>; + interrupts = <27>; + status = "disabled"; + }; + + apb { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0xd0000000 0xd0000000 0x30000000>; + + gpio0: gpio@fc980000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0xfc980000 0x1000>; + interrupts = <11>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + status = "disabled"; + }; + + i2c0: i2c@d0180000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,designware-i2c"; + reg = <0xd0180000 0x1000>; + interrupts = <21>; + status = "disabled"; + }; + + rtc@fc900000 { + compatible = "st,spear-rtc"; + reg = <0xfc900000 0x1000>; + interrupts = <10>; + status = "disabled"; + }; + + serial@d0000000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xd0000000 0x1000>; + interrupts = <19>; + status = "disabled"; + }; + + wdt@fc880000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0xfc880000 0x1000>; + interrupts = <12>; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm/mach-spear3xx/Kconfig b/arch/arm/mach-spear3xx/Kconfig index 2cee6b0de371..d9fe11cb6f16 100644 --- a/arch/arm/mach-spear3xx/Kconfig +++ b/arch/arm/mach-spear3xx/Kconfig @@ -5,39 +5,19 @@ if ARCH_SPEAR3XX menu "SPEAr3xx Implementations" -config BOARD_SPEAR300_EVB - bool "SPEAr300 Evaluation Board" - select MACH_SPEAR300 - help - Supports ST SPEAr300 Evaluation Board - -config BOARD_SPEAR310_EVB - bool "SPEAr310 Evaluation Board" - select MACH_SPEAR310 - help - Supports ST SPEAr310 Evaluation Board - -config BOARD_SPEAR320_EVB - bool "SPEAr320 Evaluation Board" - select MACH_SPEAR320 - help - Supports ST SPEAr320 Evaluation Board - -endmenu - config MACH_SPEAR300 - bool "SPEAr300" + bool "SPEAr300 Machine support with Device Tree" help - Supports ST SPEAr300 Machine + Supports ST SPEAr300 machine configured via the device-tree config MACH_SPEAR310 - bool "SPEAr310" + bool "SPEAr310 Machine support with Device Tree" help - Supports ST SPEAr310 Machine + Supports ST SPEAr310 machine configured via the device-tree config MACH_SPEAR320 - bool "SPEAr320" + bool "SPEAr320 Machine support with Device Tree" help - Supports ST SPEAr320 Machine - + Supports ST SPEAr320 machine configured via the device-tree +endmenu endif #ARCH_SPEAR3XX diff --git a/arch/arm/mach-spear3xx/Makefile b/arch/arm/mach-spear3xx/Makefile index b24862489704..17b5d83cf2d5 100644 --- a/arch/arm/mach-spear3xx/Makefile +++ b/arch/arm/mach-spear3xx/Makefile @@ -3,24 +3,13 @@ # # common files -obj-y += spear3xx.o clock.o +obj-$(CONFIG_ARCH_SPEAR3XX) += spear3xx.o clock.o # spear300 specific files obj-$(CONFIG_MACH_SPEAR300) += spear300.o -# spear300 boards files -obj-$(CONFIG_BOARD_SPEAR300_EVB) += spear300_evb.o - - # spear310 specific files obj-$(CONFIG_MACH_SPEAR310) += spear310.o -# spear310 boards files -obj-$(CONFIG_BOARD_SPEAR310_EVB) += spear310_evb.o - - # spear320 specific files obj-$(CONFIG_MACH_SPEAR320) += spear320.o - -# spear320 boards files -obj-$(CONFIG_BOARD_SPEAR320_EVB) += spear320_evb.o diff --git a/arch/arm/mach-spear3xx/Makefile.boot b/arch/arm/mach-spear3xx/Makefile.boot index 4674a4c221db..d93e2177e6ec 100644 --- a/arch/arm/mach-spear3xx/Makefile.boot +++ b/arch/arm/mach-spear3xx/Makefile.boot @@ -1,3 +1,7 @@ zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 + +dtb-$(CONFIG_MACH_SPEAR300) += spear300-evb.dtb +dtb-$(CONFIG_MACH_SPEAR310) += spear310-evb.dtb +dtb-$(CONFIG_MACH_SPEAR320) += spear320-evb.dtb diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c index 47d4535b6f59..9293c144b24a 100644 --- a/arch/arm/mach-spear3xx/clock.c +++ b/arch/arm/mach-spear3xx/clock.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -673,11 +674,11 @@ static struct clk_lookup spear_clk_lookups[] = { CLKDEV_INIT(NULL, "osc_32k_clk", &osc_32k_clk), CLKDEV_INIT(NULL, "osc_24m_clk", &osc_24m_clk), /* clock derived from 32 KHz osc clk */ - CLKDEV_INIT("rtc-spear", NULL, &rtc_clk), + CLKDEV_INIT("fc900000.rtc", NULL, &rtc_clk), /* clock derived from 24 MHz osc clk */ CLKDEV_INIT(NULL, "pll1_clk", &pll1_clk), CLKDEV_INIT(NULL, "pll3_48m_clk", &pll3_48m_clk), - CLKDEV_INIT("wdt", NULL, &wdt_clk), + CLKDEV_INIT("fc880000.wdt", NULL, &wdt_clk), /* clock derived from pll1 clk */ CLKDEV_INIT(NULL, "cpu_clk", &cpu_clk), CLKDEV_INIT(NULL, "ahb_clk", &ahb_clk), @@ -686,7 +687,7 @@ static struct clk_lookup spear_clk_lookups[] = { CLKDEV_INIT(NULL, "gpt0_synth_clk", &gpt0_synth_clk), CLKDEV_INIT(NULL, "gpt1_synth_clk", &gpt1_synth_clk), CLKDEV_INIT(NULL, "gpt2_synth_clk", &gpt2_synth_clk), - CLKDEV_INIT("uart", NULL, &uart_clk), + CLKDEV_INIT("d0000000.serial", NULL, &uart_clk), CLKDEV_INIT("firda", NULL, &firda_clk), CLKDEV_INIT("gpt0", NULL, &gpt0_clk), CLKDEV_INIT("gpt1", NULL, &gpt1_clk), @@ -699,81 +700,95 @@ static struct clk_lookup spear_clk_lookups[] = { CLKDEV_INIT(NULL, "usbh.1_clk", &usbh1_clk), /* clock derived from ahb clk */ CLKDEV_INIT(NULL, "apb_clk", &apb_clk), - CLKDEV_INIT("i2c_designware.0", NULL, &i2c_clk), + CLKDEV_INIT("d0180000.i2c", NULL, &i2c_clk), CLKDEV_INIT("dma", NULL, &dma_clk), CLKDEV_INIT("jpeg", NULL, &jpeg_clk), - CLKDEV_INIT("gmac", NULL, &gmac_clk), - CLKDEV_INIT("smi", NULL, &smi_clk), + CLKDEV_INIT("e0800000.eth", NULL, &gmac_clk), + CLKDEV_INIT("fc000000.flash", NULL, &smi_clk), CLKDEV_INIT("c3", NULL, &c3_clk), /* clock derived from apb clk */ CLKDEV_INIT("adc", NULL, &adc_clk), - CLKDEV_INIT("ssp-pl022.0", NULL, &ssp0_clk), - CLKDEV_INIT("gpio", NULL, &gpio_clk), + CLKDEV_INIT("d0100000.spi", NULL, &ssp0_clk), + CLKDEV_INIT("fc980000.gpio", NULL, &gpio_clk), }; /* array of all spear 300 clock lookups */ #ifdef CONFIG_MACH_SPEAR300 static struct clk_lookup spear300_clk_lookups[] = { - CLKDEV_INIT("clcd", NULL, &clcd_clk), - CLKDEV_INIT("fsmc", NULL, &fsmc_clk), - CLKDEV_INIT("gpio1", NULL, &gpio1_clk), - CLKDEV_INIT("keyboard", NULL, &kbd_clk), - CLKDEV_INIT("sdhci", NULL, &sdhci_clk), + CLKDEV_INIT("60000000.clcd", NULL, &clcd_clk), + CLKDEV_INIT("94000000.flash", NULL, &fsmc_clk), + CLKDEV_INIT("a9000000.gpio", NULL, &gpio1_clk), + CLKDEV_INIT("a0000000.kbd", NULL, &kbd_clk), + CLKDEV_INIT("70000000.sdhci", NULL, &sdhci_clk), }; + +void __init spear300_clk_init(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(spear_clk_lookups); i++) + clk_register(&spear_clk_lookups[i]); + + for (i = 0; i < ARRAY_SIZE(spear300_clk_lookups); i++) + clk_register(&spear300_clk_lookups[i]); + + clk_init(); +} #endif /* array of all spear 310 clock lookups */ #ifdef CONFIG_MACH_SPEAR310 static struct clk_lookup spear310_clk_lookups[] = { - CLKDEV_INIT("fsmc", NULL, &fsmc_clk), + CLKDEV_INIT("44000000.flash", NULL, &fsmc_clk), CLKDEV_INIT(NULL, "emi", &emi_clk), - CLKDEV_INIT("uart1", NULL, &uart1_clk), - CLKDEV_INIT("uart2", NULL, &uart2_clk), - CLKDEV_INIT("uart3", NULL, &uart3_clk), - CLKDEV_INIT("uart4", NULL, &uart4_clk), - CLKDEV_INIT("uart5", NULL, &uart5_clk), + CLKDEV_INIT("b2000000.serial", NULL, &uart1_clk), + CLKDEV_INIT("b2080000.serial", NULL, &uart2_clk), + CLKDEV_INIT("b2100000.serial", NULL, &uart3_clk), + CLKDEV_INIT("b2180000.serial", NULL, &uart4_clk), + CLKDEV_INIT("b2200000.serial", NULL, &uart5_clk), }; + +void __init spear310_clk_init(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(spear_clk_lookups); i++) + clk_register(&spear_clk_lookups[i]); + + for (i = 0; i < ARRAY_SIZE(spear310_clk_lookups); i++) + clk_register(&spear310_clk_lookups[i]); + + clk_init(); +} #endif /* array of all spear 320 clock lookups */ #ifdef CONFIG_MACH_SPEAR320 static struct clk_lookup spear320_clk_lookups[] = { - CLKDEV_INIT("clcd", NULL, &clcd_clk), - CLKDEV_INIT("fsmc", NULL, &fsmc_clk), - CLKDEV_INIT("i2c_designware.1", NULL, &i2c1_clk), + CLKDEV_INIT("90000000.clcd", NULL, &clcd_clk), + CLKDEV_INIT("4c000000.flash", NULL, &fsmc_clk), + CLKDEV_INIT("a7000000.i2c", NULL, &i2c1_clk), CLKDEV_INIT(NULL, "emi", &emi_clk), CLKDEV_INIT("pwm", NULL, &pwm_clk), - CLKDEV_INIT("sdhci", NULL, &sdhci_clk), + CLKDEV_INIT("70000000.sdhci", NULL, &sdhci_clk), CLKDEV_INIT("c_can_platform.0", NULL, &can0_clk), CLKDEV_INIT("c_can_platform.1", NULL, &can1_clk), - CLKDEV_INIT("ssp-pl022.1", NULL, &ssp1_clk), - CLKDEV_INIT("ssp-pl022.2", NULL, &ssp2_clk), - CLKDEV_INIT("uart1", NULL, &uart1_clk), - CLKDEV_INIT("uart2", NULL, &uart2_clk), + CLKDEV_INIT("a5000000.spi", NULL, &ssp1_clk), + CLKDEV_INIT("a6000000.spi", NULL, &ssp2_clk), + CLKDEV_INIT("a3000000.serial", NULL, &uart1_clk), + CLKDEV_INIT("a4000000.serial", NULL, &uart2_clk), }; -#endif -void __init spear3xx_clk_init(void) +void __init spear320_clk_init(void) { - int i, cnt; - struct clk_lookup *lookups; - - if (machine_is_spear300()) { - cnt = ARRAY_SIZE(spear300_clk_lookups); - lookups = spear300_clk_lookups; - } else if (machine_is_spear310()) { - cnt = ARRAY_SIZE(spear310_clk_lookups); - lookups = spear310_clk_lookups; - } else { - cnt = ARRAY_SIZE(spear320_clk_lookups); - lookups = spear320_clk_lookups; - } + int i; for (i = 0; i < ARRAY_SIZE(spear_clk_lookups); i++) clk_register(&spear_clk_lookups[i]); - for (i = 0; i < cnt; i++) - clk_register(&lookups[i]); + for (i = 0; i < ARRAY_SIZE(spear320_clk_lookups); i++) + clk_register(&spear320_clk_lookups[i]); clk_init(); } +#endif diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h index 14276e5a98d2..84ee2bbf1338 100644 --- a/arch/arm/mach-spear3xx/include/mach/generic.h +++ b/arch/arm/mach-spear3xx/include/mach/generic.h @@ -31,16 +31,13 @@ #define SPEAR_GPT0_CHAN1_IRQ SPEAR3XX_IRQ_CPU_GPT1_2 /* Add spear3xx family device structure declarations here */ -extern struct amba_device spear3xx_gpio_device; -extern struct amba_device spear3xx_uart_device; extern struct sys_timer spear3xx_timer; +extern struct pl022_ssp_controller pl022_plat_data; /* Add spear3xx family function declarations here */ -void __init spear3xx_clk_init(void); void __init spear_setup_timer(void); void __init spear3xx_map_io(void); -void __init spear3xx_init_irq(void); -void __init spear3xx_init(void); +void __init spear3xx_dt_init_irq(void); void spear_restart(char, const char *); @@ -99,9 +96,6 @@ extern struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50; /* spear300 declarations */ #ifdef CONFIG_MACH_SPEAR300 -/* Add spear300 machine device structure declarations here */ -extern struct amba_device spear300_gpio1_device; - /* pad mux modes */ extern struct pmx_mode spear300_nand_mode; extern struct pmx_mode spear300_nor_mode; @@ -133,16 +127,13 @@ extern struct pmx_dev spear300_pmx_telecom_sdhci_4bit; extern struct pmx_dev spear300_pmx_telecom_sdhci_8bit; extern struct pmx_dev spear300_pmx_gpio1; -/* Add spear300 machine function declarations here */ -void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, - u8 pmx_dev_count); +/* Add spear300 machine declarations here */ +void __init spear300_clk_init(void); #endif /* CONFIG_MACH_SPEAR300 */ /* spear310 declarations */ #ifdef CONFIG_MACH_SPEAR310 -/* Add spear310 machine device structure declarations here */ - /* pad mux devices */ extern struct pmx_dev spear310_pmx_emi_cs_0_1_4_5; extern struct pmx_dev spear310_pmx_emi_cs_2_3; @@ -153,16 +144,13 @@ extern struct pmx_dev spear310_pmx_fsmc; extern struct pmx_dev spear310_pmx_rs485_0_1; extern struct pmx_dev spear310_pmx_tdm0; -/* Add spear310 machine function declarations here */ -void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, - u8 pmx_dev_count); +/* Add spear310 machine declarations here */ +void __init spear310_clk_init(void); #endif /* CONFIG_MACH_SPEAR310 */ /* spear320 declarations */ #ifdef CONFIG_MACH_SPEAR320 -/* Add spear320 machine device structure declarations here */ - /* pad mux modes */ extern struct pmx_mode spear320_auto_net_smii_mode; extern struct pmx_mode spear320_auto_net_mii_mode; @@ -193,9 +181,8 @@ extern struct pmx_dev spear320_pmx_smii0; extern struct pmx_dev spear320_pmx_smii1; extern struct pmx_dev spear320_pmx_i2c1; -/* Add spear320 machine function declarations here */ -void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, - u8 pmx_dev_count); +/* Add spear320 machine declarations here */ +void __init spear320_clk_init(void); #endif /* CONFIG_MACH_SPEAR320 */ diff --git a/arch/arm/mach-spear3xx/include/mach/hardware.h b/arch/arm/mach-spear3xx/include/mach/hardware.h index 4660c0d8ec0d..defa374f5bee 100644 --- a/arch/arm/mach-spear3xx/include/mach/hardware.h +++ b/arch/arm/mach-spear3xx/include/mach/hardware.h @@ -17,7 +17,4 @@ #include #include -/* Vitual to physical translation of statically mapped space */ -#define IO_ADDRESS(x) (x | 0xF0000000) - #endif /* __MACH_HARDWARE_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h index 63fd98356919..8e3900aa0d45 100644 --- a/arch/arm/mach-spear3xx/include/mach/spear.h +++ b/arch/arm/mach-spear3xx/include/mach/spear.h @@ -25,8 +25,9 @@ /* ICM1 - Low speed connection */ #define SPEAR3XX_ICM1_2_BASE UL(0xD0000000) +#define VA_SPEAR3XX_ICM1_2_BASE UL(0xFD000000) #define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000) -#define VA_SPEAR3XX_ICM1_UART_BASE IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE) +#define VA_SPEAR3XX_ICM1_UART_BASE (VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE) #define SPEAR3XX_ICM1_ADC_BASE UL(0xD0080000) #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) #define SPEAR3XX_ICM1_I2C_BASE UL(0xD0180000) @@ -53,11 +54,11 @@ #define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000) #define SPEAR3XX_ML1_TMR_BASE UL(0xF0000000) #define SPEAR3XX_ML1_VIC_BASE UL(0xF1100000) -#define VA_SPEAR3XX_ML1_VIC_BASE IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE) /* ICM3 - Basic Subsystem */ #define SPEAR3XX_ICM3_SMEM_BASE UL(0xF8000000) #define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) +#define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) #define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000) #define SPEAR3XX_ICM3_SDRAM_CTRL_BASE UL(0xFC600000) #define SPEAR3XX_ICM3_TMR0_BASE UL(0xFC800000) @@ -65,9 +66,9 @@ #define SPEAR3XX_ICM3_RTC_BASE UL(0xFC900000) #define SPEAR3XX_ICM3_GPIO_BASE UL(0xFC980000) #define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000) -#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE) +#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE) #define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000) -#define VA_SPEAR3XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE) +#define VA_SPEAR3XX_ICM3_MISC_REG_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE) #define SPEAR3XX_ICM3_TMR1_BASE UL(0xFCB00000) /* Debug uart for linux, will be used for debug and uncompress messages */ diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index adee72bb68ec..c876c6a2caad 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c @@ -3,8 +3,8 @@ * * SPEAr300 machine source file * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar + * Copyright (C) 2009-2012 ST Microelectronics + * Viresh Kumar * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any @@ -13,10 +13,9 @@ #define pr_fmt(fmt) "SPEAr300: " fmt -#include -#include -#include -#include +#include +#include +#include #include #include #include @@ -425,24 +424,35 @@ static struct spear_shirq shirq_ras1 = { }, }; -/* Add spear300 specific devices here */ -/* arm gpio1 device registration */ -static struct pl061_platform_data gpio1_plat_data = { - .gpio_base = 8, - .irq_base = SPEAR300_GPIO1_INT_BASE, +/* padmux devices to enable */ +static struct pmx_dev *spear300_evb_pmx_devs[] = { + /* spear3xx specific devices */ + &spear3xx_pmx_i2c, + &spear3xx_pmx_ssp_cs, + &spear3xx_pmx_ssp, + &spear3xx_pmx_mii, + &spear3xx_pmx_uart0, + + /* spear300 specific devices */ + &spear300_pmx_fsmc_2_chips, + &spear300_pmx_clcd, + &spear300_pmx_telecom_sdhci_4bit, + &spear300_pmx_gpio1, }; -AMBA_APB_DEVICE(spear300_gpio1, "gpio1", 0, SPEAR300_GPIO_BASE, - {SPEAR300_VIRQ_GPIO1}, &gpio1_plat_data); +/* Add SPEAr300 auxdata to pass platform data */ +static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = { + OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, + &pl022_plat_data), + {} +}; -/* spear300 routines */ -void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, - u8 pmx_dev_count) +static void __init spear300_dt_init(void) { - int ret = 0; + int ret = -EINVAL; - /* call spear3xx family common init function */ - spear3xx_init(); + of_platform_populate(NULL, of_default_bus_match_table, + spear300_auxdata_lookup, NULL); /* shared irq registration */ shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K); @@ -452,18 +462,45 @@ void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, pr_err("Error registering Shared IRQ\n"); } - /* pmx initialization */ - pmx_driver.mode = pmx_mode; - pmx_driver.devs = pmx_devs; - pmx_driver.devs_count = pmx_dev_count; + if (of_machine_is_compatible("st,spear300-evb")) { + /* pmx initialization */ + pmx_driver.mode = &spear300_photo_frame_mode; + pmx_driver.devs = spear300_evb_pmx_devs; + pmx_driver.devs_count = ARRAY_SIZE(spear300_evb_pmx_devs); + + pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K); + if (pmx_driver.base) { + ret = pmx_register(&pmx_driver); + if (ret) + pr_err("padmux: registration failed. err no: %d\n", + ret); + /* Free Mapping, device selection already done */ + iounmap(pmx_driver.base); + } - pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K); - if (pmx_driver.base) { - ret = pmx_register(&pmx_driver); if (ret) - pr_err("padmux: registration failed. err no: %d\n", - ret); - /* Free Mapping, device selection already done */ - iounmap(pmx_driver.base); + pr_err("Initialization Failed"); } } + +static const char * const spear300_dt_board_compat[] = { + "st,spear300", + "st,spear300-evb", + NULL, +}; + +static void __init spear300_map_io(void) +{ + spear3xx_map_io(); + spear300_clk_init(); +} + +DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree") + .map_io = spear300_map_io, + .init_irq = spear3xx_dt_init_irq, + .handle_irq = vic_handle_irq, + .timer = &spear3xx_timer, + .init_machine = spear300_dt_init, + .restart = spear_restart, + .dt_compat = spear300_dt_board_compat, +MACHINE_END diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c deleted file mode 100644 index 3462ab9d6122..000000000000 --- a/arch/arm/mach-spear3xx/spear300_evb.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * arch/arm/mach-spear3xx/spear300_evb.c - * - * SPEAr300 evaluation board source file - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include - -/* padmux devices to enable */ -static struct pmx_dev *pmx_devs[] = { - /* spear3xx specific devices */ - &spear3xx_pmx_i2c, - &spear3xx_pmx_ssp_cs, - &spear3xx_pmx_ssp, - &spear3xx_pmx_mii, - &spear3xx_pmx_uart0, - - /* spear300 specific devices */ - &spear300_pmx_fsmc_2_chips, - &spear300_pmx_clcd, - &spear300_pmx_telecom_sdhci_4bit, - &spear300_pmx_gpio1, -}; - -static struct amba_device *amba_devs[] __initdata = { - /* spear3xx specific devices */ - &spear3xx_gpio_device, - &spear3xx_uart_device, - - /* spear300 specific devices */ - &spear300_gpio1_device, -}; - -static struct platform_device *plat_devs[] __initdata = { - /* spear3xx specific devices */ - - /* spear300 specific devices */ -}; - -static void __init spear300_evb_init(void) -{ - unsigned int i; - - /* call spear300 machine init function */ - spear300_init(&spear300_photo_frame_mode, pmx_devs, - ARRAY_SIZE(pmx_devs)); - - /* Add Platform Devices */ - platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); - - /* Add Amba Devices */ - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) - amba_device_register(amba_devs[i], &iomem_resource); -} - -MACHINE_START(SPEAR300, "ST-SPEAR300-EVB") - .atag_offset = 0x100, - .map_io = spear3xx_map_io, - .init_irq = spear3xx_init_irq, - .handle_irq = vic_handle_irq, - .timer = &spear3xx_timer, - .init_machine = spear300_evb_init, - .restart = spear_restart, -MACHINE_END diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c index b7c28764df92..641fd4cf6bc7 100644 --- a/arch/arm/mach-spear3xx/spear310.c +++ b/arch/arm/mach-spear3xx/spear310.c @@ -3,8 +3,8 @@ * * SPEAr310 machine source file * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar + * Copyright (C) 2009-2012 ST Microelectronics + * Viresh Kumar * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any @@ -13,8 +13,11 @@ #define pr_fmt(fmt) "SPEAr310: " fmt -#include -#include +#include +#include +#include +#include +#include #include #include #include @@ -257,17 +260,79 @@ static struct spear_shirq shirq_intrcomm_ras = { }, }; -/* Add spear310 specific devices here */ +/* padmux devices to enable */ +static struct pmx_dev *spear310_evb_pmx_devs[] = { + /* spear3xx specific devices */ + &spear3xx_pmx_i2c, + &spear3xx_pmx_ssp, + &spear3xx_pmx_gpio_pin0, + &spear3xx_pmx_gpio_pin1, + &spear3xx_pmx_gpio_pin2, + &spear3xx_pmx_gpio_pin3, + &spear3xx_pmx_gpio_pin4, + &spear3xx_pmx_gpio_pin5, + &spear3xx_pmx_uart0, + + /* spear310 specific devices */ + &spear310_pmx_emi_cs_0_1_4_5, + &spear310_pmx_emi_cs_2_3, + &spear310_pmx_uart1, + &spear310_pmx_uart2, + &spear310_pmx_uart3_4_5, + &spear310_pmx_fsmc, + &spear310_pmx_rs485_0_1, + &spear310_pmx_tdm0, +}; + +/* uart devices plat data */ +static struct amba_pl011_data spear310_uart_data[] = { + { + .dma_filter = pl08x_filter_id, + .dma_tx_param = "uart1_tx", + .dma_rx_param = "uart1_rx", + }, { + .dma_filter = pl08x_filter_id, + .dma_tx_param = "uart2_tx", + .dma_rx_param = "uart2_rx", + }, { + .dma_filter = pl08x_filter_id, + .dma_tx_param = "uart3_tx", + .dma_rx_param = "uart3_rx", + }, { + .dma_filter = pl08x_filter_id, + .dma_tx_param = "uart4_tx", + .dma_rx_param = "uart4_rx", + }, { + .dma_filter = pl08x_filter_id, + .dma_tx_param = "uart5_tx", + .dma_rx_param = "uart5_rx", + }, +}; -/* spear310 routines */ -void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, - u8 pmx_dev_count) +/* Add SPEAr310 auxdata to pass platform data */ +static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = { + OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, + &pl022_plat_data), + OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL, + &spear310_uart_data[0]), + OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART2_BASE, NULL, + &spear310_uart_data[1]), + OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART3_BASE, NULL, + &spear310_uart_data[2]), + OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART4_BASE, NULL, + &spear310_uart_data[3]), + OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART5_BASE, NULL, + &spear310_uart_data[4]), + {} +}; + +static void __init spear310_dt_init(void) { void __iomem *base; int ret = 0; - /* call spear3xx family common init function */ - spear3xx_init(); + of_platform_populate(NULL, of_default_bus_match_table, + spear310_auxdata_lookup, NULL); /* shared irq registration */ base = ioremap(SPEAR310_SOC_CONFIG_BASE, SZ_4K); @@ -297,13 +362,38 @@ void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, pr_err("Error registering Shared IRQ 4\n"); } - /* pmx initialization */ - pmx_driver.base = base; - pmx_driver.mode = pmx_mode; - pmx_driver.devs = pmx_devs; - pmx_driver.devs_count = pmx_dev_count; + if (of_machine_is_compatible("st,spear310-evb")) { + /* pmx initialization */ + pmx_driver.base = base; + pmx_driver.mode = NULL; + pmx_driver.devs = spear310_evb_pmx_devs; + pmx_driver.devs_count = ARRAY_SIZE(spear310_evb_pmx_devs); - ret = pmx_register(&pmx_driver); - if (ret) - pr_err("padmux: registration failed. err no: %d\n", ret); + ret = pmx_register(&pmx_driver); + if (ret) + pr_err("padmux: registration failed. err no: %d\n", + ret); + } } + +static const char * const spear310_dt_board_compat[] = { + "st,spear310", + "st,spear310-evb", + NULL, +}; + +static void __init spear310_map_io(void) +{ + spear3xx_map_io(); + spear310_clk_init(); +} + +DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree") + .map_io = spear310_map_io, + .init_irq = spear3xx_dt_init_irq, + .handle_irq = vic_handle_irq, + .timer = &spear3xx_timer, + .init_machine = spear310_dt_init, + .restart = spear_restart, + .dt_compat = spear310_dt_board_compat, +MACHINE_END diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c deleted file mode 100644 index f92c4993f65a..000000000000 --- a/arch/arm/mach-spear3xx/spear310_evb.c +++ /dev/null @@ -1,81 +0,0 @@ -/* - * arch/arm/mach-spear3xx/spear310_evb.c - * - * SPEAr310 evaluation board source file - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include - -/* padmux devices to enable */ -static struct pmx_dev *pmx_devs[] = { - /* spear3xx specific devices */ - &spear3xx_pmx_i2c, - &spear3xx_pmx_ssp, - &spear3xx_pmx_gpio_pin0, - &spear3xx_pmx_gpio_pin1, - &spear3xx_pmx_gpio_pin2, - &spear3xx_pmx_gpio_pin3, - &spear3xx_pmx_gpio_pin4, - &spear3xx_pmx_gpio_pin5, - &spear3xx_pmx_uart0, - - /* spear310 specific devices */ - &spear310_pmx_emi_cs_0_1_4_5, - &spear310_pmx_emi_cs_2_3, - &spear310_pmx_uart1, - &spear310_pmx_uart2, - &spear310_pmx_uart3_4_5, - &spear310_pmx_fsmc, - &spear310_pmx_rs485_0_1, - &spear310_pmx_tdm0, -}; - -static struct amba_device *amba_devs[] __initdata = { - /* spear3xx specific devices */ - &spear3xx_gpio_device, - &spear3xx_uart_device, - - /* spear310 specific devices */ -}; - -static struct platform_device *plat_devs[] __initdata = { - /* spear3xx specific devices */ - - /* spear310 specific devices */ -}; - -static void __init spear310_evb_init(void) -{ - unsigned int i; - - /* call spear310 machine init function */ - spear310_init(NULL, pmx_devs, ARRAY_SIZE(pmx_devs)); - - /* Add Platform Devices */ - platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); - - /* Add Amba Devices */ - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) - amba_device_register(amba_devs[i], &iomem_resource); -} - -MACHINE_START(SPEAR310, "ST-SPEAR310-EVB") - .atag_offset = 0x100, - .map_io = spear3xx_map_io, - .init_irq = spear3xx_init_irq, - .handle_irq = vic_handle_irq, - .timer = &spear3xx_timer, - .init_machine = spear310_evb_init, - .restart = spear_restart, -MACHINE_END diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c index 7bd39c0032bd..9c571d0f20c3 100644 --- a/arch/arm/mach-spear3xx/spear320.c +++ b/arch/arm/mach-spear3xx/spear320.c @@ -3,8 +3,8 @@ * * SPEAr320 machine source file * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar + * Copyright (C) 2009-2012 ST Microelectronics + * Viresh Kumar * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any @@ -13,8 +13,12 @@ #define pr_fmt(fmt) "SPEAr320: " fmt -#include -#include +#include +#include +#include +#include +#include +#include #include #include #include @@ -510,17 +514,79 @@ static struct spear_shirq shirq_intrcomm_ras = { }, }; -/* Add spear320 specific devices here */ +/* padmux devices to enable */ +static struct pmx_dev *spear320_evb_pmx_devs[] = { + /* spear3xx specific devices */ + &spear3xx_pmx_i2c, + &spear3xx_pmx_ssp, + &spear3xx_pmx_mii, + &spear3xx_pmx_uart0, + + /* spear320 specific devices */ + &spear320_pmx_fsmc, + &spear320_pmx_sdhci, + &spear320_pmx_i2s, + &spear320_pmx_uart1, + &spear320_pmx_uart2, + &spear320_pmx_can, + &spear320_pmx_pwm0, + &spear320_pmx_pwm1, + &spear320_pmx_pwm2, + &spear320_pmx_mii1, +}; + +static struct pl022_ssp_controller spear320_ssp_data[] = { + { + .bus_id = 1, + .enable_dma = 1, + .dma_filter = pl08x_filter_id, + .dma_tx_param = "ssp1_tx", + .dma_rx_param = "ssp1_rx", + .num_chipselect = 2, + }, { + .bus_id = 2, + .enable_dma = 1, + .dma_filter = pl08x_filter_id, + .dma_tx_param = "ssp2_tx", + .dma_rx_param = "ssp2_rx", + .num_chipselect = 2, + } +}; + +static struct amba_pl011_data spear320_uart_data[] = { + { + .dma_filter = pl08x_filter_id, + .dma_tx_param = "uart1_tx", + .dma_rx_param = "uart1_rx", + }, { + .dma_filter = pl08x_filter_id, + .dma_tx_param = "uart2_tx", + .dma_rx_param = "uart2_rx", + }, +}; -/* spear320 routines */ -void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, - u8 pmx_dev_count) +/* Add SPEAr310 auxdata to pass platform data */ +static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = { + OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, + &pl022_plat_data), + OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL, + &spear320_ssp_data[0]), + OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP1_BASE, NULL, + &spear320_ssp_data[1]), + OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART1_BASE, NULL, + &spear320_uart_data[0]), + OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART2_BASE, NULL, + &spear320_uart_data[1]), + {} +}; + +static void __init spear320_dt_init(void) { void __iomem *base; int ret = 0; - /* call spear3xx family common init function */ - spear3xx_init(); + of_platform_populate(NULL, of_default_bus_match_table, + spear320_auxdata_lookup, NULL); /* shared irq registration */ base = ioremap(SPEAR320_SOC_CONFIG_BASE, SZ_4K); @@ -544,13 +610,38 @@ void __init spear320_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, pr_err("Error registering Shared IRQ 4\n"); } - /* pmx initialization */ - pmx_driver.base = base; - pmx_driver.mode = pmx_mode; - pmx_driver.devs = pmx_devs; - pmx_driver.devs_count = pmx_dev_count; + if (of_machine_is_compatible("st,spear320-evb")) { + /* pmx initialization */ + pmx_driver.base = base; + pmx_driver.mode = &spear320_auto_net_mii_mode; + pmx_driver.devs = spear320_evb_pmx_devs; + pmx_driver.devs_count = ARRAY_SIZE(spear320_evb_pmx_devs); - ret = pmx_register(&pmx_driver); - if (ret) - pr_err("padmux: registration failed. err no: %d\n", ret); + ret = pmx_register(&pmx_driver); + if (ret) + pr_err("padmux: registration failed. err no: %d\n", + ret); + } } + +static const char * const spear320_dt_board_compat[] = { + "st,spear320", + "st,spear320-evb", + NULL, +}; + +static void __init spear320_map_io(void) +{ + spear3xx_map_io(); + spear320_clk_init(); +} + +DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree") + .map_io = spear320_map_io, + .init_irq = spear3xx_dt_init_irq, + .handle_irq = vic_handle_irq, + .timer = &spear3xx_timer, + .init_machine = spear320_dt_init, + .restart = spear_restart, + .dt_compat = spear320_dt_board_compat, +MACHINE_END diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c deleted file mode 100644 index 105334ab7021..000000000000 --- a/arch/arm/mach-spear3xx/spear320_evb.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - * arch/arm/mach-spear3xx/spear320_evb.c - * - * SPEAr320 evaluation board source file - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include - -/* padmux devices to enable */ -static struct pmx_dev *pmx_devs[] = { - /* spear3xx specific devices */ - &spear3xx_pmx_i2c, - &spear3xx_pmx_ssp, - &spear3xx_pmx_mii, - &spear3xx_pmx_uart0, - - /* spear320 specific devices */ - &spear320_pmx_fsmc, - &spear320_pmx_sdhci, - &spear320_pmx_i2s, - &spear320_pmx_uart1, - &spear320_pmx_uart2, - &spear320_pmx_can, - &spear320_pmx_pwm0, - &spear320_pmx_pwm1, - &spear320_pmx_pwm2, - &spear320_pmx_mii1, -}; - -static struct amba_device *amba_devs[] __initdata = { - /* spear3xx specific devices */ - &spear3xx_gpio_device, - &spear3xx_uart_device, - - /* spear320 specific devices */ -}; - -static struct platform_device *plat_devs[] __initdata = { - /* spear3xx specific devices */ - - /* spear320 specific devices */ -}; - -static void __init spear320_evb_init(void) -{ - unsigned int i; - - /* call spear320 machine init function */ - spear320_init(&spear320_auto_net_mii_mode, pmx_devs, - ARRAY_SIZE(pmx_devs)); - - /* Add Platform Devices */ - platform_add_devices(plat_devs, ARRAY_SIZE(plat_devs)); - - /* Add Amba Devices */ - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) - amba_device_register(amba_devs[i], &iomem_resource); -} - -MACHINE_START(SPEAR320, "ST-SPEAR320-EVB") - .atag_offset = 0x100, - .map_io = spear3xx_map_io, - .init_irq = spear3xx_init_irq, - .handle_irq = vic_handle_irq, - .timer = &spear3xx_timer, - .init_machine = spear320_evb_init, - .restart = spear_restart, -MACHINE_END diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index a236925e13b3..a94d8c12ed99 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c @@ -3,8 +3,8 @@ * * SPEAr3XX machines common source file * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar + * Copyright (C) 2009-2012 ST Microelectronics + * Viresh Kumar * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any @@ -13,76 +13,14 @@ #define pr_fmt(fmt) "SPEAr3xx: " fmt -#include -#include -#include +#include +#include +#include #include #include -#include -#include #include #include -/* Add spear3xx machines common devices here */ -/* gpio device registration */ -static struct pl061_platform_data gpio_plat_data = { - .gpio_base = 0, - .irq_base = SPEAR3XX_GPIO_INT_BASE, -}; - -AMBA_APB_DEVICE(spear3xx_gpio, "gpio", 0, SPEAR3XX_ICM3_GPIO_BASE, - {SPEAR3XX_IRQ_BASIC_GPIO}, &gpio_plat_data); - -/* uart device registration */ -AMBA_APB_DEVICE(spear3xx_uart, "uart", 0, SPEAR3XX_ICM1_UART_BASE, - {SPEAR3XX_IRQ_UART}, NULL); - -/* Do spear3xx familiy common initialization part here */ -void __init spear3xx_init(void) -{ - /* nothing to do for now */ -} - -/* This will initialize vic */ -void __init spear3xx_init_irq(void) -{ - vic_init((void __iomem *)VA_SPEAR3XX_ML1_VIC_BASE, 0, ~0, 0); -} - -/* Following will create static virtual/physical mappings */ -struct map_desc spear3xx_io_desc[] __initdata = { - { - .virtual = VA_SPEAR3XX_ICM1_UART_BASE, - .pfn = __phys_to_pfn(SPEAR3XX_ICM1_UART_BASE), - .length = SZ_4K, - .type = MT_DEVICE - }, { - .virtual = VA_SPEAR3XX_ML1_VIC_BASE, - .pfn = __phys_to_pfn(SPEAR3XX_ML1_VIC_BASE), - .length = SZ_4K, - .type = MT_DEVICE - }, { - .virtual = VA_SPEAR3XX_ICM3_SYS_CTRL_BASE, - .pfn = __phys_to_pfn(SPEAR3XX_ICM3_SYS_CTRL_BASE), - .length = SZ_4K, - .type = MT_DEVICE - }, { - .virtual = VA_SPEAR3XX_ICM3_MISC_REG_BASE, - .pfn = __phys_to_pfn(SPEAR3XX_ICM3_MISC_REG_BASE), - .length = SZ_4K, - .type = MT_DEVICE - }, -}; - -/* This will create static memory mapping for selected devices */ -void __init spear3xx_map_io(void) -{ - iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc)); - - /* This will initialize clock framework */ - spear3xx_clk_init(); -} - /* pad multiplexing support */ /* devices */ static struct pmx_dev_mode pmx_firda_modes[] = { @@ -508,6 +446,51 @@ struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50 = { }; #endif /* CONFIG_MACH_SPEAR310 || CONFIG_MACH_SPEAR320 */ +/* ssp device registration */ +struct pl022_ssp_controller pl022_plat_data = { + .bus_id = 0, + .enable_dma = 1, + .dma_filter = pl08x_filter_id, + .dma_tx_param = "ssp0_tx", + .dma_rx_param = "ssp0_rx", + /* + * This is number of spi devices that can be connected to spi. There are + * two type of chipselects on which slave devices can work. One is chip + * select provided by spi masters other is controlled through external + * gpio's. We can't use chipselect provided from spi master (because as + * soon as FIFO becomes empty, CS is disabled and transfer ends). So + * this number now depends on number of gpios available for spi. each + * slave on each master requires a separate gpio pin. + */ + .num_chipselect = 2, +}; + +/* + * Following will create 16MB static virtual/physical mappings + * PHYSICAL VIRTUAL + * 0xD0000000 0xFD000000 + * 0xFC000000 0xFC000000 + */ +struct map_desc spear3xx_io_desc[] __initdata = { + { + .virtual = VA_SPEAR3XX_ICM1_2_BASE, + .pfn = __phys_to_pfn(SPEAR3XX_ICM1_2_BASE), + .length = SZ_16M, + .type = MT_DEVICE + }, { + .virtual = VA_SPEAR3XX_ICM3_SMI_CTRL_BASE, + .pfn = __phys_to_pfn(SPEAR3XX_ICM3_SMI_CTRL_BASE), + .length = SZ_16M, + .type = MT_DEVICE + }, +}; + +/* This will create static memory mapping for selected devices */ +void __init spear3xx_map_io(void) +{ + iotable_init(spear3xx_io_desc, ARRAY_SIZE(spear3xx_io_desc)); +} + static void __init spear3xx_timer_init(void) { char pclk_name[] = "pll3_48m_clk"; @@ -538,3 +521,13 @@ static void __init spear3xx_timer_init(void) struct sys_timer spear3xx_timer = { .init = spear3xx_timer_init, }; + +static const struct of_device_id vic_of_match[] __initconst = { + { .compatible = "arm,pl190-vic", .data = vic_of_init, }, + { /* Sentinel */ } +}; + +void __init spear3xx_dt_init_irq(void) +{ + of_irq_init(vic_of_match); +} diff --git a/arch/arm/plat-spear/Kconfig b/arch/arm/plat-spear/Kconfig index 1bb3dbce8810..6c066fcb2979 100644 --- a/arch/arm/plat-spear/Kconfig +++ b/arch/arm/plat-spear/Kconfig @@ -9,9 +9,10 @@ choice default ARCH_SPEAR3XX config ARCH_SPEAR3XX - bool "SPEAr3XX" + bool "ST SPEAr3xx with Device Tree" select ARM_VIC select CPU_ARM926T + select USE_OF help Supports for ARM's SPEAR3XX family -- cgit v1.2.2 From 0b7ee71794b043de8a02d8887b69a57e4003106a Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Mon, 26 Mar 2012 10:29:23 +0530 Subject: SPEAr: Add PL080 DMA support for 3xx and 6xx Both SPEAr3xx and SPEAr6xx families have one instance of ARM PL080 DMA controller. This patch adds in support for that. Signed-off-by: Viresh Kumar --- arch/arm/boot/dts/spear300-evb.dts | 4 + arch/arm/boot/dts/spear310-evb.dts | 4 + arch/arm/boot/dts/spear320-evb.dts | 4 + arch/arm/boot/dts/spear3xx.dtsi | 8 + arch/arm/boot/dts/spear600-evb.dts | 4 + arch/arm/boot/dts/spear600.dtsi | 8 + arch/arm/mach-spear3xx/clock.c | 2 +- arch/arm/mach-spear3xx/include/mach/generic.h | 2 + arch/arm/mach-spear3xx/spear300.c | 193 +++++++++++++ arch/arm/mach-spear3xx/spear310.c | 192 +++++++++++++ arch/arm/mach-spear3xx/spear320.c | 192 +++++++++++++ arch/arm/mach-spear3xx/spear3xx.c | 19 ++ arch/arm/mach-spear6xx/clock.c | 2 +- arch/arm/mach-spear6xx/spear6xx.c | 372 +++++++++++++++++++++++++- arch/arm/plat-spear/Makefile | 2 +- arch/arm/plat-spear/include/plat/pl080.h | 21 ++ arch/arm/plat-spear/pl080.c | 79 ++++++ 17 files changed, 1104 insertions(+), 4 deletions(-) create mode 100644 arch/arm/plat-spear/include/plat/pl080.h create mode 100644 arch/arm/plat-spear/pl080.c (limited to 'arch') diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts index f2ee991705a4..eaecc29b9d81 100644 --- a/arch/arm/boot/dts/spear300-evb.dts +++ b/arch/arm/boot/dts/spear300-evb.dts @@ -29,6 +29,10 @@ status = "okay"; }; + dma@fc400000 { + status = "okay"; + }; + fsmc: flash@94000000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts index ec19d7b9795a..c86af33f700e 100644 --- a/arch/arm/boot/dts/spear310-evb.dts +++ b/arch/arm/boot/dts/spear310-evb.dts @@ -25,6 +25,10 @@ }; ahb { + dma@fc400000 { + status = "okay"; + }; + fsmc: flash@44000000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts index 5681a974d9d5..d43de712e863 100644 --- a/arch/arm/boot/dts/spear320-evb.dts +++ b/arch/arm/boot/dts/spear320-evb.dts @@ -29,6 +29,10 @@ status = "okay"; }; + dma@fc400000 { + status = "okay"; + }; + fsmc: flash@4c000000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi index 924a6f67ed05..0ae7c8e86311 100644 --- a/arch/arm/boot/dts/spear3xx.dtsi +++ b/arch/arm/boot/dts/spear3xx.dtsi @@ -40,6 +40,14 @@ #interrupt-cells = <1>; }; + dma@fc400000 { + compatible = "arm,pl080", "arm,primecell"; + reg = <0xfc400000 0x1000>; + interrupt-parent = <&vic>; + interrupts = <8>; + status = "disabled"; + }; + gmac: eth@e0800000 { compatible = "st,spear600-gmac"; reg = <0xe0800000 0x8000>; diff --git a/arch/arm/boot/dts/spear600-evb.dts b/arch/arm/boot/dts/spear600-evb.dts index 636292e18c90..790a7a8a5ccd 100644 --- a/arch/arm/boot/dts/spear600-evb.dts +++ b/arch/arm/boot/dts/spear600-evb.dts @@ -24,6 +24,10 @@ }; ahb { + dma@fc400000 { + status = "okay"; + }; + gmac: ethernet@e0800000 { phy-mode = "gmii"; status = "okay"; diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi index ebe0885a2b98..d777e3a6f178 100644 --- a/arch/arm/boot/dts/spear600.dtsi +++ b/arch/arm/boot/dts/spear600.dtsi @@ -45,6 +45,14 @@ #interrupt-cells = <1>; }; + dma@fc400000 { + compatible = "arm,pl080", "arm,primecell"; + reg = <0xfc400000 0x1000>; + interrupt-parent = <&vic1>; + interrupts = <10>; + status = "disabled"; + }; + gmac: ethernet@e0800000 { compatible = "st,spear600-gmac"; reg = <0xe0800000 0x8000>; diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c index 9293c144b24a..eeafe38eab25 100644 --- a/arch/arm/mach-spear3xx/clock.c +++ b/arch/arm/mach-spear3xx/clock.c @@ -701,7 +701,7 @@ static struct clk_lookup spear_clk_lookups[] = { /* clock derived from ahb clk */ CLKDEV_INIT(NULL, "apb_clk", &apb_clk), CLKDEV_INIT("d0180000.i2c", NULL, &i2c_clk), - CLKDEV_INIT("dma", NULL, &dma_clk), + CLKDEV_INIT("fc400000.dma", NULL, &dma_clk), CLKDEV_INIT("jpeg", NULL, &jpeg_clk), CLKDEV_INIT("e0800000.eth", NULL, &gmac_clk), CLKDEV_INIT("fc000000.flash", NULL, &smi_clk), diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h index 84ee2bbf1338..a7569584cbe8 100644 --- a/arch/arm/mach-spear3xx/include/mach/generic.h +++ b/arch/arm/mach-spear3xx/include/mach/generic.h @@ -14,6 +14,7 @@ #ifndef __MACH_GENERIC_H #define __MACH_GENERIC_H +#include #include #include #include @@ -33,6 +34,7 @@ /* Add spear3xx family device structure declarations here */ extern struct sys_timer spear3xx_timer; extern struct pl022_ssp_controller pl022_plat_data; +extern struct pl08x_platform_data pl080_plat_data; /* Add spear3xx family function declarations here */ void __init spear_setup_timer(void); diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index c876c6a2caad..f46fc2692ab6 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c @@ -13,6 +13,7 @@ #define pr_fmt(fmt) "SPEAr300: " fmt +#include #include #include #include @@ -440,10 +441,199 @@ static struct pmx_dev *spear300_evb_pmx_devs[] = { &spear300_pmx_gpio1, }; +/* DMAC platform data's slave info */ +struct pl08x_channel_data spear300_dma_info[] = { + { + .bus_id = "uart0_rx", + .min_signal = 2, + .max_signal = 2, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart0_tx", + .min_signal = 3, + .max_signal = 3, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ssp0_rx", + .min_signal = 8, + .max_signal = 8, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ssp0_tx", + .min_signal = 9, + .max_signal = 9, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "i2c_rx", + .min_signal = 10, + .max_signal = 10, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "i2c_tx", + .min_signal = 11, + .max_signal = 11, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "irda", + .min_signal = 12, + .max_signal = 12, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "adc", + .min_signal = 13, + .max_signal = 13, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "to_jpeg", + .min_signal = 14, + .max_signal = 14, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "from_jpeg", + .min_signal = 15, + .max_signal = 15, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras0_rx", + .min_signal = 0, + .max_signal = 0, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras0_tx", + .min_signal = 1, + .max_signal = 1, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras1_rx", + .min_signal = 2, + .max_signal = 2, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras1_tx", + .min_signal = 3, + .max_signal = 3, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras2_rx", + .min_signal = 4, + .max_signal = 4, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras2_tx", + .min_signal = 5, + .max_signal = 5, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras3_rx", + .min_signal = 6, + .max_signal = 6, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras3_tx", + .min_signal = 7, + .max_signal = 7, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras4_rx", + .min_signal = 8, + .max_signal = 8, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras4_tx", + .min_signal = 9, + .max_signal = 9, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras5_rx", + .min_signal = 10, + .max_signal = 10, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras5_tx", + .min_signal = 11, + .max_signal = 11, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras6_rx", + .min_signal = 12, + .max_signal = 12, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras6_tx", + .min_signal = 13, + .max_signal = 13, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras7_rx", + .min_signal = 14, + .max_signal = 14, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras7_tx", + .min_signal = 15, + .max_signal = 15, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, +}; + /* Add SPEAr300 auxdata to pass platform data */ static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, &pl022_plat_data), + OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, + &pl080_plat_data), {} }; @@ -451,6 +641,9 @@ static void __init spear300_dt_init(void) { int ret = -EINVAL; + pl080_plat_data.slave_channels = spear300_dma_info; + pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info); + of_platform_populate(NULL, of_default_bus_match_table, spear300_auxdata_lookup, NULL); diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c index 641fd4cf6bc7..063e7da0438a 100644 --- a/arch/arm/mach-spear3xx/spear310.c +++ b/arch/arm/mach-spear3xx/spear310.c @@ -284,6 +284,193 @@ static struct pmx_dev *spear310_evb_pmx_devs[] = { &spear310_pmx_tdm0, }; +/* DMAC platform data's slave info */ +struct pl08x_channel_data spear310_dma_info[] = { + { + .bus_id = "uart0_rx", + .min_signal = 2, + .max_signal = 2, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart0_tx", + .min_signal = 3, + .max_signal = 3, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ssp0_rx", + .min_signal = 8, + .max_signal = 8, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ssp0_tx", + .min_signal = 9, + .max_signal = 9, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "i2c_rx", + .min_signal = 10, + .max_signal = 10, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "i2c_tx", + .min_signal = 11, + .max_signal = 11, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "irda", + .min_signal = 12, + .max_signal = 12, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "adc", + .min_signal = 13, + .max_signal = 13, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "to_jpeg", + .min_signal = 14, + .max_signal = 14, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "from_jpeg", + .min_signal = 15, + .max_signal = 15, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart1_rx", + .min_signal = 0, + .max_signal = 0, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart1_tx", + .min_signal = 1, + .max_signal = 1, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart2_rx", + .min_signal = 2, + .max_signal = 2, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart2_tx", + .min_signal = 3, + .max_signal = 3, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart3_rx", + .min_signal = 4, + .max_signal = 4, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart3_tx", + .min_signal = 5, + .max_signal = 5, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart4_rx", + .min_signal = 6, + .max_signal = 6, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart4_tx", + .min_signal = 7, + .max_signal = 7, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart5_rx", + .min_signal = 8, + .max_signal = 8, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart5_tx", + .min_signal = 9, + .max_signal = 9, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras5_rx", + .min_signal = 10, + .max_signal = 10, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras5_tx", + .min_signal = 11, + .max_signal = 11, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras6_rx", + .min_signal = 12, + .max_signal = 12, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras6_tx", + .min_signal = 13, + .max_signal = 13, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras7_rx", + .min_signal = 14, + .max_signal = 14, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras7_tx", + .min_signal = 15, + .max_signal = 15, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, +}; + /* uart devices plat data */ static struct amba_pl011_data spear310_uart_data[] = { { @@ -313,6 +500,8 @@ static struct amba_pl011_data spear310_uart_data[] = { static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, &pl022_plat_data), + OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, + &pl080_plat_data), OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL, &spear310_uart_data[0]), OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART2_BASE, NULL, @@ -331,6 +520,9 @@ static void __init spear310_dt_init(void) void __iomem *base; int ret = 0; + pl080_plat_data.slave_channels = spear310_dma_info; + pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear310_dma_info); + of_platform_populate(NULL, of_default_bus_match_table, spear310_auxdata_lookup, NULL); diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c index 9c571d0f20c3..1e74031e1213 100644 --- a/arch/arm/mach-spear3xx/spear320.c +++ b/arch/arm/mach-spear3xx/spear320.c @@ -535,6 +535,193 @@ static struct pmx_dev *spear320_evb_pmx_devs[] = { &spear320_pmx_mii1, }; +/* DMAC platform data's slave info */ +struct pl08x_channel_data spear320_dma_info[] = { + { + .bus_id = "uart0_rx", + .min_signal = 2, + .max_signal = 2, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart0_tx", + .min_signal = 3, + .max_signal = 3, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ssp0_rx", + .min_signal = 8, + .max_signal = 8, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ssp0_tx", + .min_signal = 9, + .max_signal = 9, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "i2c0_rx", + .min_signal = 10, + .max_signal = 10, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "i2c0_tx", + .min_signal = 11, + .max_signal = 11, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "irda", + .min_signal = 12, + .max_signal = 12, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "adc", + .min_signal = 13, + .max_signal = 13, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "to_jpeg", + .min_signal = 14, + .max_signal = 14, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "from_jpeg", + .min_signal = 15, + .max_signal = 15, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ssp1_rx", + .min_signal = 0, + .max_signal = 0, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ssp1_tx", + .min_signal = 1, + .max_signal = 1, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ssp2_rx", + .min_signal = 2, + .max_signal = 2, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ssp2_tx", + .min_signal = 3, + .max_signal = 3, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "uart1_rx", + .min_signal = 4, + .max_signal = 4, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "uart1_tx", + .min_signal = 5, + .max_signal = 5, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "uart2_rx", + .min_signal = 6, + .max_signal = 6, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "uart2_tx", + .min_signal = 7, + .max_signal = 7, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "i2c1_rx", + .min_signal = 8, + .max_signal = 8, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "i2c1_tx", + .min_signal = 9, + .max_signal = 9, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "i2c2_rx", + .min_signal = 10, + .max_signal = 10, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "i2c2_tx", + .min_signal = 11, + .max_signal = 11, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "i2s_rx", + .min_signal = 12, + .max_signal = 12, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "i2s_tx", + .min_signal = 13, + .max_signal = 13, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "rs485_rx", + .min_signal = 14, + .max_signal = 14, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "rs485_tx", + .min_signal = 15, + .max_signal = 15, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, +}; + static struct pl022_ssp_controller spear320_ssp_data[] = { { .bus_id = 1, @@ -569,6 +756,8 @@ static struct amba_pl011_data spear320_uart_data[] = { static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, &pl022_plat_data), + OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, + &pl080_plat_data), OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL, &spear320_ssp_data[0]), OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP1_BASE, NULL, @@ -585,6 +774,9 @@ static void __init spear320_dt_init(void) void __iomem *base; int ret = 0; + pl080_plat_data.slave_channels = spear320_dma_info; + pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear320_dma_info); + of_platform_populate(NULL, of_default_bus_match_table, spear320_auxdata_lookup, NULL); diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index a94d8c12ed99..17d4ac9a95e1 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c @@ -17,7 +17,9 @@ #include #include #include +#include #include +#include #include #include @@ -465,6 +467,23 @@ struct pl022_ssp_controller pl022_plat_data = { .num_chipselect = 2, }; +/* dmac device registration */ +struct pl08x_platform_data pl080_plat_data = { + .memcpy_channel = { + .bus_id = "memcpy", + .cctl = (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \ + PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \ + PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \ + PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \ + PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE | \ + PL080_CONTROL_PROT_SYS), + }, + .lli_buses = PL08X_AHB1, + .mem_buses = PL08X_AHB1, + .get_signal = pl080_get_signal, + .put_signal = pl080_put_signal, +}; + /* * Following will create 16MB static virtual/physical mappings * PHYSICAL VIRTUAL diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c index 5a469800b142..adadef2b27b4 100644 --- a/arch/arm/mach-spear6xx/clock.c +++ b/arch/arm/mach-spear6xx/clock.c @@ -657,7 +657,7 @@ static struct clk_lookup spear_clk_lookups[] = { /* clock derived from ahb clk */ CLKDEV_INIT(NULL, "apb_clk", &apb_clk), CLKDEV_INIT("d0200000.i2c", NULL, &i2c_clk), - CLKDEV_INIT("dma", NULL, &dma_clk), + CLKDEV_INIT("fc400000.dma", NULL, &dma_clk), CLKDEV_INIT("jpeg", NULL, &jpeg_clk), CLKDEV_INIT("gmac", NULL, &gmac_clk), CLKDEV_INIT("fc000000.flash", NULL, &smi_clk), diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index 2ed8b14c82c8..5b9e30f54cdb 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c @@ -13,15 +13,377 @@ * warranty of any kind, whether express or implied. */ +#include #include #include #include #include +#include #include #include +#include #include #include +/* dmac device registration */ +static struct pl08x_channel_data spear600_dma_info[] = { + { + .bus_id = "ssp1_rx", + .min_signal = 0, + .max_signal = 0, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ssp1_tx", + .min_signal = 1, + .max_signal = 1, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart0_rx", + .min_signal = 2, + .max_signal = 2, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart0_tx", + .min_signal = 3, + .max_signal = 3, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart1_rx", + .min_signal = 4, + .max_signal = 4, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "uart1_tx", + .min_signal = 5, + .max_signal = 5, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ssp2_rx", + .min_signal = 6, + .max_signal = 6, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ssp2_tx", + .min_signal = 7, + .max_signal = 7, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ssp0_rx", + .min_signal = 8, + .max_signal = 8, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ssp0_tx", + .min_signal = 9, + .max_signal = 9, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "i2c_rx", + .min_signal = 10, + .max_signal = 10, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "i2c_tx", + .min_signal = 11, + .max_signal = 11, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "irda", + .min_signal = 12, + .max_signal = 12, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "adc", + .min_signal = 13, + .max_signal = 13, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "to_jpeg", + .min_signal = 14, + .max_signal = 14, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "from_jpeg", + .min_signal = 15, + .max_signal = 15, + .muxval = 0, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras0_rx", + .min_signal = 0, + .max_signal = 0, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras0_tx", + .min_signal = 1, + .max_signal = 1, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras1_rx", + .min_signal = 2, + .max_signal = 2, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras1_tx", + .min_signal = 3, + .max_signal = 3, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras2_rx", + .min_signal = 4, + .max_signal = 4, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras2_tx", + .min_signal = 5, + .max_signal = 5, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras3_rx", + .min_signal = 6, + .max_signal = 6, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras3_tx", + .min_signal = 7, + .max_signal = 7, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras4_rx", + .min_signal = 8, + .max_signal = 8, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras4_tx", + .min_signal = 9, + .max_signal = 9, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras5_rx", + .min_signal = 10, + .max_signal = 10, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras5_tx", + .min_signal = 11, + .max_signal = 11, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras6_rx", + .min_signal = 12, + .max_signal = 12, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras6_tx", + .min_signal = 13, + .max_signal = 13, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras7_rx", + .min_signal = 14, + .max_signal = 14, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ras7_tx", + .min_signal = 15, + .max_signal = 15, + .muxval = 1, + .cctl = 0, + .periph_buses = PL08X_AHB1, + }, { + .bus_id = "ext0_rx", + .min_signal = 0, + .max_signal = 0, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext0_tx", + .min_signal = 1, + .max_signal = 1, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext1_rx", + .min_signal = 2, + .max_signal = 2, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext1_tx", + .min_signal = 3, + .max_signal = 3, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext2_rx", + .min_signal = 4, + .max_signal = 4, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext2_tx", + .min_signal = 5, + .max_signal = 5, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext3_rx", + .min_signal = 6, + .max_signal = 6, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext3_tx", + .min_signal = 7, + .max_signal = 7, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext4_rx", + .min_signal = 8, + .max_signal = 8, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext4_tx", + .min_signal = 9, + .max_signal = 9, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext5_rx", + .min_signal = 10, + .max_signal = 10, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext5_tx", + .min_signal = 11, + .max_signal = 11, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext6_rx", + .min_signal = 12, + .max_signal = 12, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext6_tx", + .min_signal = 13, + .max_signal = 13, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext7_rx", + .min_signal = 14, + .max_signal = 14, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, { + .bus_id = "ext7_tx", + .min_signal = 15, + .max_signal = 15, + .muxval = 2, + .cctl = 0, + .periph_buses = PL08X_AHB2, + }, +}; + +struct pl08x_platform_data pl080_plat_data = { + .memcpy_channel = { + .bus_id = "memcpy", + .cctl = (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \ + PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \ + PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \ + PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \ + PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE | \ + PL080_CONTROL_PROT_SYS), + }, + .lli_buses = PL08X_AHB1, + .mem_buses = PL08X_AHB1, + .get_signal = pl080_get_signal, + .put_signal = pl080_put_signal, + .slave_channels = spear600_dma_info, + .num_slave_channels = ARRAY_SIZE(spear600_dma_info), +}; + /* Following will create static virtual/physical mappings */ static struct map_desc spear6xx_io_desc[] __initdata = { { @@ -92,9 +454,17 @@ struct sys_timer spear6xx_timer = { .init = spear6xx_timer_init, }; +/* Add auxdata to pass platform data */ +struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = { + OF_DEV_AUXDATA("arm,pl080", SPEAR6XX_ICM3_DMA_BASE, NULL, + &pl080_plat_data), + {} +}; + static void __init spear600_dt_init(void) { - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + of_platform_populate(NULL, of_default_bus_match_table, + spear6xx_auxdata_lookup, NULL); } static const char *spear600_dt_board_compat[] = { diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile index e0f2e5b9530c..4af6258d0fee 100644 --- a/arch/arm/plat-spear/Makefile +++ b/arch/arm/plat-spear/Makefile @@ -3,6 +3,6 @@ # # Common support -obj-y := clock.o restart.o time.o +obj-y := clock.o restart.o time.o pl080.o obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o diff --git a/arch/arm/plat-spear/include/plat/pl080.h b/arch/arm/plat-spear/include/plat/pl080.h new file mode 100644 index 000000000000..e14a3e4932f9 --- /dev/null +++ b/arch/arm/plat-spear/include/plat/pl080.h @@ -0,0 +1,21 @@ +/* + * arch/arm/plat-spear/include/plat/pl080.h + * + * DMAC pl080 definitions for SPEAr platform + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_PL080_H +#define __PLAT_PL080_H + +struct pl08x_dma_chan; +int pl080_get_signal(struct pl08x_dma_chan *ch); +void pl080_put_signal(struct pl08x_dma_chan *ch); + +#endif /* __PLAT_PL080_H */ diff --git a/arch/arm/plat-spear/pl080.c b/arch/arm/plat-spear/pl080.c new file mode 100644 index 000000000000..d53d75e1af5e --- /dev/null +++ b/arch/arm/plat-spear/pl080.c @@ -0,0 +1,79 @@ +/* + * arch/arm/plat-spear/pl080.c + * + * DMAC pl080 definitions for SPEAr platform + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include +#include +#include +#include +#include +#include + +static spinlock_t lock = __SPIN_LOCK_UNLOCKED(x); + +struct { + unsigned char busy; + unsigned char val; +} signals[16] = {{0, 0}, }; + +int pl080_get_signal(struct pl08x_dma_chan *ch) +{ + const struct pl08x_channel_data *cd = ch->cd; + unsigned int signal = cd->min_signal, val; + unsigned long flags; + + spin_lock_irqsave(&lock, flags); + + /* Return if signal is already acquired by somebody else */ + if (signals[signal].busy && + (signals[signal].val != cd->muxval)) { + spin_unlock_irqrestore(&lock, flags); + return -EBUSY; + } + + /* If acquiring for the first time, configure it */ + if (!signals[signal].busy) { + val = readl(DMA_CHN_CFG); + + /* + * Each request line has two bits in DMA_CHN_CFG register. To + * goto the bits of current request line, do left shift of + * value by 2 * signal number. + */ + val &= ~(0x3 << (signal * 2)); + val |= cd->muxval << (signal * 2); + writel(val, DMA_CHN_CFG); + } + + signals[signal].busy++; + signals[signal].val = cd->muxval; + spin_unlock_irqrestore(&lock, flags); + + return signal; +} + +void pl080_put_signal(struct pl08x_dma_chan *ch) +{ + const struct pl08x_channel_data *cd = ch->cd; + unsigned long flags; + + spin_lock_irqsave(&lock, flags); + + /* if signal is not used */ + if (!signals[cd->min_signal].busy) + BUG(); + + signals[cd->min_signal].busy--; + + spin_unlock_irqrestore(&lock, flags); +} -- cgit v1.2.2 From f3215b427bec2add8b5c776e8f50c3ba35b0e8f1 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Wed, 21 Mar 2012 09:18:03 +0530 Subject: SPEAr: Update defconfigs Recently device tree support is added for SPEAr3xx & SPEAr6xx and we must upgrade defconfig for that to get compiled. This patches does it. There are few more rearrangements done in defconfig automatically, when i run make savedefconfig. Signed-off-by: Viresh Kumar --- arch/arm/configs/spear3xx_defconfig | 52 +++++++++++++++++++++++++++++-------- arch/arm/configs/spear6xx_defconfig | 41 +++++++++++++++++++++++------ 2 files changed, 74 insertions(+), 19 deletions(-) (limited to 'arch') diff --git a/arch/arm/configs/spear3xx_defconfig b/arch/arm/configs/spear3xx_defconfig index fea7e1f026a3..7ed42912d69a 100644 --- a/arch/arm/configs/spear3xx_defconfig +++ b/arch/arm/configs/spear3xx_defconfig @@ -2,33 +2,67 @@ CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_EXTRA_PASS=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y CONFIG_PLAT_SPEAR=y -CONFIG_BOARD_SPEAR300_EVB=y -CONFIG_BOARD_SPEAR310_EVB=y -CONFIG_BOARD_SPEAR320_EVB=y +CONFIG_MACH_SPEAR300=y +CONFIG_MACH_SPEAR310=y +CONFIG_MACH_SPEAR320=y CONFIG_BINFMT_MISC=y +CONFIG_NET=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_MTD=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_FSMC=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=16384 +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_STMMAC_ETH=y +# CONFIG_WLAN is not set CONFIG_INPUT_FF_MEMLESS=y # CONFIG_INPUT_MOUSEDEV_PSAUX is not set -# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_SPEAR=y # CONFIG_INPUT_MOUSE is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set CONFIG_RAW_DRIVER=y CONFIG_MAX_RAW_DEVS=8192 +CONFIG_I2C=y +CONFIG_I2C_DESIGNWARE_PLATFORM=y +CONFIG_SPI=y +CONFIG_SPI_PL022=y CONFIG_GPIO_SYSFS=y CONFIG_GPIO_PL061=y # CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_ARM_SP805_WATCHDOG=y +CONFIG_FB=y +CONFIG_FB_ARMCLCD=y # CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set +CONFIG_USB=y +# CONFIG_USB_DEVICE_CLASS is not set +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SPEAR=y +CONFIG_RTC_CLASS=y +CONFIG_DMADEVICES=y +CONFIG_AMBA_PL08X=y +CONFIG_DMATEST=m CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_SECURITY=y @@ -39,8 +73,6 @@ CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_IOCHARSET="ascii" CONFIG_TMPFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS=y CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=m @@ -48,6 +80,4 @@ CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_FS=y CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y CONFIG_DEBUG_INFO=y -# CONFIG_CRC32 is not set diff --git a/arch/arm/configs/spear6xx_defconfig b/arch/arm/configs/spear6xx_defconfig index cef2e836afd2..cf94bc73a0e0 100644 --- a/arch/arm/configs/spear6xx_defconfig +++ b/arch/arm/configs/spear6xx_defconfig @@ -2,29 +2,58 @@ CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BLK_DEV_INITRD=y -CONFIG_KALLSYMS_EXTRA_PASS=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODVERSIONS=y +CONFIG_PARTITION_ADVANCED=y CONFIG_PLAT_SPEAR=y CONFIG_ARCH_SPEAR6XX=y -CONFIG_BOARD_SPEAR600_EVB=y +CONFIG_BOARD_SPEAR600_DT=y CONFIG_BINFMT_MISC=y +CONFIG_NET=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +CONFIG_MTD=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_FSMC=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_SIZE=16384 +CONFIG_NETDEVICES=y +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CIRRUS is not set +# CONFIG_NET_VENDOR_FARADAY is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SMSC is not set +CONFIG_STMMAC_ETH=y +# CONFIG_WLAN is not set CONFIG_INPUT_FF_MEMLESS=y # CONFIG_INPUT_MOUSEDEV_PSAUX is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -# CONFIG_LEGACY_PTYS is not set CONFIG_RAW_DRIVER=y CONFIG_MAX_RAW_DEVS=8192 +CONFIG_I2C=y +CONFIG_I2C_DESIGNWARE_PLATFORM=y +CONFIG_SPI=y +CONFIG_SPI_PL022=y CONFIG_GPIO_SYSFS=y CONFIG_GPIO_PL061=y # CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_ARM_SP805_WATCHDOG=y # CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_RTC_CLASS=y +CONFIG_DMADEVICES=y +CONFIG_AMBA_PL08X=y +CONFIG_DMATEST=m CONFIG_EXT2_FS=y CONFIG_EXT2_FS_XATTR=y CONFIG_EXT2_FS_SECURITY=y @@ -35,8 +64,6 @@ CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_IOCHARSET="ascii" CONFIG_TMPFS=y -CONFIG_PARTITION_ADVANCED=y -CONFIG_NLS=y CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=m @@ -44,6 +71,4 @@ CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_FS=y CONFIG_DEBUG_KERNEL=y CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_SPINLOCK_SLEEP=y CONFIG_DEBUG_INFO=y -# CONFIG_CRC32 is not set -- cgit v1.2.2 From 5019f0b1345b8f6a8e8a0c7c2f89d4a31819a317 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Wed, 11 Apr 2012 17:30:11 +0000 Subject: ARM: spear: remove most mach/*.h header contents The register and irq definitions in mach/*.h for spear3xx and spear6xx are now mostly obsolete, after the platforms have been converted to device tree based probing and the data is now part of the device tree files. The misc_regs.h contents are moved into clock.c because that is the only user, aside from the DMA_CHN_CFG that should eventually get handled differently. Some of the contents of mach/spear.h still remain, because they are used to set up the static map table, timer, uart and auxdata tables, but almost everything got removed. We might remove everything but the map table as the DT conversion completes, but that is not a priority. I've also made sure to make both copies of spear.h more or less identical so we can eventually combine them. The spear3?0.h files were only used by the spear3?0.c files, so I merged the contents in there and removed the bits that were unused. This is something that should still be looked at. Signed-off-by: Arnd Bergmann Acked-by: Viresh Kumar --- arch/arm/mach-spear3xx/clock.c | 98 +++++++++++++++ arch/arm/mach-spear3xx/include/mach/generic.h | 11 +- arch/arm/mach-spear3xx/include/mach/hardware.h | 21 +--- arch/arm/mach-spear3xx/include/mach/irqs.h | 130 +------------------- arch/arm/mach-spear3xx/include/mach/misc_regs.h | 144 ---------------------- arch/arm/mach-spear3xx/include/mach/spear.h | 38 +----- arch/arm/mach-spear3xx/include/mach/spear300.h | 54 --------- arch/arm/mach-spear3xx/include/mach/spear310.h | 58 --------- arch/arm/mach-spear3xx/include/mach/spear320.h | 67 ----------- arch/arm/mach-spear3xx/spear300.c | 41 ++++++- arch/arm/mach-spear3xx/spear310.c | 62 +++++++++- arch/arm/mach-spear3xx/spear320.c | 62 +++++++++- arch/arm/mach-spear3xx/spear3xx.c | 4 +- arch/arm/mach-spear6xx/clock.c | 106 ++++++++++++++++ arch/arm/mach-spear6xx/include/mach/generic.h | 29 +---- arch/arm/mach-spear6xx/include/mach/hardware.h | 24 +--- arch/arm/mach-spear6xx/include/mach/irqs.h | 75 +----------- arch/arm/mach-spear6xx/include/mach/misc_regs.h | 154 ------------------------ arch/arm/mach-spear6xx/include/mach/spear.h | 55 +-------- arch/arm/mach-spear6xx/include/mach/spear600.h | 21 ---- arch/arm/mach-spear6xx/spear6xx.c | 49 ++++---- arch/arm/plat-spear/include/plat/debug-macro.S | 2 +- arch/arm/plat-spear/include/plat/hardware.h | 17 --- arch/arm/plat-spear/include/plat/uncompress.h | 2 +- arch/arm/plat-spear/pl080.c | 1 + arch/arm/plat-spear/restart.c | 2 +- arch/arm/plat-spear/time.c | 17 ++- 27 files changed, 423 insertions(+), 921 deletions(-) delete mode 100644 arch/arm/mach-spear3xx/include/mach/spear300.h delete mode 100644 arch/arm/mach-spear3xx/include/mach/spear310.h delete mode 100644 arch/arm/mach-spear3xx/include/mach/spear320.h delete mode 100644 arch/arm/mach-spear6xx/include/mach/spear600.h delete mode 100644 arch/arm/plat-spear/include/plat/hardware.h (limited to 'arch') diff --git a/arch/arm/mach-spear3xx/clock.c b/arch/arm/mach-spear3xx/clock.c index eeafe38eab25..cd6c11099083 100644 --- a/arch/arm/mach-spear3xx/clock.c +++ b/arch/arm/mach-spear3xx/clock.c @@ -19,6 +19,104 @@ #include #include #include +#include + +#define PLL1_CTR (MISC_BASE + 0x008) +#define PLL1_FRQ (MISC_BASE + 0x00C) +#define PLL1_MOD (MISC_BASE + 0x010) +#define PLL2_CTR (MISC_BASE + 0x014) +/* PLL_CTR register masks */ +#define PLL_ENABLE 2 +#define PLL_MODE_SHIFT 4 +#define PLL_MODE_MASK 0x3 +#define PLL_MODE_NORMAL 0 +#define PLL_MODE_FRACTION 1 +#define PLL_MODE_DITH_DSB 2 +#define PLL_MODE_DITH_SSB 3 + +#define PLL2_FRQ (MISC_BASE + 0x018) +/* PLL FRQ register masks */ +#define PLL_DIV_N_SHIFT 0 +#define PLL_DIV_N_MASK 0xFF +#define PLL_DIV_P_SHIFT 8 +#define PLL_DIV_P_MASK 0x7 +#define PLL_NORM_FDBK_M_SHIFT 24 +#define PLL_NORM_FDBK_M_MASK 0xFF +#define PLL_DITH_FDBK_M_SHIFT 16 +#define PLL_DITH_FDBK_M_MASK 0xFFFF + +#define PLL2_MOD (MISC_BASE + 0x01C) +#define PLL_CLK_CFG (MISC_BASE + 0x020) +#define CORE_CLK_CFG (MISC_BASE + 0x024) +/* CORE CLK CFG register masks */ +#define PLL_HCLK_RATIO_SHIFT 10 +#define PLL_HCLK_RATIO_MASK 0x3 +#define HCLK_PCLK_RATIO_SHIFT 8 +#define HCLK_PCLK_RATIO_MASK 0x3 + +#define PERIP_CLK_CFG (MISC_BASE + 0x028) +/* PERIP_CLK_CFG register masks */ +#define UART_CLK_SHIFT 4 +#define UART_CLK_MASK 0x1 +#define FIRDA_CLK_SHIFT 5 +#define FIRDA_CLK_MASK 0x3 +#define GPT0_CLK_SHIFT 8 +#define GPT1_CLK_SHIFT 11 +#define GPT2_CLK_SHIFT 12 +#define GPT_CLK_MASK 0x1 +#define AUX_CLK_PLL3_VAL 0 +#define AUX_CLK_PLL1_VAL 1 + +#define PERIP1_CLK_ENB (MISC_BASE + 0x02C) +/* PERIP1_CLK_ENB register masks */ +#define UART_CLK_ENB 3 +#define SSP_CLK_ENB 5 +#define I2C_CLK_ENB 7 +#define JPEG_CLK_ENB 8 +#define FIRDA_CLK_ENB 10 +#define GPT1_CLK_ENB 11 +#define GPT2_CLK_ENB 12 +#define ADC_CLK_ENB 15 +#define RTC_CLK_ENB 17 +#define GPIO_CLK_ENB 18 +#define DMA_CLK_ENB 19 +#define SMI_CLK_ENB 21 +#define GMAC_CLK_ENB 23 +#define USBD_CLK_ENB 24 +#define USBH_CLK_ENB 25 +#define C3_CLK_ENB 31 + +#define RAS_CLK_ENB (MISC_BASE + 0x034) + +#define PRSC1_CLK_CFG (MISC_BASE + 0x044) +#define PRSC2_CLK_CFG (MISC_BASE + 0x048) +#define PRSC3_CLK_CFG (MISC_BASE + 0x04C) +/* gpt synthesizer register masks */ +#define GPT_MSCALE_SHIFT 0 +#define GPT_MSCALE_MASK 0xFFF +#define GPT_NSCALE_SHIFT 12 +#define GPT_NSCALE_MASK 0xF + +#define AMEM_CLK_CFG (MISC_BASE + 0x050) +#define EXPI_CLK_CFG (MISC_BASE + 0x054) +#define CLCD_CLK_SYNT (MISC_BASE + 0x05C) +#define FIRDA_CLK_SYNT (MISC_BASE + 0x060) +#define UART_CLK_SYNT (MISC_BASE + 0x064) +#define GMAC_CLK_SYNT (MISC_BASE + 0x068) +#define RAS1_CLK_SYNT (MISC_BASE + 0x06C) +#define RAS2_CLK_SYNT (MISC_BASE + 0x070) +#define RAS3_CLK_SYNT (MISC_BASE + 0x074) +#define RAS4_CLK_SYNT (MISC_BASE + 0x078) +/* aux clk synthesiser register masks for irda to ras4 */ +#define AUX_SYNT_ENB 31 +#define AUX_EQ_SEL_SHIFT 30 +#define AUX_EQ_SEL_MASK 1 +#define AUX_EQ1_SEL 0 +#define AUX_EQ2_SEL 1 +#define AUX_XSCALE_SHIFT 16 +#define AUX_XSCALE_MASK 0xFFF +#define AUX_YSCALE_SHIFT 0 +#define AUX_YSCALE_MASK 0xFFF /* root clks */ /* 32 KHz oscillator clock */ diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h index a7569584cbe8..e4f4d721cda2 100644 --- a/arch/arm/mach-spear3xx/include/mach/generic.h +++ b/arch/arm/mach-spear3xx/include/mach/generic.h @@ -22,22 +22,13 @@ #include #include -/* spear3xx declarations */ -/* - * Each GPT has 2 timer channels - * Following GPT channels will be used as clock source and clockevent - */ -#define SPEAR_GPT0_BASE SPEAR3XX_ML1_TMR_BASE -#define SPEAR_GPT0_CHAN0_IRQ SPEAR3XX_IRQ_CPU_GPT1_1 -#define SPEAR_GPT0_CHAN1_IRQ SPEAR3XX_IRQ_CPU_GPT1_2 - /* Add spear3xx family device structure declarations here */ extern struct sys_timer spear3xx_timer; extern struct pl022_ssp_controller pl022_plat_data; extern struct pl08x_platform_data pl080_plat_data; /* Add spear3xx family function declarations here */ -void __init spear_setup_timer(void); +void __init spear_setup_timer(resource_size_t base, int irq); void __init spear3xx_map_io(void); void __init spear3xx_dt_init_irq(void); diff --git a/arch/arm/mach-spear3xx/include/mach/hardware.h b/arch/arm/mach-spear3xx/include/mach/hardware.h index defa374f5bee..40a8c178f10d 100644 --- a/arch/arm/mach-spear3xx/include/mach/hardware.h +++ b/arch/arm/mach-spear3xx/include/mach/hardware.h @@ -1,20 +1 @@ -/* - * arch/arm/mach-spear3xx/include/mach/hardware.h - * - * Hardware definitions for SPEAr3xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_HARDWARE_H -#define __MACH_HARDWARE_H - -#include -#include - -#endif /* __MACH_HARDWARE_H */ +/* empty */ diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h index 6e265442808e..319620a1afb4 100644 --- a/arch/arm/mach-spear3xx/include/mach/irqs.h +++ b/arch/arm/mach-spear3xx/include/mach/irqs.h @@ -14,141 +14,15 @@ #ifndef __MACH_IRQS_H #define __MACH_IRQS_H -/* SPEAr3xx IRQ definitions */ -#define SPEAR3XX_IRQ_HW_ACCEL_MOD_0 0 +/* FIXME: probe all these from DT */ #define SPEAR3XX_IRQ_INTRCOMM_RAS_ARM 1 #define SPEAR3XX_IRQ_CPU_GPT1_1 2 -#define SPEAR3XX_IRQ_CPU_GPT1_2 3 -#define SPEAR3XX_IRQ_BASIC_GPT1_1 4 -#define SPEAR3XX_IRQ_BASIC_GPT1_2 5 -#define SPEAR3XX_IRQ_BASIC_GPT2_1 6 -#define SPEAR3XX_IRQ_BASIC_GPT2_2 7 -#define SPEAR3XX_IRQ_BASIC_DMA 8 -#define SPEAR3XX_IRQ_BASIC_SMI 9 -#define SPEAR3XX_IRQ_BASIC_RTC 10 -#define SPEAR3XX_IRQ_BASIC_GPIO 11 -#define SPEAR3XX_IRQ_BASIC_WDT 12 -#define SPEAR3XX_IRQ_DDR_CONTROLLER 13 -#define SPEAR3XX_IRQ_SYS_ERROR 14 -#define SPEAR3XX_IRQ_WAKEUP_RCV 15 -#define SPEAR3XX_IRQ_JPEG 16 -#define SPEAR3XX_IRQ_IRDA 17 -#define SPEAR3XX_IRQ_ADC 18 -#define SPEAR3XX_IRQ_UART 19 -#define SPEAR3XX_IRQ_SSP 20 -#define SPEAR3XX_IRQ_I2C 21 -#define SPEAR3XX_IRQ_MAC_1 22 -#define SPEAR3XX_IRQ_MAC_2 23 -#define SPEAR3XX_IRQ_USB_DEV 24 -#define SPEAR3XX_IRQ_USB_H_OHCI_0 25 -#define SPEAR3XX_IRQ_USB_H_EHCI_0 26 -#define SPEAR3XX_IRQ_USB_H_EHCI_1 SPEAR3XX_IRQ_USB_H_EHCI_0 -#define SPEAR3XX_IRQ_USB_H_OHCI_1 27 #define SPEAR3XX_IRQ_GEN_RAS_1 28 #define SPEAR3XX_IRQ_GEN_RAS_2 29 #define SPEAR3XX_IRQ_GEN_RAS_3 30 -#define SPEAR3XX_IRQ_HW_ACCEL_MOD_1 31 #define SPEAR3XX_IRQ_VIC_END 32 - #define SPEAR3XX_VIRQ_START SPEAR3XX_IRQ_VIC_END -/* SPEAr300 Virtual irq definitions */ -/* IRQs sharing IRQ_GEN_RAS_1 */ -#define SPEAR300_VIRQ_IT_PERS_S (SPEAR3XX_VIRQ_START + 0) -#define SPEAR300_VIRQ_IT_CHANGE_S (SPEAR3XX_VIRQ_START + 1) -#define SPEAR300_VIRQ_I2S (SPEAR3XX_VIRQ_START + 2) -#define SPEAR300_VIRQ_TDM (SPEAR3XX_VIRQ_START + 3) -#define SPEAR300_VIRQ_CAMERA_L (SPEAR3XX_VIRQ_START + 4) -#define SPEAR300_VIRQ_CAMERA_F (SPEAR3XX_VIRQ_START + 5) -#define SPEAR300_VIRQ_CAMERA_V (SPEAR3XX_VIRQ_START + 6) -#define SPEAR300_VIRQ_KEYBOARD (SPEAR3XX_VIRQ_START + 7) -#define SPEAR300_VIRQ_GPIO1 (SPEAR3XX_VIRQ_START + 8) - -/* IRQs sharing IRQ_GEN_RAS_3 */ -#define SPEAR300_IRQ_CLCD SPEAR3XX_IRQ_GEN_RAS_3 - -/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ -#define SPEAR300_IRQ_SDHCI SPEAR3XX_IRQ_INTRCOMM_RAS_ARM - -/* SPEAr310 Virtual irq definitions */ -/* IRQs sharing IRQ_GEN_RAS_1 */ -#define SPEAR310_VIRQ_SMII0 (SPEAR3XX_VIRQ_START + 0) -#define SPEAR310_VIRQ_SMII1 (SPEAR3XX_VIRQ_START + 1) -#define SPEAR310_VIRQ_SMII2 (SPEAR3XX_VIRQ_START + 2) -#define SPEAR310_VIRQ_SMII3 (SPEAR3XX_VIRQ_START + 3) -#define SPEAR310_VIRQ_WAKEUP_SMII0 (SPEAR3XX_VIRQ_START + 4) -#define SPEAR310_VIRQ_WAKEUP_SMII1 (SPEAR3XX_VIRQ_START + 5) -#define SPEAR310_VIRQ_WAKEUP_SMII2 (SPEAR3XX_VIRQ_START + 6) -#define SPEAR310_VIRQ_WAKEUP_SMII3 (SPEAR3XX_VIRQ_START + 7) - -/* IRQs sharing IRQ_GEN_RAS_2 */ -#define SPEAR310_VIRQ_UART1 (SPEAR3XX_VIRQ_START + 8) -#define SPEAR310_VIRQ_UART2 (SPEAR3XX_VIRQ_START + 9) -#define SPEAR310_VIRQ_UART3 (SPEAR3XX_VIRQ_START + 10) -#define SPEAR310_VIRQ_UART4 (SPEAR3XX_VIRQ_START + 11) -#define SPEAR310_VIRQ_UART5 (SPEAR3XX_VIRQ_START + 12) - -/* IRQs sharing IRQ_GEN_RAS_3 */ -#define SPEAR310_VIRQ_EMI (SPEAR3XX_VIRQ_START + 13) -#define SPEAR310_VIRQ_PLGPIO (SPEAR3XX_VIRQ_START + 14) - -/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ -#define SPEAR310_VIRQ_TDM_HDLC (SPEAR3XX_VIRQ_START + 15) -#define SPEAR310_VIRQ_RS485_0 (SPEAR3XX_VIRQ_START + 16) -#define SPEAR310_VIRQ_RS485_1 (SPEAR3XX_VIRQ_START + 17) - -/* SPEAr320 Virtual irq definitions */ -/* IRQs sharing IRQ_GEN_RAS_1 */ -#define SPEAR320_VIRQ_EMI (SPEAR3XX_VIRQ_START + 0) -#define SPEAR320_VIRQ_CLCD (SPEAR3XX_VIRQ_START + 1) -#define SPEAR320_VIRQ_SPP (SPEAR3XX_VIRQ_START + 2) - -/* IRQs sharing IRQ_GEN_RAS_2 */ -#define SPEAR320_IRQ_SDHCI SPEAR3XX_IRQ_GEN_RAS_2 - -/* IRQs sharing IRQ_GEN_RAS_3 */ -#define SPEAR320_VIRQ_PLGPIO (SPEAR3XX_VIRQ_START + 3) -#define SPEAR320_VIRQ_I2S_PLAY (SPEAR3XX_VIRQ_START + 4) -#define SPEAR320_VIRQ_I2S_REC (SPEAR3XX_VIRQ_START + 5) - -/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ -#define SPEAR320_VIRQ_CANU (SPEAR3XX_VIRQ_START + 6) -#define SPEAR320_VIRQ_CANL (SPEAR3XX_VIRQ_START + 7) -#define SPEAR320_VIRQ_UART1 (SPEAR3XX_VIRQ_START + 8) -#define SPEAR320_VIRQ_UART2 (SPEAR3XX_VIRQ_START + 9) -#define SPEAR320_VIRQ_SSP1 (SPEAR3XX_VIRQ_START + 10) -#define SPEAR320_VIRQ_SSP2 (SPEAR3XX_VIRQ_START + 11) -#define SPEAR320_VIRQ_SMII0 (SPEAR3XX_VIRQ_START + 12) -#define SPEAR320_VIRQ_MII1_SMII1 (SPEAR3XX_VIRQ_START + 13) -#define SPEAR320_VIRQ_WAKEUP_SMII0 (SPEAR3XX_VIRQ_START + 14) -#define SPEAR320_VIRQ_WAKEUP_MII1_SMII1 (SPEAR3XX_VIRQ_START + 15) -#define SPEAR320_VIRQ_I2C1 (SPEAR3XX_VIRQ_START + 16) - -/* - * GPIO pins virtual irqs - * Use the lowest number for the GPIO virtual IRQs base on which subarchs - * we have compiled in - */ -#if defined(CONFIG_MACH_SPEAR310) -#define SPEAR3XX_GPIO_INT_BASE (SPEAR3XX_VIRQ_START + 18) -#elif defined(CONFIG_MACH_SPEAR320) -#define SPEAR3XX_GPIO_INT_BASE (SPEAR3XX_VIRQ_START + 17) -#else -#define SPEAR3XX_GPIO_INT_BASE (SPEAR3XX_VIRQ_START + 9) -#endif - -#define SPEAR300_GPIO1_INT_BASE (SPEAR3XX_GPIO_INT_BASE + 8) -#define SPEAR3XX_PLGPIO_COUNT 102 - -#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) -#define SPEAR3XX_PLGPIO_INT_BASE (SPEAR3XX_GPIO_INT_BASE + 8) -#define SPEAR3XX_GPIO_INT_END (SPEAR3XX_PLGPIO_INT_BASE + \ - SPEAR3XX_PLGPIO_COUNT) -#else -#define SPEAR3XX_GPIO_INT_END (SPEAR300_GPIO1_INT_BASE + 8) -#endif - -#define SPEAR3XX_VIRQ_END SPEAR3XX_GPIO_INT_END -#define NR_IRQS SPEAR3XX_VIRQ_END +#define NR_IRQS 160 #endif /* __MACH_IRQS_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear3xx/include/mach/misc_regs.h index 5bd8cd8d4852..e0ab72e61507 100644 --- a/arch/arm/mach-spear3xx/include/mach/misc_regs.h +++ b/arch/arm/mach-spear3xx/include/mach/misc_regs.h @@ -14,151 +14,7 @@ #ifndef __MACH_MISC_REGS_H #define __MACH_MISC_REGS_H -#include - #define MISC_BASE IOMEM(VA_SPEAR3XX_ICM3_MISC_REG_BASE) - -#define SOC_CFG_CTR (MISC_BASE + 0x000) -#define DIAG_CFG_CTR (MISC_BASE + 0x004) -#define PLL1_CTR (MISC_BASE + 0x008) -#define PLL1_FRQ (MISC_BASE + 0x00C) -#define PLL1_MOD (MISC_BASE + 0x010) -#define PLL2_CTR (MISC_BASE + 0x014) -/* PLL_CTR register masks */ -#define PLL_ENABLE 2 -#define PLL_MODE_SHIFT 4 -#define PLL_MODE_MASK 0x3 -#define PLL_MODE_NORMAL 0 -#define PLL_MODE_FRACTION 1 -#define PLL_MODE_DITH_DSB 2 -#define PLL_MODE_DITH_SSB 3 - -#define PLL2_FRQ (MISC_BASE + 0x018) -/* PLL FRQ register masks */ -#define PLL_DIV_N_SHIFT 0 -#define PLL_DIV_N_MASK 0xFF -#define PLL_DIV_P_SHIFT 8 -#define PLL_DIV_P_MASK 0x7 -#define PLL_NORM_FDBK_M_SHIFT 24 -#define PLL_NORM_FDBK_M_MASK 0xFF -#define PLL_DITH_FDBK_M_SHIFT 16 -#define PLL_DITH_FDBK_M_MASK 0xFFFF - -#define PLL2_MOD (MISC_BASE + 0x01C) -#define PLL_CLK_CFG (MISC_BASE + 0x020) -#define CORE_CLK_CFG (MISC_BASE + 0x024) -/* CORE CLK CFG register masks */ -#define PLL_HCLK_RATIO_SHIFT 10 -#define PLL_HCLK_RATIO_MASK 0x3 -#define HCLK_PCLK_RATIO_SHIFT 8 -#define HCLK_PCLK_RATIO_MASK 0x3 - -#define PERIP_CLK_CFG (MISC_BASE + 0x028) -/* PERIP_CLK_CFG register masks */ -#define UART_CLK_SHIFT 4 -#define UART_CLK_MASK 0x1 -#define FIRDA_CLK_SHIFT 5 -#define FIRDA_CLK_MASK 0x3 -#define GPT0_CLK_SHIFT 8 -#define GPT1_CLK_SHIFT 11 -#define GPT2_CLK_SHIFT 12 -#define GPT_CLK_MASK 0x1 -#define AUX_CLK_PLL3_VAL 0 -#define AUX_CLK_PLL1_VAL 1 - -#define PERIP1_CLK_ENB (MISC_BASE + 0x02C) -/* PERIP1_CLK_ENB register masks */ -#define UART_CLK_ENB 3 -#define SSP_CLK_ENB 5 -#define I2C_CLK_ENB 7 -#define JPEG_CLK_ENB 8 -#define FIRDA_CLK_ENB 10 -#define GPT1_CLK_ENB 11 -#define GPT2_CLK_ENB 12 -#define ADC_CLK_ENB 15 -#define RTC_CLK_ENB 17 -#define GPIO_CLK_ENB 18 -#define DMA_CLK_ENB 19 -#define SMI_CLK_ENB 21 -#define GMAC_CLK_ENB 23 -#define USBD_CLK_ENB 24 -#define USBH_CLK_ENB 25 -#define C3_CLK_ENB 31 - -#define SOC_CORE_ID (MISC_BASE + 0x030) -#define RAS_CLK_ENB (MISC_BASE + 0x034) -#define PERIP1_SOF_RST (MISC_BASE + 0x038) -/* PERIP1_SOF_RST register masks */ -#define JPEG_SOF_RST 8 - -#define SOC_USER_ID (MISC_BASE + 0x03C) -#define RAS_SOF_RST (MISC_BASE + 0x040) -#define PRSC1_CLK_CFG (MISC_BASE + 0x044) -#define PRSC2_CLK_CFG (MISC_BASE + 0x048) -#define PRSC3_CLK_CFG (MISC_BASE + 0x04C) -/* gpt synthesizer register masks */ -#define GPT_MSCALE_SHIFT 0 -#define GPT_MSCALE_MASK 0xFFF -#define GPT_NSCALE_SHIFT 12 -#define GPT_NSCALE_MASK 0xF - -#define AMEM_CLK_CFG (MISC_BASE + 0x050) -#define EXPI_CLK_CFG (MISC_BASE + 0x054) -#define CLCD_CLK_SYNT (MISC_BASE + 0x05C) -#define FIRDA_CLK_SYNT (MISC_BASE + 0x060) -#define UART_CLK_SYNT (MISC_BASE + 0x064) -#define GMAC_CLK_SYNT (MISC_BASE + 0x068) -#define RAS1_CLK_SYNT (MISC_BASE + 0x06C) -#define RAS2_CLK_SYNT (MISC_BASE + 0x070) -#define RAS3_CLK_SYNT (MISC_BASE + 0x074) -#define RAS4_CLK_SYNT (MISC_BASE + 0x078) -/* aux clk synthesiser register masks for irda to ras4 */ -#define AUX_SYNT_ENB 31 -#define AUX_EQ_SEL_SHIFT 30 -#define AUX_EQ_SEL_MASK 1 -#define AUX_EQ1_SEL 0 -#define AUX_EQ2_SEL 1 -#define AUX_XSCALE_SHIFT 16 -#define AUX_XSCALE_MASK 0xFFF -#define AUX_YSCALE_SHIFT 0 -#define AUX_YSCALE_MASK 0xFFF - -#define ICM1_ARB_CFG (MISC_BASE + 0x07C) -#define ICM2_ARB_CFG (MISC_BASE + 0x080) -#define ICM3_ARB_CFG (MISC_BASE + 0x084) -#define ICM4_ARB_CFG (MISC_BASE + 0x088) -#define ICM5_ARB_CFG (MISC_BASE + 0x08C) -#define ICM6_ARB_CFG (MISC_BASE + 0x090) -#define ICM7_ARB_CFG (MISC_BASE + 0x094) -#define ICM8_ARB_CFG (MISC_BASE + 0x098) -#define ICM9_ARB_CFG (MISC_BASE + 0x09C) #define DMA_CHN_CFG (MISC_BASE + 0x0A0) -#define USB2_PHY_CFG (MISC_BASE + 0x0A4) -#define GMAC_CFG_CTR (MISC_BASE + 0x0A8) -#define EXPI_CFG_CTR (MISC_BASE + 0x0AC) -#define PRC1_LOCK_CTR (MISC_BASE + 0x0C0) -#define PRC2_LOCK_CTR (MISC_BASE + 0x0C4) -#define PRC3_LOCK_CTR (MISC_BASE + 0x0C8) -#define PRC4_LOCK_CTR (MISC_BASE + 0x0CC) -#define PRC1_IRQ_CTR (MISC_BASE + 0x0D0) -#define PRC2_IRQ_CTR (MISC_BASE + 0x0D4) -#define PRC3_IRQ_CTR (MISC_BASE + 0x0D8) -#define PRC4_IRQ_CTR (MISC_BASE + 0x0DC) -#define PWRDOWN_CFG_CTR (MISC_BASE + 0x0E0) -#define COMPSSTL_1V8_CFG (MISC_BASE + 0x0E4) -#define COMPSSTL_2V5_CFG (MISC_BASE + 0x0E8) -#define COMPCOR_3V3_CFG (MISC_BASE + 0x0EC) -#define SSTLPAD_CFG_CTR (MISC_BASE + 0x0F0) -#define BIST1_CFG_CTR (MISC_BASE + 0x0F4) -#define BIST2_CFG_CTR (MISC_BASE + 0x0F8) -#define BIST3_CFG_CTR (MISC_BASE + 0x0FC) -#define BIST4_CFG_CTR (MISC_BASE + 0x100) -#define BIST5_CFG_CTR (MISC_BASE + 0x104) -#define BIST1_STS_RES (MISC_BASE + 0x108) -#define BIST2_STS_RES (MISC_BASE + 0x10C) -#define BIST3_STS_RES (MISC_BASE + 0x110) -#define BIST4_STS_RES (MISC_BASE + 0x114) -#define BIST5_STS_RES (MISC_BASE + 0x118) -#define SYSERR_CFG_CTR (MISC_BASE + 0x11C) #endif /* __MACH_MISC_REGS_H */ diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h index 8e3900aa0d45..6d4dadc67633 100644 --- a/arch/arm/mach-spear3xx/include/mach/spear.h +++ b/arch/arm/mach-spear3xx/include/mach/spear.h @@ -15,61 +15,27 @@ #define __MACH_SPEAR3XX_H #include -#include -#include -#include - -#define SPEAR3XX_ML_SDRAM_BASE UL(0x00000000) - -#define SPEAR3XX_ICM9_BASE UL(0xC0000000) /* ICM1 - Low speed connection */ #define SPEAR3XX_ICM1_2_BASE UL(0xD0000000) #define VA_SPEAR3XX_ICM1_2_BASE UL(0xFD000000) #define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000) #define VA_SPEAR3XX_ICM1_UART_BASE (VA_SPEAR3XX_ICM1_2_BASE | SPEAR3XX_ICM1_UART_BASE) -#define SPEAR3XX_ICM1_ADC_BASE UL(0xD0080000) #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) -#define SPEAR3XX_ICM1_I2C_BASE UL(0xD0180000) -#define SPEAR3XX_ICM1_JPEG_BASE UL(0xD0800000) -#define SPEAR3XX_ICM1_IRDA_BASE UL(0xD1000000) -#define SPEAR3XX_ICM1_SRAM_BASE UL(0xD2800000) - -/* ICM2 - Application Subsystem */ -#define SPEAR3XX_ICM2_HWACCEL0_BASE UL(0xD8800000) -#define SPEAR3XX_ICM2_HWACCEL1_BASE UL(0xD9000000) - -/* ICM4 - High Speed Connection */ -#define SPEAR3XX_ICM4_BASE UL(0xE0000000) -#define SPEAR3XX_ICM4_MII_BASE UL(0xE0800000) -#define SPEAR3XX_ICM4_USBD_FIFO_BASE UL(0xE1000000) -#define SPEAR3XX_ICM4_USBD_CSR_BASE UL(0xE1100000) -#define SPEAR3XX_ICM4_USBD_PLDT_BASE UL(0xE1200000) -#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE UL(0xE1800000) -#define SPEAR3XX_ICM4_USB_OHCI0_BASE UL(0xE1900000) -#define SPEAR3XX_ICM4_USB_OHCI1_BASE UL(0xE2100000) -#define SPEAR3XX_ICM4_USB_ARB_BASE UL(0xE2800000) /* ML1 - Multi Layer CPU Subsystem */ #define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000) -#define SPEAR3XX_ML1_TMR_BASE UL(0xF0000000) -#define SPEAR3XX_ML1_VIC_BASE UL(0xF1100000) +#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) +#define SPEAR3XX_CPU_TMR_BASE UL(0xF0000000) /* ICM3 - Basic Subsystem */ -#define SPEAR3XX_ICM3_SMEM_BASE UL(0xF8000000) #define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) #define VA_SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) #define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000) -#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE UL(0xFC600000) -#define SPEAR3XX_ICM3_TMR0_BASE UL(0xFC800000) -#define SPEAR3XX_ICM3_WDT_BASE UL(0xFC880000) -#define SPEAR3XX_ICM3_RTC_BASE UL(0xFC900000) -#define SPEAR3XX_ICM3_GPIO_BASE UL(0xFC980000) #define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000) #define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_SYS_CTRL_BASE) #define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000) #define VA_SPEAR3XX_ICM3_MISC_REG_BASE (VA_SPEAR3XX_ICM3_SMI_CTRL_BASE | SPEAR3XX_ICM3_MISC_REG_BASE) -#define SPEAR3XX_ICM3_TMR1_BASE UL(0xFCB00000) /* Debug uart for linux, will be used for debug and uncompress messages */ #define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE diff --git a/arch/arm/mach-spear3xx/include/mach/spear300.h b/arch/arm/mach-spear3xx/include/mach/spear300.h deleted file mode 100644 index 3b6ea0729040..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/spear300.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/spear300.h - * - * SPEAr300 Machine specific definition - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifdef CONFIG_MACH_SPEAR300 - -#ifndef __MACH_SPEAR300_H -#define __MACH_SPEAR300_H - -/* Base address of various IPs */ -#define SPEAR300_TELECOM_BASE UL(0x50000000) - -/* Interrupt registers offsets and masks */ -#define SPEAR300_INT_ENB_MASK_REG 0x54 -#define SPEAR300_INT_STS_MASK_REG 0x58 -#define SPEAR300_IT_PERS_S_IRQ_MASK (1 << 0) -#define SPEAR300_IT_CHANGE_S_IRQ_MASK (1 << 1) -#define SPEAR300_I2S_IRQ_MASK (1 << 2) -#define SPEAR300_TDM_IRQ_MASK (1 << 3) -#define SPEAR300_CAMERA_L_IRQ_MASK (1 << 4) -#define SPEAR300_CAMERA_F_IRQ_MASK (1 << 5) -#define SPEAR300_CAMERA_V_IRQ_MASK (1 << 6) -#define SPEAR300_KEYBOARD_IRQ_MASK (1 << 7) -#define SPEAR300_GPIO1_IRQ_MASK (1 << 8) - -#define SPEAR300_SHIRQ_RAS1_MASK 0x1FF - -#define SPEAR300_CLCD_BASE UL(0x60000000) -#define SPEAR300_SDHCI_BASE UL(0x70000000) -#define SPEAR300_NAND_0_BASE UL(0x80000000) -#define SPEAR300_NAND_1_BASE UL(0x84000000) -#define SPEAR300_NAND_2_BASE UL(0x88000000) -#define SPEAR300_NAND_3_BASE UL(0x8c000000) -#define SPEAR300_NOR_0_BASE UL(0x90000000) -#define SPEAR300_NOR_1_BASE UL(0x91000000) -#define SPEAR300_NOR_2_BASE UL(0x92000000) -#define SPEAR300_NOR_3_BASE UL(0x93000000) -#define SPEAR300_FSMC_BASE UL(0x94000000) -#define SPEAR300_SOC_CONFIG_BASE UL(0x99000000) -#define SPEAR300_KEYBOARD_BASE UL(0xA0000000) -#define SPEAR300_GPIO_BASE UL(0xA9000000) - -#endif /* __MACH_SPEAR300_H */ - -#endif /* CONFIG_MACH_SPEAR300 */ diff --git a/arch/arm/mach-spear3xx/include/mach/spear310.h b/arch/arm/mach-spear3xx/include/mach/spear310.h deleted file mode 100644 index 1567d0da725f..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/spear310.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/spear310.h - * - * SPEAr310 Machine specific definition - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifdef CONFIG_MACH_SPEAR310 - -#ifndef __MACH_SPEAR310_H -#define __MACH_SPEAR310_H - -#define SPEAR310_NAND_BASE UL(0x40000000) -#define SPEAR310_FSMC_BASE UL(0x44000000) -#define SPEAR310_UART1_BASE UL(0xB2000000) -#define SPEAR310_UART2_BASE UL(0xB2080000) -#define SPEAR310_UART3_BASE UL(0xB2100000) -#define SPEAR310_UART4_BASE UL(0xB2180000) -#define SPEAR310_UART5_BASE UL(0xB2200000) -#define SPEAR310_HDLC_BASE UL(0xB2800000) -#define SPEAR310_RS485_0_BASE UL(0xB3000000) -#define SPEAR310_RS485_1_BASE UL(0xB3800000) -#define SPEAR310_SOC_CONFIG_BASE UL(0xB4000000) - -/* Interrupt registers offsets and masks */ -#define SPEAR310_INT_STS_MASK_REG 0x04 -#define SPEAR310_SMII0_IRQ_MASK (1 << 0) -#define SPEAR310_SMII1_IRQ_MASK (1 << 1) -#define SPEAR310_SMII2_IRQ_MASK (1 << 2) -#define SPEAR310_SMII3_IRQ_MASK (1 << 3) -#define SPEAR310_WAKEUP_SMII0_IRQ_MASK (1 << 4) -#define SPEAR310_WAKEUP_SMII1_IRQ_MASK (1 << 5) -#define SPEAR310_WAKEUP_SMII2_IRQ_MASK (1 << 6) -#define SPEAR310_WAKEUP_SMII3_IRQ_MASK (1 << 7) -#define SPEAR310_UART1_IRQ_MASK (1 << 8) -#define SPEAR310_UART2_IRQ_MASK (1 << 9) -#define SPEAR310_UART3_IRQ_MASK (1 << 10) -#define SPEAR310_UART4_IRQ_MASK (1 << 11) -#define SPEAR310_UART5_IRQ_MASK (1 << 12) -#define SPEAR310_EMI_IRQ_MASK (1 << 13) -#define SPEAR310_TDM_HDLC_IRQ_MASK (1 << 14) -#define SPEAR310_RS485_0_IRQ_MASK (1 << 15) -#define SPEAR310_RS485_1_IRQ_MASK (1 << 16) - -#define SPEAR310_SHIRQ_RAS1_MASK 0x000FF -#define SPEAR310_SHIRQ_RAS2_MASK 0x01F00 -#define SPEAR310_SHIRQ_RAS3_MASK 0x02000 -#define SPEAR310_SHIRQ_INTRCOMM_RAS_MASK 0x1C000 - -#endif /* __MACH_SPEAR310_H */ - -#endif /* CONFIG_MACH_SPEAR310 */ diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h deleted file mode 100644 index 8cfa83fa1296..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/spear320.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * arch/arm/mach-spear3xx/include/mach/spear320.h - * - * SPEAr320 Machine specific definition - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifdef CONFIG_MACH_SPEAR320 - -#ifndef __MACH_SPEAR320_H -#define __MACH_SPEAR320_H - -#define SPEAR320_EMI_CTRL_BASE UL(0x40000000) -#define SPEAR320_FSMC_BASE UL(0x4C000000) -#define SPEAR320_NAND_BASE UL(0x50000000) -#define SPEAR320_I2S_BASE UL(0x60000000) -#define SPEAR320_SDHCI_BASE UL(0x70000000) -#define SPEAR320_CLCD_BASE UL(0x90000000) -#define SPEAR320_PAR_PORT_BASE UL(0xA0000000) -#define SPEAR320_CAN0_BASE UL(0xA1000000) -#define SPEAR320_CAN1_BASE UL(0xA2000000) -#define SPEAR320_UART1_BASE UL(0xA3000000) -#define SPEAR320_UART2_BASE UL(0xA4000000) -#define SPEAR320_SSP0_BASE UL(0xA5000000) -#define SPEAR320_SSP1_BASE UL(0xA6000000) -#define SPEAR320_I2C_BASE UL(0xA7000000) -#define SPEAR320_PWM_BASE UL(0xA8000000) -#define SPEAR320_SMII0_BASE UL(0xAA000000) -#define SPEAR320_SMII1_BASE UL(0xAB000000) -#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) - -/* Interrupt registers offsets and masks */ -#define SPEAR320_INT_STS_MASK_REG 0x04 -#define SPEAR320_INT_CLR_MASK_REG 0x04 -#define SPEAR320_INT_ENB_MASK_REG 0x08 -#define SPEAR320_GPIO_IRQ_MASK (1 << 0) -#define SPEAR320_I2S_PLAY_IRQ_MASK (1 << 1) -#define SPEAR320_I2S_REC_IRQ_MASK (1 << 2) -#define SPEAR320_EMI_IRQ_MASK (1 << 7) -#define SPEAR320_CLCD_IRQ_MASK (1 << 8) -#define SPEAR320_SPP_IRQ_MASK (1 << 9) -#define SPEAR320_SDHCI_IRQ_MASK (1 << 10) -#define SPEAR320_CAN_U_IRQ_MASK (1 << 11) -#define SPEAR320_CAN_L_IRQ_MASK (1 << 12) -#define SPEAR320_UART1_IRQ_MASK (1 << 13) -#define SPEAR320_UART2_IRQ_MASK (1 << 14) -#define SPEAR320_SSP1_IRQ_MASK (1 << 15) -#define SPEAR320_SSP2_IRQ_MASK (1 << 16) -#define SPEAR320_SMII0_IRQ_MASK (1 << 17) -#define SPEAR320_MII1_SMII1_IRQ_MASK (1 << 18) -#define SPEAR320_WAKEUP_SMII0_IRQ_MASK (1 << 19) -#define SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK (1 << 20) -#define SPEAR320_I2C1_IRQ_MASK (1 << 21) - -#define SPEAR320_SHIRQ_RAS1_MASK 0x000380 -#define SPEAR320_SHIRQ_RAS3_MASK 0x000007 -#define SPEAR320_SHIRQ_INTRCOMM_RAS_MASK 0x3FF800 - -#endif /* __MACH_SPEAR320_H */ - -#endif /* CONFIG_MACH_SPEAR320 */ diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index f46fc2692ab6..febcdd8d4e92 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c @@ -19,7 +19,46 @@ #include #include #include -#include +#include + +/* Base address of various IPs */ +#define SPEAR300_TELECOM_BASE UL(0x50000000) + +/* Interrupt registers offsets and masks */ +#define SPEAR300_INT_ENB_MASK_REG 0x54 +#define SPEAR300_INT_STS_MASK_REG 0x58 +#define SPEAR300_IT_PERS_S_IRQ_MASK (1 << 0) +#define SPEAR300_IT_CHANGE_S_IRQ_MASK (1 << 1) +#define SPEAR300_I2S_IRQ_MASK (1 << 2) +#define SPEAR300_TDM_IRQ_MASK (1 << 3) +#define SPEAR300_CAMERA_L_IRQ_MASK (1 << 4) +#define SPEAR300_CAMERA_F_IRQ_MASK (1 << 5) +#define SPEAR300_CAMERA_V_IRQ_MASK (1 << 6) +#define SPEAR300_KEYBOARD_IRQ_MASK (1 << 7) +#define SPEAR300_GPIO1_IRQ_MASK (1 << 8) + +#define SPEAR300_SHIRQ_RAS1_MASK 0x1FF + +#define SPEAR300_SOC_CONFIG_BASE UL(0x99000000) + + +/* SPEAr300 Virtual irq definitions */ +/* IRQs sharing IRQ_GEN_RAS_1 */ +#define SPEAR300_VIRQ_IT_PERS_S (SPEAR3XX_VIRQ_START + 0) +#define SPEAR300_VIRQ_IT_CHANGE_S (SPEAR3XX_VIRQ_START + 1) +#define SPEAR300_VIRQ_I2S (SPEAR3XX_VIRQ_START + 2) +#define SPEAR300_VIRQ_TDM (SPEAR3XX_VIRQ_START + 3) +#define SPEAR300_VIRQ_CAMERA_L (SPEAR3XX_VIRQ_START + 4) +#define SPEAR300_VIRQ_CAMERA_F (SPEAR3XX_VIRQ_START + 5) +#define SPEAR300_VIRQ_CAMERA_V (SPEAR3XX_VIRQ_START + 6) +#define SPEAR300_VIRQ_KEYBOARD (SPEAR3XX_VIRQ_START + 7) +#define SPEAR300_VIRQ_GPIO1 (SPEAR3XX_VIRQ_START + 8) + +/* IRQs sharing IRQ_GEN_RAS_3 */ +#define SPEAR300_IRQ_CLCD SPEAR3XX_IRQ_GEN_RAS_3 + +/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ +#define SPEAR300_IRQ_SDHCI SPEAR3XX_IRQ_INTRCOMM_RAS_ARM /* pad multiplexing support */ /* muxing registers */ diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c index 063e7da0438a..b26e41566b50 100644 --- a/arch/arm/mach-spear3xx/spear310.c +++ b/arch/arm/mach-spear3xx/spear310.c @@ -20,7 +20,67 @@ #include #include #include -#include +#include + +#define SPEAR310_UART1_BASE UL(0xB2000000) +#define SPEAR310_UART2_BASE UL(0xB2080000) +#define SPEAR310_UART3_BASE UL(0xB2100000) +#define SPEAR310_UART4_BASE UL(0xB2180000) +#define SPEAR310_UART5_BASE UL(0xB2200000) +#define SPEAR310_SOC_CONFIG_BASE UL(0xB4000000) + +/* Interrupt registers offsets and masks */ +#define SPEAR310_INT_STS_MASK_REG 0x04 +#define SPEAR310_SMII0_IRQ_MASK (1 << 0) +#define SPEAR310_SMII1_IRQ_MASK (1 << 1) +#define SPEAR310_SMII2_IRQ_MASK (1 << 2) +#define SPEAR310_SMII3_IRQ_MASK (1 << 3) +#define SPEAR310_WAKEUP_SMII0_IRQ_MASK (1 << 4) +#define SPEAR310_WAKEUP_SMII1_IRQ_MASK (1 << 5) +#define SPEAR310_WAKEUP_SMII2_IRQ_MASK (1 << 6) +#define SPEAR310_WAKEUP_SMII3_IRQ_MASK (1 << 7) +#define SPEAR310_UART1_IRQ_MASK (1 << 8) +#define SPEAR310_UART2_IRQ_MASK (1 << 9) +#define SPEAR310_UART3_IRQ_MASK (1 << 10) +#define SPEAR310_UART4_IRQ_MASK (1 << 11) +#define SPEAR310_UART5_IRQ_MASK (1 << 12) +#define SPEAR310_EMI_IRQ_MASK (1 << 13) +#define SPEAR310_TDM_HDLC_IRQ_MASK (1 << 14) +#define SPEAR310_RS485_0_IRQ_MASK (1 << 15) +#define SPEAR310_RS485_1_IRQ_MASK (1 << 16) + +#define SPEAR310_SHIRQ_RAS1_MASK 0x000FF +#define SPEAR310_SHIRQ_RAS2_MASK 0x01F00 +#define SPEAR310_SHIRQ_RAS3_MASK 0x02000 +#define SPEAR310_SHIRQ_INTRCOMM_RAS_MASK 0x1C000 + +/* SPEAr310 Virtual irq definitions */ +/* IRQs sharing IRQ_GEN_RAS_1 */ +#define SPEAR310_VIRQ_SMII0 (SPEAR3XX_VIRQ_START + 0) +#define SPEAR310_VIRQ_SMII1 (SPEAR3XX_VIRQ_START + 1) +#define SPEAR310_VIRQ_SMII2 (SPEAR3XX_VIRQ_START + 2) +#define SPEAR310_VIRQ_SMII3 (SPEAR3XX_VIRQ_START + 3) +#define SPEAR310_VIRQ_WAKEUP_SMII0 (SPEAR3XX_VIRQ_START + 4) +#define SPEAR310_VIRQ_WAKEUP_SMII1 (SPEAR3XX_VIRQ_START + 5) +#define SPEAR310_VIRQ_WAKEUP_SMII2 (SPEAR3XX_VIRQ_START + 6) +#define SPEAR310_VIRQ_WAKEUP_SMII3 (SPEAR3XX_VIRQ_START + 7) + +/* IRQs sharing IRQ_GEN_RAS_2 */ +#define SPEAR310_VIRQ_UART1 (SPEAR3XX_VIRQ_START + 8) +#define SPEAR310_VIRQ_UART2 (SPEAR3XX_VIRQ_START + 9) +#define SPEAR310_VIRQ_UART3 (SPEAR3XX_VIRQ_START + 10) +#define SPEAR310_VIRQ_UART4 (SPEAR3XX_VIRQ_START + 11) +#define SPEAR310_VIRQ_UART5 (SPEAR3XX_VIRQ_START + 12) + +/* IRQs sharing IRQ_GEN_RAS_3 */ +#define SPEAR310_VIRQ_EMI (SPEAR3XX_VIRQ_START + 13) +#define SPEAR310_VIRQ_PLGPIO (SPEAR3XX_VIRQ_START + 14) + +/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ +#define SPEAR310_VIRQ_TDM_HDLC (SPEAR3XX_VIRQ_START + 15) +#define SPEAR310_VIRQ_RS485_0 (SPEAR3XX_VIRQ_START + 16) +#define SPEAR310_VIRQ_RS485_1 (SPEAR3XX_VIRQ_START + 17) + /* pad multiplexing support */ /* muxing registers */ diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c index 1e74031e1213..2f5979b0c169 100644 --- a/arch/arm/mach-spear3xx/spear320.c +++ b/arch/arm/mach-spear3xx/spear320.c @@ -21,7 +21,67 @@ #include #include #include -#include +#include + +#define SPEAR320_UART1_BASE UL(0xA3000000) +#define SPEAR320_UART2_BASE UL(0xA4000000) +#define SPEAR320_SSP0_BASE UL(0xA5000000) +#define SPEAR320_SSP1_BASE UL(0xA6000000) +#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) + +/* Interrupt registers offsets and masks */ +#define SPEAR320_INT_STS_MASK_REG 0x04 +#define SPEAR320_INT_CLR_MASK_REG 0x04 +#define SPEAR320_INT_ENB_MASK_REG 0x08 +#define SPEAR320_GPIO_IRQ_MASK (1 << 0) +#define SPEAR320_I2S_PLAY_IRQ_MASK (1 << 1) +#define SPEAR320_I2S_REC_IRQ_MASK (1 << 2) +#define SPEAR320_EMI_IRQ_MASK (1 << 7) +#define SPEAR320_CLCD_IRQ_MASK (1 << 8) +#define SPEAR320_SPP_IRQ_MASK (1 << 9) +#define SPEAR320_SDHCI_IRQ_MASK (1 << 10) +#define SPEAR320_CAN_U_IRQ_MASK (1 << 11) +#define SPEAR320_CAN_L_IRQ_MASK (1 << 12) +#define SPEAR320_UART1_IRQ_MASK (1 << 13) +#define SPEAR320_UART2_IRQ_MASK (1 << 14) +#define SPEAR320_SSP1_IRQ_MASK (1 << 15) +#define SPEAR320_SSP2_IRQ_MASK (1 << 16) +#define SPEAR320_SMII0_IRQ_MASK (1 << 17) +#define SPEAR320_MII1_SMII1_IRQ_MASK (1 << 18) +#define SPEAR320_WAKEUP_SMII0_IRQ_MASK (1 << 19) +#define SPEAR320_WAKEUP_MII1_SMII1_IRQ_MASK (1 << 20) +#define SPEAR320_I2C1_IRQ_MASK (1 << 21) + +#define SPEAR320_SHIRQ_RAS1_MASK 0x000380 +#define SPEAR320_SHIRQ_RAS3_MASK 0x000007 +#define SPEAR320_SHIRQ_INTRCOMM_RAS_MASK 0x3FF800 + +/* SPEAr320 Virtual irq definitions */ +/* IRQs sharing IRQ_GEN_RAS_1 */ +#define SPEAR320_VIRQ_EMI (SPEAR3XX_VIRQ_START + 0) +#define SPEAR320_VIRQ_CLCD (SPEAR3XX_VIRQ_START + 1) +#define SPEAR320_VIRQ_SPP (SPEAR3XX_VIRQ_START + 2) + +/* IRQs sharing IRQ_GEN_RAS_2 */ +#define SPEAR320_IRQ_SDHCI SPEAR3XX_IRQ_GEN_RAS_2 + +/* IRQs sharing IRQ_GEN_RAS_3 */ +#define SPEAR320_VIRQ_PLGPIO (SPEAR3XX_VIRQ_START + 3) +#define SPEAR320_VIRQ_I2S_PLAY (SPEAR3XX_VIRQ_START + 4) +#define SPEAR320_VIRQ_I2S_REC (SPEAR3XX_VIRQ_START + 5) + +/* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ +#define SPEAR320_VIRQ_CANU (SPEAR3XX_VIRQ_START + 6) +#define SPEAR320_VIRQ_CANL (SPEAR3XX_VIRQ_START + 7) +#define SPEAR320_VIRQ_UART1 (SPEAR3XX_VIRQ_START + 8) +#define SPEAR320_VIRQ_UART2 (SPEAR3XX_VIRQ_START + 9) +#define SPEAR320_VIRQ_SSP1 (SPEAR3XX_VIRQ_START + 10) +#define SPEAR320_VIRQ_SSP2 (SPEAR3XX_VIRQ_START + 11) +#define SPEAR320_VIRQ_SMII0 (SPEAR3XX_VIRQ_START + 12) +#define SPEAR320_VIRQ_MII1_SMII1 (SPEAR3XX_VIRQ_START + 13) +#define SPEAR320_VIRQ_WAKEUP_SMII0 (SPEAR3XX_VIRQ_START + 14) +#define SPEAR320_VIRQ_WAKEUP_MII1_SMII1 (SPEAR3XX_VIRQ_START + 15) +#define SPEAR320_VIRQ_I2C1 (SPEAR3XX_VIRQ_START + 16) /* pad multiplexing support */ /* muxing registers */ diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index 17d4ac9a95e1..bbb11efa6056 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include /* pad multiplexing support */ /* devices */ @@ -534,7 +534,7 @@ static void __init spear3xx_timer_init(void) clk_put(gpt_clk); clk_put(pclk); - spear_setup_timer(); + spear_setup_timer(SPEAR3XX_CPU_TMR_BASE, SPEAR3XX_IRQ_CPU_GPT1_1); } struct sys_timer spear3xx_timer = { diff --git a/arch/arm/mach-spear6xx/clock.c b/arch/arm/mach-spear6xx/clock.c index adadef2b27b4..bef77d43db87 100644 --- a/arch/arm/mach-spear6xx/clock.c +++ b/arch/arm/mach-spear6xx/clock.c @@ -16,6 +16,112 @@ #include #include #include +#include + +#define PLL1_CTR (MISC_BASE + 0x008) +#define PLL1_FRQ (MISC_BASE + 0x00C) +#define PLL1_MOD (MISC_BASE + 0x010) +#define PLL2_CTR (MISC_BASE + 0x014) +/* PLL_CTR register masks */ +#define PLL_ENABLE 2 +#define PLL_MODE_SHIFT 4 +#define PLL_MODE_MASK 0x3 +#define PLL_MODE_NORMAL 0 +#define PLL_MODE_FRACTION 1 +#define PLL_MODE_DITH_DSB 2 +#define PLL_MODE_DITH_SSB 3 + +#define PLL2_FRQ (MISC_BASE + 0x018) +/* PLL FRQ register masks */ +#define PLL_DIV_N_SHIFT 0 +#define PLL_DIV_N_MASK 0xFF +#define PLL_DIV_P_SHIFT 8 +#define PLL_DIV_P_MASK 0x7 +#define PLL_NORM_FDBK_M_SHIFT 24 +#define PLL_NORM_FDBK_M_MASK 0xFF +#define PLL_DITH_FDBK_M_SHIFT 16 +#define PLL_DITH_FDBK_M_MASK 0xFFFF + +#define PLL2_MOD (MISC_BASE + 0x01C) +#define PLL_CLK_CFG (MISC_BASE + 0x020) +#define CORE_CLK_CFG (MISC_BASE + 0x024) +/* CORE CLK CFG register masks */ +#define PLL_HCLK_RATIO_SHIFT 10 +#define PLL_HCLK_RATIO_MASK 0x3 +#define HCLK_PCLK_RATIO_SHIFT 8 +#define HCLK_PCLK_RATIO_MASK 0x3 + +#define PERIP_CLK_CFG (MISC_BASE + 0x028) +/* PERIP_CLK_CFG register masks */ +#define CLCD_CLK_SHIFT 2 +#define CLCD_CLK_MASK 0x3 +#define UART_CLK_SHIFT 4 +#define UART_CLK_MASK 0x1 +#define FIRDA_CLK_SHIFT 5 +#define FIRDA_CLK_MASK 0x3 +#define GPT0_CLK_SHIFT 8 +#define GPT1_CLK_SHIFT 10 +#define GPT2_CLK_SHIFT 11 +#define GPT3_CLK_SHIFT 12 +#define GPT_CLK_MASK 0x1 +#define AUX_CLK_PLL3_VAL 0 +#define AUX_CLK_PLL1_VAL 1 + +#define PERIP1_CLK_ENB (MISC_BASE + 0x02C) +/* PERIP1_CLK_ENB register masks */ +#define UART0_CLK_ENB 3 +#define UART1_CLK_ENB 4 +#define SSP0_CLK_ENB 5 +#define SSP1_CLK_ENB 6 +#define I2C_CLK_ENB 7 +#define JPEG_CLK_ENB 8 +#define FSMC_CLK_ENB 9 +#define FIRDA_CLK_ENB 10 +#define GPT2_CLK_ENB 11 +#define GPT3_CLK_ENB 12 +#define GPIO2_CLK_ENB 13 +#define SSP2_CLK_ENB 14 +#define ADC_CLK_ENB 15 +#define GPT1_CLK_ENB 11 +#define RTC_CLK_ENB 17 +#define GPIO1_CLK_ENB 18 +#define DMA_CLK_ENB 19 +#define SMI_CLK_ENB 21 +#define CLCD_CLK_ENB 22 +#define GMAC_CLK_ENB 23 +#define USBD_CLK_ENB 24 +#define USBH0_CLK_ENB 25 +#define USBH1_CLK_ENB 26 + +#define PRSC1_CLK_CFG (MISC_BASE + 0x044) +#define PRSC2_CLK_CFG (MISC_BASE + 0x048) +#define PRSC3_CLK_CFG (MISC_BASE + 0x04C) +/* gpt synthesizer register masks */ +#define GPT_MSCALE_SHIFT 0 +#define GPT_MSCALE_MASK 0xFFF +#define GPT_NSCALE_SHIFT 12 +#define GPT_NSCALE_MASK 0xF + +#define AMEM_CLK_CFG (MISC_BASE + 0x050) +#define EXPI_CLK_CFG (MISC_BASE + 0x054) +#define CLCD_CLK_SYNT (MISC_BASE + 0x05C) +#define FIRDA_CLK_SYNT (MISC_BASE + 0x060) +#define UART_CLK_SYNT (MISC_BASE + 0x064) +#define GMAC_CLK_SYNT (MISC_BASE + 0x068) +#define RAS1_CLK_SYNT (MISC_BASE + 0x06C) +#define RAS2_CLK_SYNT (MISC_BASE + 0x070) +#define RAS3_CLK_SYNT (MISC_BASE + 0x074) +#define RAS4_CLK_SYNT (MISC_BASE + 0x078) +/* aux clk synthesiser register masks for irda to ras4 */ +#define AUX_SYNT_ENB 31 +#define AUX_EQ_SEL_SHIFT 30 +#define AUX_EQ_SEL_MASK 1 +#define AUX_EQ1_SEL 0 +#define AUX_EQ2_SEL 1 +#define AUX_XSCALE_SHIFT 16 +#define AUX_XSCALE_MASK 0xFFF +#define AUX_YSCALE_SHIFT 0 +#define AUX_YSCALE_MASK 0xFFF /* root clks */ /* 32 KHz oscillator clock */ diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h index 116b99301cf5..7167fd331d86 100644 --- a/arch/arm/mach-spear6xx/include/mach/generic.h +++ b/arch/arm/mach-spear6xx/include/mach/generic.h @@ -15,34 +15,9 @@ #define __MACH_GENERIC_H #include -#include -#include -#include -#include - -/* - * Each GPT has 2 timer channels - * Following GPT channels will be used as clock source and clockevent - */ -#define SPEAR_GPT0_BASE SPEAR6XX_CPU_TMR_BASE -#define SPEAR_GPT0_CHAN0_IRQ IRQ_CPU_GPT1_1 -#define SPEAR_GPT0_CHAN1_IRQ IRQ_CPU_GPT1_2 - -/* Add spear6xx family device structure declarations here */ -extern struct amba_device gpio_device[]; -extern struct amba_device uart_device[]; -extern struct sys_timer spear6xx_timer; - -/* Add spear6xx family function declarations here */ -void __init spear_setup_timer(void); -void __init spear6xx_map_io(void); -void __init spear6xx_init_irq(void); -void __init spear6xx_init(void); -void __init spear600_init(void); -void __init spear6xx_clk_init(void); +void __init spear_setup_timer(resource_size_t base, int irq); void spear_restart(char, const char *); - -/* Add spear600 machine device structure declarations here */ +void __init spear6xx_clk_init(void); #endif /* __MACH_GENERIC_H */ diff --git a/arch/arm/mach-spear6xx/include/mach/hardware.h b/arch/arm/mach-spear6xx/include/mach/hardware.h index 0b3f96ae2848..40a8c178f10d 100644 --- a/arch/arm/mach-spear6xx/include/mach/hardware.h +++ b/arch/arm/mach-spear6xx/include/mach/hardware.h @@ -1,23 +1 @@ -/* - * arch/arm/mach-spear6xx/include/mach/hardware.h - * - * Hardware definitions for SPEAr6xx machine family - * - * Copyright (C) 2009 ST Microelectronics - * Rajeev Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __MACH_HARDWARE_H -#define __MACH_HARDWARE_H - -#include -#include - -/* Vitual to physical translation of statically mapped space */ -#define IO_ADDRESS(x) (x | 0xF0000000) - -#endif /* __MACH_HARDWARE_H */ +/* empty */ diff --git a/arch/arm/mach-spear6xx/include/mach/irqs.h b/arch/arm/mach-spear6xx/include/mach/irqs.h index 8f214b03d75d..2b735389e74b 100644 --- a/arch/arm/mach-spear6xx/include/mach/irqs.h +++ b/arch/arm/mach-spear6xx/include/mach/irqs.h @@ -16,82 +16,13 @@ /* IRQ definitions */ /* VIC 1 */ -#define IRQ_INTRCOMM_SW_IRQ 0 -#define IRQ_INTRCOMM_CPU_1 1 -#define IRQ_INTRCOMM_CPU_2 2 -#define IRQ_INTRCOMM_RAS2A11_1 3 -#define IRQ_INTRCOMM_RAS2A11_2 4 -#define IRQ_INTRCOMM_RAS2A12_1 5 -#define IRQ_INTRCOMM_RAS2A12_2 6 -#define IRQ_GEN_RAS_0 7 -#define IRQ_GEN_RAS_1 8 -#define IRQ_GEN_RAS_2 9 -#define IRQ_GEN_RAS_3 10 -#define IRQ_GEN_RAS_4 11 -#define IRQ_GEN_RAS_5 12 -#define IRQ_GEN_RAS_6 13 -#define IRQ_GEN_RAS_7 14 -#define IRQ_GEN_RAS_8 15 +/* FIXME: probe this from DT */ #define IRQ_CPU_GPT1_1 16 -#define IRQ_CPU_GPT1_2 17 -#define IRQ_LOCAL_GPIO 18 -#define IRQ_PLL_UNLOCK 19 -#define IRQ_JPEG 20 -#define IRQ_FSMC 21 -#define IRQ_IRDA 22 -#define IRQ_RESERVED 23 -#define IRQ_UART_0 24 -#define IRQ_UART_1 25 -#define IRQ_SSP_1 26 -#define IRQ_SSP_2 27 -#define IRQ_I2C 28 -#define IRQ_GEN_RAS_9 29 -#define IRQ_GEN_RAS_10 30 -#define IRQ_GEN_RAS_11 31 - -/* VIC 2 */ -#define IRQ_APPL_GPT1_1 32 -#define IRQ_APPL_GPT1_2 33 -#define IRQ_APPL_GPT2_1 34 -#define IRQ_APPL_GPT2_2 35 -#define IRQ_APPL_GPIO 36 -#define IRQ_APPL_SSP 37 -#define IRQ_APPL_ADC 38 -#define IRQ_APPL_RESERVED 39 -#define IRQ_AHB_EXP_MASTER 40 -#define IRQ_DDR_CONTROLLER 41 -#define IRQ_BASIC_DMA 42 -#define IRQ_BASIC_RESERVED1 43 -#define IRQ_BASIC_SMI 44 -#define IRQ_BASIC_CLCD 45 -#define IRQ_EXP_AHB_1 46 -#define IRQ_EXP_AHB_2 47 -#define IRQ_BASIC_GPT1_1 48 -#define IRQ_BASIC_GPT1_2 49 -#define IRQ_BASIC_RTC 50 -#define IRQ_BASIC_GPIO 51 -#define IRQ_BASIC_WDT 52 -#define IRQ_BASIC_RESERVED 53 -#define IRQ_AHB_EXP_SLAVE 54 -#define IRQ_GMAC_1 55 -#define IRQ_GMAC_2 56 -#define IRQ_USB_DEV 57 -#define IRQ_USB_H_OHCI_0 58 -#define IRQ_USB_H_EHCI_0 59 -#define IRQ_USB_H_OHCI_1 60 -#define IRQ_USB_H_EHCI_1 61 -#define IRQ_EXP_AHB_3 62 -#define IRQ_EXP_AHB_4 63 #define IRQ_VIC_END 64 /* GPIO pins virtual irqs */ -#define SPEAR_GPIO_INT_BASE IRQ_VIC_END -#define SPEAR_GPIO0_INT_BASE SPEAR_GPIO_INT_BASE -#define SPEAR_GPIO1_INT_BASE (SPEAR_GPIO0_INT_BASE + 8) -#define SPEAR_GPIO2_INT_BASE (SPEAR_GPIO1_INT_BASE + 8) -#define SPEAR_GPIO_INT_END (SPEAR_GPIO2_INT_BASE + 8) -#define VIRTUAL_IRQS (SPEAR_GPIO_INT_END - IRQ_VIC_END) -#define NR_IRQS (IRQ_VIC_END + VIRTUAL_IRQS) +#define VIRTUAL_IRQS 24 +#define NR_IRQS (IRQ_VIC_END + VIRTUAL_IRQS) #endif /* __MACH_IRQS_H */ diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h index 68c20a007b0d..2b9aaa6cdd11 100644 --- a/arch/arm/mach-spear6xx/include/mach/misc_regs.h +++ b/arch/arm/mach-spear6xx/include/mach/misc_regs.h @@ -14,161 +14,7 @@ #ifndef __MACH_MISC_REGS_H #define __MACH_MISC_REGS_H -#include - #define MISC_BASE IOMEM(VA_SPEAR6XX_ICM3_MISC_REG_BASE) - -#define SOC_CFG_CTR (MISC_BASE + 0x000) -#define DIAG_CFG_CTR (MISC_BASE + 0x004) -#define PLL1_CTR (MISC_BASE + 0x008) -#define PLL1_FRQ (MISC_BASE + 0x00C) -#define PLL1_MOD (MISC_BASE + 0x010) -#define PLL2_CTR (MISC_BASE + 0x014) -/* PLL_CTR register masks */ -#define PLL_ENABLE 2 -#define PLL_MODE_SHIFT 4 -#define PLL_MODE_MASK 0x3 -#define PLL_MODE_NORMAL 0 -#define PLL_MODE_FRACTION 1 -#define PLL_MODE_DITH_DSB 2 -#define PLL_MODE_DITH_SSB 3 - -#define PLL2_FRQ (MISC_BASE + 0x018) -/* PLL FRQ register masks */ -#define PLL_DIV_N_SHIFT 0 -#define PLL_DIV_N_MASK 0xFF -#define PLL_DIV_P_SHIFT 8 -#define PLL_DIV_P_MASK 0x7 -#define PLL_NORM_FDBK_M_SHIFT 24 -#define PLL_NORM_FDBK_M_MASK 0xFF -#define PLL_DITH_FDBK_M_SHIFT 16 -#define PLL_DITH_FDBK_M_MASK 0xFFFF - -#define PLL2_MOD (MISC_BASE + 0x01C) -#define PLL_CLK_CFG (MISC_BASE + 0x020) -#define CORE_CLK_CFG (MISC_BASE + 0x024) -/* CORE CLK CFG register masks */ -#define PLL_HCLK_RATIO_SHIFT 10 -#define PLL_HCLK_RATIO_MASK 0x3 -#define HCLK_PCLK_RATIO_SHIFT 8 -#define HCLK_PCLK_RATIO_MASK 0x3 - -#define PERIP_CLK_CFG (MISC_BASE + 0x028) -/* PERIP_CLK_CFG register masks */ -#define CLCD_CLK_SHIFT 2 -#define CLCD_CLK_MASK 0x3 -#define UART_CLK_SHIFT 4 -#define UART_CLK_MASK 0x1 -#define FIRDA_CLK_SHIFT 5 -#define FIRDA_CLK_MASK 0x3 -#define GPT0_CLK_SHIFT 8 -#define GPT1_CLK_SHIFT 10 -#define GPT2_CLK_SHIFT 11 -#define GPT3_CLK_SHIFT 12 -#define GPT_CLK_MASK 0x1 -#define AUX_CLK_PLL3_VAL 0 -#define AUX_CLK_PLL1_VAL 1 - -#define PERIP1_CLK_ENB (MISC_BASE + 0x02C) -/* PERIP1_CLK_ENB register masks */ -#define UART0_CLK_ENB 3 -#define UART1_CLK_ENB 4 -#define SSP0_CLK_ENB 5 -#define SSP1_CLK_ENB 6 -#define I2C_CLK_ENB 7 -#define JPEG_CLK_ENB 8 -#define FSMC_CLK_ENB 9 -#define FIRDA_CLK_ENB 10 -#define GPT2_CLK_ENB 11 -#define GPT3_CLK_ENB 12 -#define GPIO2_CLK_ENB 13 -#define SSP2_CLK_ENB 14 -#define ADC_CLK_ENB 15 -#define GPT1_CLK_ENB 11 -#define RTC_CLK_ENB 17 -#define GPIO1_CLK_ENB 18 -#define DMA_CLK_ENB 19 -#define SMI_CLK_ENB 21 -#define CLCD_CLK_ENB 22 -#define GMAC_CLK_ENB 23 -#define USBD_CLK_ENB 24 -#define USBH0_CLK_ENB 25 -#define USBH1_CLK_ENB 26 - -#define SOC_CORE_ID (MISC_BASE + 0x030) -#define RAS_CLK_ENB (MISC_BASE + 0x034) -#define PERIP1_SOF_RST (MISC_BASE + 0x038) -/* PERIP1_SOF_RST register masks */ -#define JPEG_SOF_RST 8 - -#define SOC_USER_ID (MISC_BASE + 0x03C) -#define RAS_SOF_RST (MISC_BASE + 0x040) -#define PRSC1_CLK_CFG (MISC_BASE + 0x044) -#define PRSC2_CLK_CFG (MISC_BASE + 0x048) -#define PRSC3_CLK_CFG (MISC_BASE + 0x04C) -/* gpt synthesizer register masks */ -#define GPT_MSCALE_SHIFT 0 -#define GPT_MSCALE_MASK 0xFFF -#define GPT_NSCALE_SHIFT 12 -#define GPT_NSCALE_MASK 0xF - -#define AMEM_CLK_CFG (MISC_BASE + 0x050) -#define EXPI_CLK_CFG (MISC_BASE + 0x054) -#define CLCD_CLK_SYNT (MISC_BASE + 0x05C) -#define FIRDA_CLK_SYNT (MISC_BASE + 0x060) -#define UART_CLK_SYNT (MISC_BASE + 0x064) -#define GMAC_CLK_SYNT (MISC_BASE + 0x068) -#define RAS1_CLK_SYNT (MISC_BASE + 0x06C) -#define RAS2_CLK_SYNT (MISC_BASE + 0x070) -#define RAS3_CLK_SYNT (MISC_BASE + 0x074) -#define RAS4_CLK_SYNT (MISC_BASE + 0x078) -/* aux clk synthesiser register masks for irda to ras4 */ -#define AUX_SYNT_ENB 31 -#define AUX_EQ_SEL_SHIFT 30 -#define AUX_EQ_SEL_MASK 1 -#define AUX_EQ1_SEL 0 -#define AUX_EQ2_SEL 1 -#define AUX_XSCALE_SHIFT 16 -#define AUX_XSCALE_MASK 0xFFF -#define AUX_YSCALE_SHIFT 0 -#define AUX_YSCALE_MASK 0xFFF - -#define ICM1_ARB_CFG (MISC_BASE + 0x07C) -#define ICM2_ARB_CFG (MISC_BASE + 0x080) -#define ICM3_ARB_CFG (MISC_BASE + 0x084) -#define ICM4_ARB_CFG (MISC_BASE + 0x088) -#define ICM5_ARB_CFG (MISC_BASE + 0x08C) -#define ICM6_ARB_CFG (MISC_BASE + 0x090) -#define ICM7_ARB_CFG (MISC_BASE + 0x094) -#define ICM8_ARB_CFG (MISC_BASE + 0x098) -#define ICM9_ARB_CFG (MISC_BASE + 0x09C) #define DMA_CHN_CFG (MISC_BASE + 0x0A0) -#define USB2_PHY_CFG (MISC_BASE + 0x0A4) -#define GMAC_CFG_CTR (MISC_BASE + 0x0A8) -#define EXPI_CFG_CTR (MISC_BASE + 0x0AC) -#define PRC1_LOCK_CTR (MISC_BASE + 0x0C0) -#define PRC2_LOCK_CTR (MISC_BASE + 0x0C4) -#define PRC3_LOCK_CTR (MISC_BASE + 0x0C8) -#define PRC4_LOCK_CTR (MISC_BASE + 0x0CC) -#define PRC1_IRQ_CTR (MISC_BASE + 0x0D0) -#define PRC2_IRQ_CTR (MISC_BASE + 0x0D4) -#define PRC3_IRQ_CTR (MISC_BASE + 0x0D8) -#define PRC4_IRQ_CTR (MISC_BASE + 0x0DC) -#define PWRDOWN_CFG_CTR (MISC_BASE + 0x0E0) -#define COMPSSTL_1V8_CFG (MISC_BASE + 0x0E4) -#define COMPSSTL_2V5_CFG (MISC_BASE + 0x0E8) -#define COMPCOR_3V3_CFG (MISC_BASE + 0x0EC) -#define SSTLPAD_CFG_CTR (MISC_BASE + 0x0F0) -#define BIST1_CFG_CTR (MISC_BASE + 0x0F4) -#define BIST2_CFG_CTR (MISC_BASE + 0x0F8) -#define BIST3_CFG_CTR (MISC_BASE + 0x0FC) -#define BIST4_CFG_CTR (MISC_BASE + 0x100) -#define BIST5_CFG_CTR (MISC_BASE + 0x104) -#define BIST1_STS_RES (MISC_BASE + 0x108) -#define BIST2_STS_RES (MISC_BASE + 0x10C) -#define BIST3_STS_RES (MISC_BASE + 0x110) -#define BIST4_STS_RES (MISC_BASE + 0x114) -#define BIST5_STS_RES (MISC_BASE + 0x118) -#define SYSERR_CFG_CTR (MISC_BASE + 0x11C) #endif /* __MACH_MISC_REGS_H */ diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h index 7fd621532def..d278ed047a53 100644 --- a/arch/arm/mach-spear6xx/include/mach/spear.h +++ b/arch/arm/mach-spear6xx/include/mach/spear.h @@ -15,69 +15,26 @@ #define __MACH_SPEAR6XX_H #include -#include -#define SPEAR6XX_ML_SDRAM_BASE UL(0x00000000) /* ICM1 - Low speed connection */ #define SPEAR6XX_ICM1_BASE UL(0xD0000000) - +#define VA_SPEAR6XX_ICM1_BASE UL(0xFD000000) #define SPEAR6XX_ICM1_UART0_BASE UL(0xD0000000) -#define VA_SPEAR6XX_ICM1_UART0_BASE IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE) - -#define SPEAR6XX_ICM1_UART1_BASE UL(0xD0080000) -#define SPEAR6XX_ICM1_SSP0_BASE UL(0xD0100000) -#define SPEAR6XX_ICM1_SSP1_BASE UL(0xD0180000) -#define SPEAR6XX_ICM1_I2C_BASE UL(0xD0200000) -#define SPEAR6XX_ICM1_JPEG_BASE UL(0xD0800000) -#define SPEAR6XX_ICM1_IRDA_BASE UL(0xD1000000) -#define SPEAR6XX_ICM1_FSMC_BASE UL(0xD1800000) -#define SPEAR6XX_ICM1_NAND_BASE UL(0xD2000000) -#define SPEAR6XX_ICM1_SRAM_BASE UL(0xD2800000) - -/* ICM2 - Application Subsystem */ -#define SPEAR6XX_ICM2_BASE UL(0xD8000000) -#define SPEAR6XX_ICM2_TMR0_BASE UL(0xD8000000) -#define SPEAR6XX_ICM2_TMR1_BASE UL(0xD8080000) -#define SPEAR6XX_ICM2_GPIO_BASE UL(0xD8100000) -#define SPEAR6XX_ICM2_SSP2_BASE UL(0xD8180000) -#define SPEAR6XX_ICM2_ADC_BASE UL(0xD8200000) +#define VA_SPEAR6XX_ICM1_UART0_BASE (VA_SPEAR6XX_ICM1_2_BASE | SPEAR6XX_ICM1_UART0_BASE) /* ML-1, 2 - Multi Layer CPU Subsystem */ #define SPEAR6XX_ML_CPU_BASE UL(0xF0000000) +#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) #define SPEAR6XX_CPU_TMR_BASE UL(0xF0000000) -#define SPEAR6XX_CPU_GPIO_BASE UL(0xF0100000) -#define SPEAR6XX_CPU_VIC_SEC_BASE UL(0xF1000000) -#define VA_SPEAR6XX_CPU_VIC_SEC_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE) -#define SPEAR6XX_CPU_VIC_PRI_BASE UL(0xF1100000) -#define VA_SPEAR6XX_CPU_VIC_PRI_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE) /* ICM3 - Basic Subsystem */ -#define SPEAR6XX_ICM3_BASE UL(0xF8000000) -#define SPEAR6XX_ICM3_SMEM_BASE UL(0xF8000000) #define SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) -#define SPEAR6XX_ICM3_CLCD_BASE UL(0xFC200000) +#define VA_SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) #define SPEAR6XX_ICM3_DMA_BASE UL(0xFC400000) -#define SPEAR6XX_ICM3_SDRAM_CTRL_BASE UL(0xFC600000) -#define SPEAR6XX_ICM3_TMR_BASE UL(0xFC800000) -#define SPEAR6XX_ICM3_WDT_BASE UL(0xFC880000) -#define SPEAR6XX_ICM3_RTC_BASE UL(0xFC900000) -#define SPEAR6XX_ICM3_GPIO_BASE UL(0xFC980000) #define SPEAR6XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000) -#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE) +#define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_SYS_CTRL_BASE) #define SPEAR6XX_ICM3_MISC_REG_BASE UL(0xFCA80000) -#define VA_SPEAR6XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE) - -/* ICM4 - High Speed Connection */ -#define SPEAR6XX_ICM4_BASE UL(0xE0000000) -#define SPEAR6XX_ICM4_GMAC_BASE UL(0xE0800000) -#define SPEAR6XX_ICM4_USBD_FIFO_BASE UL(0xE1000000) -#define SPEAR6XX_ICM4_USBD_CSR_BASE UL(0xE1100000) -#define SPEAR6XX_ICM4_USBD_PLDT_BASE UL(0xE1200000) -#define SPEAR6XX_ICM4_USB_EHCI0_BASE UL(0xE1800000) -#define SPEAR6XX_ICM4_USB_OHCI0_BASE UL(0xE1900000) -#define SPEAR6XX_ICM4_USB_EHCI1_BASE UL(0xE2000000) -#define SPEAR6XX_ICM4_USB_OHCI1_BASE UL(0xE2100000) -#define SPEAR6XX_ICM4_USB_ARB_BASE UL(0xE2800000) +#define VA_SPEAR6XX_ICM3_MISC_REG_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_MISC_REG_BASE) /* Debug uart for linux, will be used for debug and uncompress messages */ #define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE diff --git a/arch/arm/mach-spear6xx/include/mach/spear600.h b/arch/arm/mach-spear6xx/include/mach/spear600.h deleted file mode 100644 index c068cc50b0fb..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/spear600.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * arch/arm/mach-spear66xx/include/mach/spear600.h - * - * SPEAr600 Machine specific definition - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifdef CONFIG_MACH_SPEAR600 - -#ifndef __MACH_SPEAR600_H -#define __MACH_SPEAR600_H - -#endif /* __MACH_SPEAR600_H */ - -#endif /* CONFIG_MACH_SPEAR600 */ diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index 5b9e30f54cdb..de194dbb8371 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c @@ -14,6 +14,8 @@ */ #include +#include +#include #include #include #include @@ -21,9 +23,11 @@ #include #include #include +#include +#include #include #include -#include +#include /* dmac device registration */ static struct pl08x_channel_data spear600_dma_info[] = { @@ -384,32 +388,29 @@ struct pl08x_platform_data pl080_plat_data = { .num_slave_channels = ARRAY_SIZE(spear600_dma_info), }; -/* Following will create static virtual/physical mappings */ -static struct map_desc spear6xx_io_desc[] __initdata = { +/* + * Following will create 16MB static virtual/physical mappings + * PHYSICAL VIRTUAL + * 0xF0000000 0xF0000000 + * 0xF1000000 0xF1000000 + * 0xD0000000 0xFD000000 + * 0xFC000000 0xFC000000 + */ +struct map_desc spear6xx_io_desc[] __initdata = { { - .virtual = VA_SPEAR6XX_ICM1_UART0_BASE, - .pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE), - .length = SZ_4K, - .type = MT_DEVICE - }, { - .virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE, - .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE), - .length = SZ_4K, + .virtual = VA_SPEAR6XX_ML_CPU_BASE, + .pfn = __phys_to_pfn(SPEAR6XX_ML_CPU_BASE), + .length = 2 * SZ_16M, .type = MT_DEVICE - }, { - .virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE, - .pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE), - .length = SZ_4K, - .type = MT_DEVICE - }, { - .virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE, - .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE), - .length = SZ_4K, + }, { + .virtual = VA_SPEAR6XX_ICM1_BASE, + .pfn = __phys_to_pfn(SPEAR6XX_ICM1_BASE), + .length = SZ_16M, .type = MT_DEVICE }, { - .virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE, - .pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE), - .length = SZ_4K, + .virtual = VA_SPEAR6XX_ICM3_SMI_CTRL_BASE, + .pfn = __phys_to_pfn(SPEAR6XX_ICM3_SMI_CTRL_BASE), + .length = SZ_16M, .type = MT_DEVICE }, }; @@ -447,7 +448,7 @@ static void __init spear6xx_timer_init(void) clk_put(gpt_clk); clk_put(pclk); - spear_setup_timer(); + spear_setup_timer(SPEAR6XX_CPU_TMR_BASE, IRQ_CPU_GPT1_1); } struct sys_timer spear6xx_timer = { diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S index 02b160a1ec9b..ab3de721c5db 100644 --- a/arch/arm/plat-spear/include/plat/debug-macro.S +++ b/arch/arm/plat-spear/include/plat/debug-macro.S @@ -12,7 +12,7 @@ */ #include -#include +#include .macro addruart, rp, rv, tmp mov \rp, #SPEAR_DBG_UART_BASE @ Physical base diff --git a/arch/arm/plat-spear/include/plat/hardware.h b/arch/arm/plat-spear/include/plat/hardware.h deleted file mode 100644 index 70187d763e26..000000000000 --- a/arch/arm/plat-spear/include/plat/hardware.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/plat-spear/include/plat/hardware.h - * - * Hardware definitions for SPEAr - * - * Copyright (C) 2010 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __PLAT_HARDWARE_H -#define __PLAT_HARDWARE_H - -#endif /* __PLAT_HARDWARE_H */ diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/plat-spear/include/plat/uncompress.h index 1bf84527aee4..6dd455bafdfd 100644 --- a/arch/arm/plat-spear/include/plat/uncompress.h +++ b/arch/arm/plat-spear/include/plat/uncompress.h @@ -13,7 +13,7 @@ #include #include -#include +#include #ifndef __PLAT_UNCOMPRESS_H #define __PLAT_UNCOMPRESS_H diff --git a/arch/arm/plat-spear/pl080.c b/arch/arm/plat-spear/pl080.c index d53d75e1af5e..a56a067717c1 100644 --- a/arch/arm/plat-spear/pl080.c +++ b/arch/arm/plat-spear/pl080.c @@ -17,6 +17,7 @@ #include #include #include +#include #include static spinlock_t lock = __SPIN_LOCK_UNLOCKED(x); diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c index 16f203e78d89..4471a232713a 100644 --- a/arch/arm/plat-spear/restart.c +++ b/arch/arm/plat-spear/restart.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include void spear_restart(char mode, const char *cmd) diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c index abb5bdecd509..a3164d1647fd 100644 --- a/arch/arm/plat-spear/time.c +++ b/arch/arm/plat-spear/time.c @@ -15,14 +15,13 @@ #include #include #include +#include #include #include #include #include #include #include -#include -#include /* * We would use TIMER0 and TIMER1 as clockevent and clocksource. @@ -175,7 +174,7 @@ static struct irqaction spear_timer_irq = { .handler = spear_timer_interrupt }; -static void __init spear_clockevent_init(void) +static void __init spear_clockevent_init(int irq) { u32 tick_rate; @@ -195,19 +194,19 @@ static void __init spear_clockevent_init(void) clockevents_register_device(&clkevt); - setup_irq(SPEAR_GPT0_CHAN0_IRQ, &spear_timer_irq); + setup_irq(irq, &spear_timer_irq); } -void __init spear_setup_timer(void) +void __init spear_setup_timer(resource_size_t base, int irq) { int ret; - if (!request_mem_region(SPEAR_GPT0_BASE, SZ_1K, "gpt0")) { + if (!request_mem_region(base, SZ_1K, "gpt0")) { pr_err("%s:cannot get IO addr\n", __func__); return; } - gpt_base = (void __iomem *)ioremap(SPEAR_GPT0_BASE, SZ_1K); + gpt_base = ioremap(base, SZ_1K); if (!gpt_base) { pr_err("%s:ioremap failed for gpt\n", __func__); goto err_mem; @@ -225,7 +224,7 @@ void __init spear_setup_timer(void) goto err_clk; } - spear_clockevent_init(); + spear_clockevent_init(irq); spear_clocksource_init(); return; @@ -235,5 +234,5 @@ err_clk: err_iomap: iounmap(gpt_base); err_mem: - release_mem_region(SPEAR_GPT0_BASE, SZ_1K); + release_mem_region(base, SZ_1K); } -- cgit v1.2.2 From 8076dd1b7deeaeb5c6f0b58be95c0a13164e1a99 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 3 Apr 2012 17:27:10 +0530 Subject: SPEAr: Remove existing padmux support for SPEAr We must use pinctrl framework instead of defining per SoC pinmux drivers. This patch removes existing padmux support present for SPEAr platform. Signed-off-by: Viresh Kumar Acked-by: Linus Walleij Reviewed-by: Stephen Warren --- arch/arm/mach-spear3xx/include/mach/generic.h | 128 -------- arch/arm/mach-spear3xx/spear300.c | 389 +---------------------- arch/arm/mach-spear3xx/spear310.c | 161 +--------- arch/arm/mach-spear3xx/spear320.c | 403 +----------------------- arch/arm/mach-spear3xx/spear3xx.c | 425 -------------------------- arch/arm/plat-spear/Makefile | 2 +- arch/arm/plat-spear/include/plat/padmux.h | 92 ------ arch/arm/plat-spear/padmux.c | 164 ---------- 8 files changed, 4 insertions(+), 1760 deletions(-) delete mode 100644 arch/arm/plat-spear/include/plat/padmux.h delete mode 100644 arch/arm/plat-spear/padmux.c (limited to 'arch') diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h index a7569584cbe8..9603bf4d5119 100644 --- a/arch/arm/mach-spear3xx/include/mach/generic.h +++ b/arch/arm/mach-spear3xx/include/mach/generic.h @@ -20,7 +20,6 @@ #include #include #include -#include /* spear3xx declarations */ /* @@ -43,147 +42,20 @@ void __init spear3xx_dt_init_irq(void); void spear_restart(char, const char *); -/* pad mux declarations */ -#define PMX_FIRDA_MASK (1 << 14) -#define PMX_I2C_MASK (1 << 13) -#define PMX_SSP_CS_MASK (1 << 12) -#define PMX_SSP_MASK (1 << 11) -#define PMX_MII_MASK (1 << 10) -#define PMX_GPIO_PIN0_MASK (1 << 9) -#define PMX_GPIO_PIN1_MASK (1 << 8) -#define PMX_GPIO_PIN2_MASK (1 << 7) -#define PMX_GPIO_PIN3_MASK (1 << 6) -#define PMX_GPIO_PIN4_MASK (1 << 5) -#define PMX_GPIO_PIN5_MASK (1 << 4) -#define PMX_UART0_MODEM_MASK (1 << 3) -#define PMX_UART0_MASK (1 << 2) -#define PMX_TIMER_3_4_MASK (1 << 1) -#define PMX_TIMER_1_2_MASK (1 << 0) - -/* pad mux devices */ -extern struct pmx_dev spear3xx_pmx_firda; -extern struct pmx_dev spear3xx_pmx_i2c; -extern struct pmx_dev spear3xx_pmx_ssp_cs; -extern struct pmx_dev spear3xx_pmx_ssp; -extern struct pmx_dev spear3xx_pmx_mii; -extern struct pmx_dev spear3xx_pmx_gpio_pin0; -extern struct pmx_dev spear3xx_pmx_gpio_pin1; -extern struct pmx_dev spear3xx_pmx_gpio_pin2; -extern struct pmx_dev spear3xx_pmx_gpio_pin3; -extern struct pmx_dev spear3xx_pmx_gpio_pin4; -extern struct pmx_dev spear3xx_pmx_gpio_pin5; -extern struct pmx_dev spear3xx_pmx_uart0_modem; -extern struct pmx_dev spear3xx_pmx_uart0; -extern struct pmx_dev spear3xx_pmx_timer_3_4; -extern struct pmx_dev spear3xx_pmx_timer_1_2; - -#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) -/* padmux plgpio devices */ -extern struct pmx_dev spear3xx_pmx_plgpio_0_1; -extern struct pmx_dev spear3xx_pmx_plgpio_2_3; -extern struct pmx_dev spear3xx_pmx_plgpio_4_5; -extern struct pmx_dev spear3xx_pmx_plgpio_6_9; -extern struct pmx_dev spear3xx_pmx_plgpio_10_27; -extern struct pmx_dev spear3xx_pmx_plgpio_28; -extern struct pmx_dev spear3xx_pmx_plgpio_29; -extern struct pmx_dev spear3xx_pmx_plgpio_30; -extern struct pmx_dev spear3xx_pmx_plgpio_31; -extern struct pmx_dev spear3xx_pmx_plgpio_32; -extern struct pmx_dev spear3xx_pmx_plgpio_33; -extern struct pmx_dev spear3xx_pmx_plgpio_34_36; -extern struct pmx_dev spear3xx_pmx_plgpio_37_42; -extern struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48; -extern struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50; -#endif - /* spear300 declarations */ #ifdef CONFIG_MACH_SPEAR300 -/* pad mux modes */ -extern struct pmx_mode spear300_nand_mode; -extern struct pmx_mode spear300_nor_mode; -extern struct pmx_mode spear300_photo_frame_mode; -extern struct pmx_mode spear300_lend_ip_phone_mode; -extern struct pmx_mode spear300_hend_ip_phone_mode; -extern struct pmx_mode spear300_lend_wifi_phone_mode; -extern struct pmx_mode spear300_hend_wifi_phone_mode; -extern struct pmx_mode spear300_ata_pabx_wi2s_mode; -extern struct pmx_mode spear300_ata_pabx_i2s_mode; -extern struct pmx_mode spear300_caml_lcdw_mode; -extern struct pmx_mode spear300_camu_lcd_mode; -extern struct pmx_mode spear300_camu_wlcd_mode; -extern struct pmx_mode spear300_caml_lcd_mode; - -/* pad mux devices */ -extern struct pmx_dev spear300_pmx_fsmc_2_chips; -extern struct pmx_dev spear300_pmx_fsmc_4_chips; -extern struct pmx_dev spear300_pmx_keyboard; -extern struct pmx_dev spear300_pmx_clcd; -extern struct pmx_dev spear300_pmx_telecom_gpio; -extern struct pmx_dev spear300_pmx_telecom_tdm; -extern struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk; -extern struct pmx_dev spear300_pmx_telecom_camera; -extern struct pmx_dev spear300_pmx_telecom_dac; -extern struct pmx_dev spear300_pmx_telecom_i2s; -extern struct pmx_dev spear300_pmx_telecom_boot_pins; -extern struct pmx_dev spear300_pmx_telecom_sdhci_4bit; -extern struct pmx_dev spear300_pmx_telecom_sdhci_8bit; -extern struct pmx_dev spear300_pmx_gpio1; - -/* Add spear300 machine declarations here */ void __init spear300_clk_init(void); #endif /* CONFIG_MACH_SPEAR300 */ /* spear310 declarations */ #ifdef CONFIG_MACH_SPEAR310 -/* pad mux devices */ -extern struct pmx_dev spear310_pmx_emi_cs_0_1_4_5; -extern struct pmx_dev spear310_pmx_emi_cs_2_3; -extern struct pmx_dev spear310_pmx_uart1; -extern struct pmx_dev spear310_pmx_uart2; -extern struct pmx_dev spear310_pmx_uart3_4_5; -extern struct pmx_dev spear310_pmx_fsmc; -extern struct pmx_dev spear310_pmx_rs485_0_1; -extern struct pmx_dev spear310_pmx_tdm0; - -/* Add spear310 machine declarations here */ void __init spear310_clk_init(void); #endif /* CONFIG_MACH_SPEAR310 */ /* spear320 declarations */ #ifdef CONFIG_MACH_SPEAR320 -/* pad mux modes */ -extern struct pmx_mode spear320_auto_net_smii_mode; -extern struct pmx_mode spear320_auto_net_mii_mode; -extern struct pmx_mode spear320_auto_exp_mode; -extern struct pmx_mode spear320_small_printers_mode; - -/* pad mux devices */ -extern struct pmx_dev spear320_pmx_clcd; -extern struct pmx_dev spear320_pmx_emi; -extern struct pmx_dev spear320_pmx_fsmc; -extern struct pmx_dev spear320_pmx_spp; -extern struct pmx_dev spear320_pmx_sdhci; -extern struct pmx_dev spear320_pmx_i2s; -extern struct pmx_dev spear320_pmx_uart1; -extern struct pmx_dev spear320_pmx_uart1_modem; -extern struct pmx_dev spear320_pmx_uart2; -extern struct pmx_dev spear320_pmx_touchscreen; -extern struct pmx_dev spear320_pmx_can; -extern struct pmx_dev spear320_pmx_sdhci_led; -extern struct pmx_dev spear320_pmx_pwm0; -extern struct pmx_dev spear320_pmx_pwm1; -extern struct pmx_dev spear320_pmx_pwm2; -extern struct pmx_dev spear320_pmx_pwm3; -extern struct pmx_dev spear320_pmx_ssp1; -extern struct pmx_dev spear320_pmx_ssp2; -extern struct pmx_dev spear320_pmx_mii1; -extern struct pmx_dev spear320_pmx_smii0; -extern struct pmx_dev spear320_pmx_smii1; -extern struct pmx_dev spear320_pmx_i2c1; - -/* Add spear320 machine declarations here */ void __init spear320_clk_init(void); #endif /* CONFIG_MACH_SPEAR320 */ diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index f46fc2692ab6..2db0bd14e481 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c @@ -21,357 +21,6 @@ #include #include -/* pad multiplexing support */ -/* muxing registers */ -#define PAD_MUX_CONFIG_REG 0x00 -#define MODE_CONFIG_REG 0x04 - -/* modes */ -#define NAND_MODE (1 << 0) -#define NOR_MODE (1 << 1) -#define PHOTO_FRAME_MODE (1 << 2) -#define LEND_IP_PHONE_MODE (1 << 3) -#define HEND_IP_PHONE_MODE (1 << 4) -#define LEND_WIFI_PHONE_MODE (1 << 5) -#define HEND_WIFI_PHONE_MODE (1 << 6) -#define ATA_PABX_WI2S_MODE (1 << 7) -#define ATA_PABX_I2S_MODE (1 << 8) -#define CAML_LCDW_MODE (1 << 9) -#define CAMU_LCD_MODE (1 << 10) -#define CAMU_WLCD_MODE (1 << 11) -#define CAML_LCD_MODE (1 << 12) -#define ALL_MODES 0x1FFF - -struct pmx_mode spear300_nand_mode = { - .id = NAND_MODE, - .name = "nand mode", - .mask = 0x00, -}; - -struct pmx_mode spear300_nor_mode = { - .id = NOR_MODE, - .name = "nor mode", - .mask = 0x01, -}; - -struct pmx_mode spear300_photo_frame_mode = { - .id = PHOTO_FRAME_MODE, - .name = "photo frame mode", - .mask = 0x02, -}; - -struct pmx_mode spear300_lend_ip_phone_mode = { - .id = LEND_IP_PHONE_MODE, - .name = "lend ip phone mode", - .mask = 0x03, -}; - -struct pmx_mode spear300_hend_ip_phone_mode = { - .id = HEND_IP_PHONE_MODE, - .name = "hend ip phone mode", - .mask = 0x04, -}; - -struct pmx_mode spear300_lend_wifi_phone_mode = { - .id = LEND_WIFI_PHONE_MODE, - .name = "lend wifi phone mode", - .mask = 0x05, -}; - -struct pmx_mode spear300_hend_wifi_phone_mode = { - .id = HEND_WIFI_PHONE_MODE, - .name = "hend wifi phone mode", - .mask = 0x06, -}; - -struct pmx_mode spear300_ata_pabx_wi2s_mode = { - .id = ATA_PABX_WI2S_MODE, - .name = "ata pabx wi2s mode", - .mask = 0x07, -}; - -struct pmx_mode spear300_ata_pabx_i2s_mode = { - .id = ATA_PABX_I2S_MODE, - .name = "ata pabx i2s mode", - .mask = 0x08, -}; - -struct pmx_mode spear300_caml_lcdw_mode = { - .id = CAML_LCDW_MODE, - .name = "caml lcdw mode", - .mask = 0x0C, -}; - -struct pmx_mode spear300_camu_lcd_mode = { - .id = CAMU_LCD_MODE, - .name = "camu lcd mode", - .mask = 0x0D, -}; - -struct pmx_mode spear300_camu_wlcd_mode = { - .id = CAMU_WLCD_MODE, - .name = "camu wlcd mode", - .mask = 0x0E, -}; - -struct pmx_mode spear300_caml_lcd_mode = { - .id = CAML_LCD_MODE, - .name = "caml lcd mode", - .mask = 0x0F, -}; - -/* devices */ -static struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = { - { - .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE | - ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE, - .mask = PMX_FIRDA_MASK, - }, -}; - -struct pmx_dev spear300_pmx_fsmc_2_chips = { - .name = "fsmc_2_chips", - .modes = pmx_fsmc_2_chips_modes, - .mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = { - { - .ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE | - ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE, - .mask = PMX_FIRDA_MASK | PMX_UART0_MASK, - }, -}; - -struct pmx_dev spear300_pmx_fsmc_4_chips = { - .name = "fsmc_4_chips", - .modes = pmx_fsmc_4_chips_modes, - .mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_keyboard_modes[] = { - { - .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE | - LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE | - CAML_LCDW_MODE | CAMU_LCD_MODE | CAMU_WLCD_MODE | - CAML_LCD_MODE, - .mask = 0x0, - }, -}; - -struct pmx_dev spear300_pmx_keyboard = { - .name = "keyboard", - .modes = pmx_keyboard_modes, - .mode_count = ARRAY_SIZE(pmx_keyboard_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_clcd_modes[] = { - { - .ids = PHOTO_FRAME_MODE, - .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK , - }, { - .ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE | - CAMU_LCD_MODE | CAML_LCD_MODE, - .mask = PMX_TIMER_3_4_MASK, - }, -}; - -struct pmx_dev spear300_pmx_clcd = { - .name = "clcd", - .modes = pmx_clcd_modes, - .mode_count = ARRAY_SIZE(pmx_clcd_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_telecom_gpio_modes[] = { - { - .ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE, - .mask = PMX_MII_MASK, - }, { - .ids = LEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE, - .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK, - }, { - .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_WLCD_MODE, - .mask = PMX_MII_MASK | PMX_TIMER_3_4_MASK, - }, { - .ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE, - .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK, - }, { - .ids = ATA_PABX_WI2S_MODE, - .mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK - | PMX_UART0_MODEM_MASK, - }, -}; - -struct pmx_dev spear300_pmx_telecom_gpio = { - .name = "telecom_gpio", - .modes = pmx_telecom_gpio_modes, - .mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_telecom_tdm_modes[] = { - { - .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | - HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE - | HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE - | ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE - | CAMU_WLCD_MODE | CAML_LCD_MODE, - .mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK, - }, -}; - -struct pmx_dev spear300_pmx_telecom_tdm = { - .name = "telecom_tdm", - .modes = pmx_telecom_tdm_modes, - .mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = { - { - .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE | - LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE - | ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE | - CAML_LCDW_MODE | CAML_LCD_MODE, - .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK, - }, -}; - -struct pmx_dev spear300_pmx_telecom_spi_cs_i2c_clk = { - .name = "telecom_spi_cs_i2c_clk", - .modes = pmx_telecom_spi_cs_i2c_clk_modes, - .mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_telecom_camera_modes[] = { - { - .ids = CAML_LCDW_MODE | CAML_LCD_MODE, - .mask = PMX_MII_MASK, - }, { - .ids = CAMU_LCD_MODE | CAMU_WLCD_MODE, - .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | PMX_MII_MASK, - }, -}; - -struct pmx_dev spear300_pmx_telecom_camera = { - .name = "telecom_camera", - .modes = pmx_telecom_camera_modes, - .mode_count = ARRAY_SIZE(pmx_telecom_camera_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_telecom_dac_modes[] = { - { - .ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE - | CAMU_WLCD_MODE | CAML_LCD_MODE, - .mask = PMX_TIMER_1_2_MASK, - }, -}; - -struct pmx_dev spear300_pmx_telecom_dac = { - .name = "telecom_dac", - .modes = pmx_telecom_dac_modes, - .mode_count = ARRAY_SIZE(pmx_telecom_dac_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_telecom_i2s_modes[] = { - { - .ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE - | LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE | - ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE - | CAMU_WLCD_MODE | CAML_LCD_MODE, - .mask = PMX_UART0_MODEM_MASK, - }, -}; - -struct pmx_dev spear300_pmx_telecom_i2s = { - .name = "telecom_i2s", - .modes = pmx_telecom_i2s_modes, - .mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = { - { - .ids = NAND_MODE | NOR_MODE, - .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK | - PMX_TIMER_3_4_MASK, - }, -}; - -struct pmx_dev spear300_pmx_telecom_boot_pins = { - .name = "telecom_boot_pins", - .modes = pmx_telecom_boot_pins_modes, - .mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = { - { - .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | - HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | - HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE | - CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE | - ATA_PABX_I2S_MODE, - .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK | - PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK | - PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK, - }, -}; - -struct pmx_dev spear300_pmx_telecom_sdhci_4bit = { - .name = "telecom_sdhci_4bit", - .modes = pmx_telecom_sdhci_4bit_modes, - .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = { - { - .ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE | - HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE | - HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE | - CAMU_WLCD_MODE | CAML_LCD_MODE, - .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK | - PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK | - PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK, - }, -}; - -struct pmx_dev spear300_pmx_telecom_sdhci_8bit = { - .name = "telecom_sdhci_8bit", - .modes = pmx_telecom_sdhci_8bit_modes, - .mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_gpio1_modes[] = { - { - .ids = PHOTO_FRAME_MODE, - .mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK | - PMX_TIMER_3_4_MASK, - }, -}; - -struct pmx_dev spear300_pmx_gpio1 = { - .name = "arm gpio1", - .modes = pmx_gpio1_modes, - .mode_count = ARRAY_SIZE(pmx_gpio1_modes), - .enb_on_reset = 1, -}; - -/* pmx driver structure */ -static struct pmx_driver pmx_driver = { - .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f}, - .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, -}; - /* spear3xx shared irq */ static struct shirq_dev_config shirq_ras1_config[] = { { @@ -425,22 +74,6 @@ static struct spear_shirq shirq_ras1 = { }, }; -/* padmux devices to enable */ -static struct pmx_dev *spear300_evb_pmx_devs[] = { - /* spear3xx specific devices */ - &spear3xx_pmx_i2c, - &spear3xx_pmx_ssp_cs, - &spear3xx_pmx_ssp, - &spear3xx_pmx_mii, - &spear3xx_pmx_uart0, - - /* spear300 specific devices */ - &spear300_pmx_fsmc_2_chips, - &spear300_pmx_clcd, - &spear300_pmx_telecom_sdhci_4bit, - &spear300_pmx_gpio1, -}; - /* DMAC platform data's slave info */ struct pl08x_channel_data spear300_dma_info[] = { { @@ -639,7 +272,7 @@ static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = { static void __init spear300_dt_init(void) { - int ret = -EINVAL; + int ret; pl080_plat_data.slave_channels = spear300_dma_info; pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info); @@ -654,26 +287,6 @@ static void __init spear300_dt_init(void) if (ret) pr_err("Error registering Shared IRQ\n"); } - - if (of_machine_is_compatible("st,spear300-evb")) { - /* pmx initialization */ - pmx_driver.mode = &spear300_photo_frame_mode; - pmx_driver.devs = spear300_evb_pmx_devs; - pmx_driver.devs_count = ARRAY_SIZE(spear300_evb_pmx_devs); - - pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K); - if (pmx_driver.base) { - ret = pmx_register(&pmx_driver); - if (ret) - pr_err("padmux: registration failed. err no: %d\n", - ret); - /* Free Mapping, device selection already done */ - iounmap(pmx_driver.base); - } - - if (ret) - pr_err("Initialization Failed"); - } } static const char * const spear300_dt_board_compat[] = { diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c index 063e7da0438a..aec07c951205 100644 --- a/arch/arm/mach-spear3xx/spear310.c +++ b/arch/arm/mach-spear3xx/spear310.c @@ -22,128 +22,6 @@ #include #include -/* pad multiplexing support */ -/* muxing registers */ -#define PAD_MUX_CONFIG_REG 0x08 - -/* devices */ -static struct pmx_dev_mode pmx_emi_cs_0_1_4_5_modes[] = { - { - .ids = 0x00, - .mask = PMX_TIMER_3_4_MASK, - }, -}; - -struct pmx_dev spear310_pmx_emi_cs_0_1_4_5 = { - .name = "emi_cs_0_1_4_5", - .modes = pmx_emi_cs_0_1_4_5_modes, - .mode_count = ARRAY_SIZE(pmx_emi_cs_0_1_4_5_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_emi_cs_2_3_modes[] = { - { - .ids = 0x00, - .mask = PMX_TIMER_1_2_MASK, - }, -}; - -struct pmx_dev spear310_pmx_emi_cs_2_3 = { - .name = "emi_cs_2_3", - .modes = pmx_emi_cs_2_3_modes, - .mode_count = ARRAY_SIZE(pmx_emi_cs_2_3_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_uart1_modes[] = { - { - .ids = 0x00, - .mask = PMX_FIRDA_MASK, - }, -}; - -struct pmx_dev spear310_pmx_uart1 = { - .name = "uart1", - .modes = pmx_uart1_modes, - .mode_count = ARRAY_SIZE(pmx_uart1_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_uart2_modes[] = { - { - .ids = 0x00, - .mask = PMX_TIMER_1_2_MASK, - }, -}; - -struct pmx_dev spear310_pmx_uart2 = { - .name = "uart2", - .modes = pmx_uart2_modes, - .mode_count = ARRAY_SIZE(pmx_uart2_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_uart3_4_5_modes[] = { - { - .ids = 0x00, - .mask = PMX_UART0_MODEM_MASK, - }, -}; - -struct pmx_dev spear310_pmx_uart3_4_5 = { - .name = "uart3_4_5", - .modes = pmx_uart3_4_5_modes, - .mode_count = ARRAY_SIZE(pmx_uart3_4_5_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_fsmc_modes[] = { - { - .ids = 0x00, - .mask = PMX_SSP_CS_MASK, - }, -}; - -struct pmx_dev spear310_pmx_fsmc = { - .name = "fsmc", - .modes = pmx_fsmc_modes, - .mode_count = ARRAY_SIZE(pmx_fsmc_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_rs485_0_1_modes[] = { - { - .ids = 0x00, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear310_pmx_rs485_0_1 = { - .name = "rs485_0_1", - .modes = pmx_rs485_0_1_modes, - .mode_count = ARRAY_SIZE(pmx_rs485_0_1_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_tdm0_modes[] = { - { - .ids = 0x00, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear310_pmx_tdm0 = { - .name = "tdm0", - .modes = pmx_tdm0_modes, - .mode_count = ARRAY_SIZE(pmx_tdm0_modes), - .enb_on_reset = 1, -}; - -/* pmx driver structure */ -static struct pmx_driver pmx_driver = { - .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, -}; - /* spear3xx shared irq */ static struct shirq_dev_config shirq_ras1_config[] = { { @@ -260,30 +138,6 @@ static struct spear_shirq shirq_intrcomm_ras = { }, }; -/* padmux devices to enable */ -static struct pmx_dev *spear310_evb_pmx_devs[] = { - /* spear3xx specific devices */ - &spear3xx_pmx_i2c, - &spear3xx_pmx_ssp, - &spear3xx_pmx_gpio_pin0, - &spear3xx_pmx_gpio_pin1, - &spear3xx_pmx_gpio_pin2, - &spear3xx_pmx_gpio_pin3, - &spear3xx_pmx_gpio_pin4, - &spear3xx_pmx_gpio_pin5, - &spear3xx_pmx_uart0, - - /* spear310 specific devices */ - &spear310_pmx_emi_cs_0_1_4_5, - &spear310_pmx_emi_cs_2_3, - &spear310_pmx_uart1, - &spear310_pmx_uart2, - &spear310_pmx_uart3_4_5, - &spear310_pmx_fsmc, - &spear310_pmx_rs485_0_1, - &spear310_pmx_tdm0, -}; - /* DMAC platform data's slave info */ struct pl08x_channel_data spear310_dma_info[] = { { @@ -518,7 +372,7 @@ static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = { static void __init spear310_dt_init(void) { void __iomem *base; - int ret = 0; + int ret; pl080_plat_data.slave_channels = spear310_dma_info; pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear310_dma_info); @@ -553,19 +407,6 @@ static void __init spear310_dt_init(void) if (ret) pr_err("Error registering Shared IRQ 4\n"); } - - if (of_machine_is_compatible("st,spear310-evb")) { - /* pmx initialization */ - pmx_driver.base = base; - pmx_driver.mode = NULL; - pmx_driver.devs = spear310_evb_pmx_devs; - pmx_driver.devs_count = ARRAY_SIZE(spear310_evb_pmx_devs); - - ret = pmx_register(&pmx_driver); - if (ret) - pr_err("padmux: registration failed. err no: %d\n", - ret); - } } static const char * const spear310_dt_board_compat[] = { diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c index 1e74031e1213..4812c692ca35 100644 --- a/arch/arm/mach-spear3xx/spear320.c +++ b/arch/arm/mach-spear3xx/spear320.c @@ -23,373 +23,6 @@ #include #include -/* pad multiplexing support */ -/* muxing registers */ -#define PAD_MUX_CONFIG_REG 0x0C -#define MODE_CONFIG_REG 0x10 - -/* modes */ -#define AUTO_NET_SMII_MODE (1 << 0) -#define AUTO_NET_MII_MODE (1 << 1) -#define AUTO_EXP_MODE (1 << 2) -#define SMALL_PRINTERS_MODE (1 << 3) -#define ALL_MODES 0xF - -struct pmx_mode spear320_auto_net_smii_mode = { - .id = AUTO_NET_SMII_MODE, - .name = "Automation Networking SMII Mode", - .mask = 0x00, -}; - -struct pmx_mode spear320_auto_net_mii_mode = { - .id = AUTO_NET_MII_MODE, - .name = "Automation Networking MII Mode", - .mask = 0x01, -}; - -struct pmx_mode spear320_auto_exp_mode = { - .id = AUTO_EXP_MODE, - .name = "Automation Expanded Mode", - .mask = 0x02, -}; - -struct pmx_mode spear320_small_printers_mode = { - .id = SMALL_PRINTERS_MODE, - .name = "Small Printers Mode", - .mask = 0x03, -}; - -/* devices */ -static struct pmx_dev_mode pmx_clcd_modes[] = { - { - .ids = AUTO_NET_SMII_MODE, - .mask = 0x0, - }, -}; - -struct pmx_dev spear320_pmx_clcd = { - .name = "clcd", - .modes = pmx_clcd_modes, - .mode_count = ARRAY_SIZE(pmx_clcd_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_emi_modes[] = { - { - .ids = AUTO_EXP_MODE, - .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK, - }, -}; - -struct pmx_dev spear320_pmx_emi = { - .name = "emi", - .modes = pmx_emi_modes, - .mode_count = ARRAY_SIZE(pmx_emi_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_fsmc_modes[] = { - { - .ids = ALL_MODES, - .mask = 0x0, - }, -}; - -struct pmx_dev spear320_pmx_fsmc = { - .name = "fsmc", - .modes = pmx_fsmc_modes, - .mode_count = ARRAY_SIZE(pmx_fsmc_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_spp_modes[] = { - { - .ids = SMALL_PRINTERS_MODE, - .mask = 0x0, - }, -}; - -struct pmx_dev spear320_pmx_spp = { - .name = "spp", - .modes = pmx_spp_modes, - .mode_count = ARRAY_SIZE(pmx_spp_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_sdhci_modes[] = { - { - .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | - SMALL_PRINTERS_MODE, - .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK, - }, -}; - -struct pmx_dev spear320_pmx_sdhci = { - .name = "sdhci", - .modes = pmx_sdhci_modes, - .mode_count = ARRAY_SIZE(pmx_sdhci_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_i2s_modes[] = { - { - .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, - .mask = PMX_UART0_MODEM_MASK, - }, -}; - -struct pmx_dev spear320_pmx_i2s = { - .name = "i2s", - .modes = pmx_i2s_modes, - .mode_count = ARRAY_SIZE(pmx_i2s_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_uart1_modes[] = { - { - .ids = ALL_MODES, - .mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK, - }, -}; - -struct pmx_dev spear320_pmx_uart1 = { - .name = "uart1", - .modes = pmx_uart1_modes, - .mode_count = ARRAY_SIZE(pmx_uart1_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_uart1_modem_modes[] = { - { - .ids = AUTO_EXP_MODE, - .mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | - PMX_SSP_CS_MASK, - }, { - .ids = SMALL_PRINTERS_MODE, - .mask = PMX_GPIO_PIN3_MASK | PMX_GPIO_PIN4_MASK | - PMX_GPIO_PIN5_MASK | PMX_SSP_CS_MASK, - }, -}; - -struct pmx_dev spear320_pmx_uart1_modem = { - .name = "uart1_modem", - .modes = pmx_uart1_modem_modes, - .mode_count = ARRAY_SIZE(pmx_uart1_modem_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_uart2_modes[] = { - { - .ids = ALL_MODES, - .mask = PMX_FIRDA_MASK, - }, -}; - -struct pmx_dev spear320_pmx_uart2 = { - .name = "uart2", - .modes = pmx_uart2_modes, - .mode_count = ARRAY_SIZE(pmx_uart2_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_touchscreen_modes[] = { - { - .ids = AUTO_NET_SMII_MODE, - .mask = PMX_SSP_CS_MASK, - }, -}; - -struct pmx_dev spear320_pmx_touchscreen = { - .name = "touchscreen", - .modes = pmx_touchscreen_modes, - .mode_count = ARRAY_SIZE(pmx_touchscreen_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_can_modes[] = { - { - .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE | AUTO_EXP_MODE, - .mask = PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK | - PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK, - }, -}; - -struct pmx_dev spear320_pmx_can = { - .name = "can", - .modes = pmx_can_modes, - .mode_count = ARRAY_SIZE(pmx_can_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_sdhci_led_modes[] = { - { - .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, - .mask = PMX_SSP_CS_MASK, - }, -}; - -struct pmx_dev spear320_pmx_sdhci_led = { - .name = "sdhci_led", - .modes = pmx_sdhci_led_modes, - .mode_count = ARRAY_SIZE(pmx_sdhci_led_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_pwm0_modes[] = { - { - .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, - .mask = PMX_UART0_MODEM_MASK, - }, { - .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear320_pmx_pwm0 = { - .name = "pwm0", - .modes = pmx_pwm0_modes, - .mode_count = ARRAY_SIZE(pmx_pwm0_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_pwm1_modes[] = { - { - .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, - .mask = PMX_UART0_MODEM_MASK, - }, { - .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear320_pmx_pwm1 = { - .name = "pwm1", - .modes = pmx_pwm1_modes, - .mode_count = ARRAY_SIZE(pmx_pwm1_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_pwm2_modes[] = { - { - .ids = AUTO_NET_SMII_MODE | AUTO_NET_MII_MODE, - .mask = PMX_SSP_CS_MASK, - }, { - .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear320_pmx_pwm2 = { - .name = "pwm2", - .modes = pmx_pwm2_modes, - .mode_count = ARRAY_SIZE(pmx_pwm2_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_pwm3_modes[] = { - { - .ids = AUTO_EXP_MODE | SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear320_pmx_pwm3 = { - .name = "pwm3", - .modes = pmx_pwm3_modes, - .mode_count = ARRAY_SIZE(pmx_pwm3_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_ssp1_modes[] = { - { - .ids = SMALL_PRINTERS_MODE | AUTO_NET_SMII_MODE, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear320_pmx_ssp1 = { - .name = "ssp1", - .modes = pmx_ssp1_modes, - .mode_count = ARRAY_SIZE(pmx_ssp1_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_ssp2_modes[] = { - { - .ids = AUTO_NET_SMII_MODE, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear320_pmx_ssp2 = { - .name = "ssp2", - .modes = pmx_ssp2_modes, - .mode_count = ARRAY_SIZE(pmx_ssp2_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_mii1_modes[] = { - { - .ids = AUTO_NET_MII_MODE, - .mask = 0x0, - }, -}; - -struct pmx_dev spear320_pmx_mii1 = { - .name = "mii1", - .modes = pmx_mii1_modes, - .mode_count = ARRAY_SIZE(pmx_mii1_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_smii0_modes[] = { - { - .ids = AUTO_NET_SMII_MODE | AUTO_EXP_MODE | SMALL_PRINTERS_MODE, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear320_pmx_smii0 = { - .name = "smii0", - .modes = pmx_smii0_modes, - .mode_count = ARRAY_SIZE(pmx_smii0_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_smii1_modes[] = { - { - .ids = AUTO_NET_SMII_MODE | SMALL_PRINTERS_MODE, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear320_pmx_smii1 = { - .name = "smii1", - .modes = pmx_smii1_modes, - .mode_count = ARRAY_SIZE(pmx_smii1_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_i2c1_modes[] = { - { - .ids = AUTO_EXP_MODE, - .mask = 0x0, - }, -}; - -struct pmx_dev spear320_pmx_i2c1 = { - .name = "i2c1", - .modes = pmx_i2c1_modes, - .mode_count = ARRAY_SIZE(pmx_i2c1_modes), - .enb_on_reset = 1, -}; - -/* pmx driver structure */ -static struct pmx_driver pmx_driver = { - .mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x00000007}, - .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff}, -}; - /* spear3xx shared irq */ static struct shirq_dev_config shirq_ras1_config[] = { { @@ -514,27 +147,6 @@ static struct spear_shirq shirq_intrcomm_ras = { }, }; -/* padmux devices to enable */ -static struct pmx_dev *spear320_evb_pmx_devs[] = { - /* spear3xx specific devices */ - &spear3xx_pmx_i2c, - &spear3xx_pmx_ssp, - &spear3xx_pmx_mii, - &spear3xx_pmx_uart0, - - /* spear320 specific devices */ - &spear320_pmx_fsmc, - &spear320_pmx_sdhci, - &spear320_pmx_i2s, - &spear320_pmx_uart1, - &spear320_pmx_uart2, - &spear320_pmx_can, - &spear320_pmx_pwm0, - &spear320_pmx_pwm1, - &spear320_pmx_pwm2, - &spear320_pmx_mii1, -}; - /* DMAC platform data's slave info */ struct pl08x_channel_data spear320_dma_info[] = { { @@ -772,7 +384,7 @@ static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = { static void __init spear320_dt_init(void) { void __iomem *base; - int ret = 0; + int ret; pl080_plat_data.slave_channels = spear320_dma_info; pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear320_dma_info); @@ -801,19 +413,6 @@ static void __init spear320_dt_init(void) if (ret) pr_err("Error registering Shared IRQ 4\n"); } - - if (of_machine_is_compatible("st,spear320-evb")) { - /* pmx initialization */ - pmx_driver.base = base; - pmx_driver.mode = &spear320_auto_net_mii_mode; - pmx_driver.devs = spear320_evb_pmx_devs; - pmx_driver.devs_count = ARRAY_SIZE(spear320_evb_pmx_devs); - - ret = pmx_register(&pmx_driver); - if (ret) - pr_err("padmux: registration failed. err no: %d\n", - ret); - } } static const char * const spear320_dt_board_compat[] = { diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index 17d4ac9a95e1..12bf879a9ef1 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c @@ -23,431 +23,6 @@ #include #include -/* pad multiplexing support */ -/* devices */ -static struct pmx_dev_mode pmx_firda_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_FIRDA_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_firda = { - .name = "firda", - .modes = pmx_firda_modes, - .mode_count = ARRAY_SIZE(pmx_firda_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_i2c_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_I2C_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_i2c = { - .name = "i2c", - .modes = pmx_i2c_modes, - .mode_count = ARRAY_SIZE(pmx_i2c_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_ssp_cs_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_SSP_CS_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_ssp_cs = { - .name = "ssp_chip_selects", - .modes = pmx_ssp_cs_modes, - .mode_count = ARRAY_SIZE(pmx_ssp_cs_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_ssp_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_SSP_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_ssp = { - .name = "ssp", - .modes = pmx_ssp_modes, - .mode_count = ARRAY_SIZE(pmx_ssp_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_mii_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_mii = { - .name = "mii", - .modes = pmx_mii_modes, - .mode_count = ARRAY_SIZE(pmx_mii_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_gpio_pin0_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_GPIO_PIN0_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_gpio_pin0 = { - .name = "gpio_pin0", - .modes = pmx_gpio_pin0_modes, - .mode_count = ARRAY_SIZE(pmx_gpio_pin0_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_gpio_pin1_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_GPIO_PIN1_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_gpio_pin1 = { - .name = "gpio_pin1", - .modes = pmx_gpio_pin1_modes, - .mode_count = ARRAY_SIZE(pmx_gpio_pin1_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_gpio_pin2_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_GPIO_PIN2_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_gpio_pin2 = { - .name = "gpio_pin2", - .modes = pmx_gpio_pin2_modes, - .mode_count = ARRAY_SIZE(pmx_gpio_pin2_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_gpio_pin3_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_GPIO_PIN3_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_gpio_pin3 = { - .name = "gpio_pin3", - .modes = pmx_gpio_pin3_modes, - .mode_count = ARRAY_SIZE(pmx_gpio_pin3_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_gpio_pin4_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_GPIO_PIN4_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_gpio_pin4 = { - .name = "gpio_pin4", - .modes = pmx_gpio_pin4_modes, - .mode_count = ARRAY_SIZE(pmx_gpio_pin4_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_gpio_pin5_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_GPIO_PIN5_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_gpio_pin5 = { - .name = "gpio_pin5", - .modes = pmx_gpio_pin5_modes, - .mode_count = ARRAY_SIZE(pmx_gpio_pin5_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_uart0_modem_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_UART0_MODEM_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_uart0_modem = { - .name = "uart0_modem", - .modes = pmx_uart0_modem_modes, - .mode_count = ARRAY_SIZE(pmx_uart0_modem_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_uart0_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_UART0_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_uart0 = { - .name = "uart0", - .modes = pmx_uart0_modes, - .mode_count = ARRAY_SIZE(pmx_uart0_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_timer_3_4_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_TIMER_3_4_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_timer_3_4 = { - .name = "timer_3_4", - .modes = pmx_timer_3_4_modes, - .mode_count = ARRAY_SIZE(pmx_timer_3_4_modes), - .enb_on_reset = 0, -}; - -static struct pmx_dev_mode pmx_timer_1_2_modes[] = { - { - .ids = 0xffffffff, - .mask = PMX_TIMER_1_2_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_timer_1_2 = { - .name = "timer_1_2", - .modes = pmx_timer_1_2_modes, - .mode_count = ARRAY_SIZE(pmx_timer_1_2_modes), - .enb_on_reset = 0, -}; - -#if defined(CONFIG_MACH_SPEAR310) || defined(CONFIG_MACH_SPEAR320) -/* plgpios devices */ -static struct pmx_dev_mode pmx_plgpio_0_1_modes[] = { - { - .ids = 0x00, - .mask = PMX_FIRDA_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_0_1 = { - .name = "plgpio 0 and 1", - .modes = pmx_plgpio_0_1_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_0_1_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_2_3_modes[] = { - { - .ids = 0x00, - .mask = PMX_UART0_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_2_3 = { - .name = "plgpio 2 and 3", - .modes = pmx_plgpio_2_3_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_2_3_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_4_5_modes[] = { - { - .ids = 0x00, - .mask = PMX_I2C_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_4_5 = { - .name = "plgpio 4 and 5", - .modes = pmx_plgpio_4_5_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_4_5_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_6_9_modes[] = { - { - .ids = 0x00, - .mask = PMX_SSP_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_6_9 = { - .name = "plgpio 6 to 9", - .modes = pmx_plgpio_6_9_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_6_9_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_10_27_modes[] = { - { - .ids = 0x00, - .mask = PMX_MII_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_10_27 = { - .name = "plgpio 10 to 27", - .modes = pmx_plgpio_10_27_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_10_27_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_28_modes[] = { - { - .ids = 0x00, - .mask = PMX_GPIO_PIN0_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_28 = { - .name = "plgpio 28", - .modes = pmx_plgpio_28_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_28_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_29_modes[] = { - { - .ids = 0x00, - .mask = PMX_GPIO_PIN1_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_29 = { - .name = "plgpio 29", - .modes = pmx_plgpio_29_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_29_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_30_modes[] = { - { - .ids = 0x00, - .mask = PMX_GPIO_PIN2_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_30 = { - .name = "plgpio 30", - .modes = pmx_plgpio_30_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_30_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_31_modes[] = { - { - .ids = 0x00, - .mask = PMX_GPIO_PIN3_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_31 = { - .name = "plgpio 31", - .modes = pmx_plgpio_31_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_31_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_32_modes[] = { - { - .ids = 0x00, - .mask = PMX_GPIO_PIN4_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_32 = { - .name = "plgpio 32", - .modes = pmx_plgpio_32_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_32_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_33_modes[] = { - { - .ids = 0x00, - .mask = PMX_GPIO_PIN5_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_33 = { - .name = "plgpio 33", - .modes = pmx_plgpio_33_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_33_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_34_36_modes[] = { - { - .ids = 0x00, - .mask = PMX_SSP_CS_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_34_36 = { - .name = "plgpio 34 to 36", - .modes = pmx_plgpio_34_36_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_34_36_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_37_42_modes[] = { - { - .ids = 0x00, - .mask = PMX_UART0_MODEM_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_37_42 = { - .name = "plgpio 37 to 42", - .modes = pmx_plgpio_37_42_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_37_42_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_43_44_47_48_modes[] = { - { - .ids = 0x00, - .mask = PMX_TIMER_1_2_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_43_44_47_48 = { - .name = "plgpio 43, 44, 47 and 48", - .modes = pmx_plgpio_43_44_47_48_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_43_44_47_48_modes), - .enb_on_reset = 1, -}; - -static struct pmx_dev_mode pmx_plgpio_45_46_49_50_modes[] = { - { - .ids = 0x00, - .mask = PMX_TIMER_3_4_MASK, - }, -}; - -struct pmx_dev spear3xx_pmx_plgpio_45_46_49_50 = { - .name = "plgpio 45, 46, 49 and 50", - .modes = pmx_plgpio_45_46_49_50_modes, - .mode_count = ARRAY_SIZE(pmx_plgpio_45_46_49_50_modes), - .enb_on_reset = 1, -}; -#endif /* CONFIG_MACH_SPEAR310 || CONFIG_MACH_SPEAR320 */ - /* ssp device registration */ struct pl022_ssp_controller pl022_plat_data = { .bus_id = 0, diff --git a/arch/arm/plat-spear/Makefile b/arch/arm/plat-spear/Makefile index 4af6258d0fee..7744802c83e7 100644 --- a/arch/arm/plat-spear/Makefile +++ b/arch/arm/plat-spear/Makefile @@ -5,4 +5,4 @@ # Common support obj-y := clock.o restart.o time.o pl080.o -obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o padmux.o +obj-$(CONFIG_ARCH_SPEAR3XX) += shirq.o diff --git a/arch/arm/plat-spear/include/plat/padmux.h b/arch/arm/plat-spear/include/plat/padmux.h deleted file mode 100644 index 877f3adcf610..000000000000 --- a/arch/arm/plat-spear/include/plat/padmux.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * arch/arm/plat-spear/include/plat/padmux.h - * - * SPEAr platform specific gpio pads muxing file - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __PLAT_PADMUX_H -#define __PLAT_PADMUX_H - -#include - -/* - * struct pmx_reg: configuration structure for mode reg and mux reg - * - * offset: offset of mode reg - * mask: mask of mode reg - */ -struct pmx_reg { - u32 offset; - u32 mask; -}; - -/* - * struct pmx_dev_mode: configuration structure every group of modes of a device - * - * ids: all modes for this configuration - * mask: mask for supported mode - */ -struct pmx_dev_mode { - u32 ids; - u32 mask; -}; - -/* - * struct pmx_mode: mode definition structure - * - * name: mode name - * mask: mode mask - */ -struct pmx_mode { - char *name; - u32 id; - u32 mask; -}; - -/* - * struct pmx_dev: device definition structure - * - * name: device name - * modes: device configuration array for different modes supported - * mode_count: size of modes array - * is_active: is peripheral active/enabled - * enb_on_reset: if 1, mask bits to be cleared in reg otherwise to be set in reg - */ -struct pmx_dev { - char *name; - struct pmx_dev_mode *modes; - u8 mode_count; - bool is_active; - bool enb_on_reset; -}; - -/* - * struct pmx_driver: driver definition structure - * - * mode: mode to be set - * devs: array of pointer to pmx devices - * devs_count: ARRAY_SIZE of devs - * base: base address of soc config registers - * mode_reg: structure of mode config register - * mux_reg: structure of device mux config register - */ -struct pmx_driver { - struct pmx_mode *mode; - struct pmx_dev **devs; - u8 devs_count; - u32 *base; - struct pmx_reg mode_reg; - struct pmx_reg mux_reg; -}; - -/* pmx functions */ -int pmx_register(struct pmx_driver *driver); - -#endif /* __PLAT_PADMUX_H */ diff --git a/arch/arm/plat-spear/padmux.c b/arch/arm/plat-spear/padmux.c deleted file mode 100644 index 555eec6dc1cb..000000000000 --- a/arch/arm/plat-spear/padmux.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * arch/arm/plat-spear/include/plat/padmux.c - * - * SPEAr platform specific gpio pads muxing source file - * - * Copyright (C) 2009 ST Microelectronics - * Viresh Kumar - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include - -/* - * struct pmx: pmx definition structure - * - * base: base address of configuration registers - * mode_reg: mode configurations - * mux_reg: muxing configurations - * active_mode: pointer to current active mode - */ -struct pmx { - u32 base; - struct pmx_reg mode_reg; - struct pmx_reg mux_reg; - struct pmx_mode *active_mode; -}; - -static struct pmx *pmx; - -/** - * pmx_mode_set - Enables an multiplexing mode - * @mode - pointer to pmx mode - * - * It will set mode of operation in hardware. - * Returns -ve on Err otherwise 0 - */ -static int pmx_mode_set(struct pmx_mode *mode) -{ - u32 val; - - if (!mode->name) - return -EFAULT; - - pmx->active_mode = mode; - - val = readl(pmx->base + pmx->mode_reg.offset); - val &= ~pmx->mode_reg.mask; - val |= mode->mask & pmx->mode_reg.mask; - writel(val, pmx->base + pmx->mode_reg.offset); - - return 0; -} - -/** - * pmx_devs_enable - Enables list of devices - * @devs - pointer to pmx device array - * @count - number of devices to enable - * - * It will enable pads for all required peripherals once and only once. - * If peripheral is not supported by current mode then request is rejected. - * Conflicts between peripherals are not handled and peripherals will be - * enabled in the order they are present in pmx_dev array. - * In case of conflicts last peripheral enabled will be present. - * Returns -ve on Err otherwise 0 - */ -static int pmx_devs_enable(struct pmx_dev **devs, u8 count) -{ - u32 val, i, mask; - - if (!count) - return -EINVAL; - - val = readl(pmx->base + pmx->mux_reg.offset); - for (i = 0; i < count; i++) { - u8 j = 0; - - if (!devs[i]->name || !devs[i]->modes) { - printk(KERN_ERR "padmux: dev name or modes is null\n"); - continue; - } - /* check if peripheral exists in active mode */ - if (pmx->active_mode) { - bool found = false; - for (j = 0; j < devs[i]->mode_count; j++) { - if (devs[i]->modes[j].ids & - pmx->active_mode->id) { - found = true; - break; - } - } - if (found == false) { - printk(KERN_ERR "%s device not available in %s"\ - "mode\n", devs[i]->name, - pmx->active_mode->name); - continue; - } - } - - /* enable peripheral */ - mask = devs[i]->modes[j].mask & pmx->mux_reg.mask; - if (devs[i]->enb_on_reset) - val &= ~mask; - else - val |= mask; - - devs[i]->is_active = true; - } - writel(val, pmx->base + pmx->mux_reg.offset); - kfree(pmx); - - /* this will ensure that multiplexing can't be changed now */ - pmx = (struct pmx *)-1; - - return 0; -} - -/** - * pmx_register - registers a platform requesting pad mux feature - * @driver - pointer to driver structure containing driver specific parameters - * - * Also this must be called only once. This will allocate memory for pmx - * structure, will call pmx_mode_set, will call pmx_devs_enable. - * Returns -ve on Err otherwise 0 - */ -int pmx_register(struct pmx_driver *driver) -{ - int ret = 0; - - if (pmx) - return -EPERM; - if (!driver->base || !driver->devs) - return -EFAULT; - - pmx = kzalloc(sizeof(*pmx), GFP_KERNEL); - if (!pmx) - return -ENOMEM; - - pmx->base = (u32)driver->base; - pmx->mode_reg.offset = driver->mode_reg.offset; - pmx->mode_reg.mask = driver->mode_reg.mask; - pmx->mux_reg.offset = driver->mux_reg.offset; - pmx->mux_reg.mask = driver->mux_reg.mask; - - /* choose mode to enable */ - if (driver->mode) { - ret = pmx_mode_set(driver->mode); - if (ret) - goto pmx_fail; - } - ret = pmx_devs_enable(driver->devs, driver->devs_count); - if (ret) - goto pmx_fail; - - return 0; - -pmx_fail: - return ret; -} -- cgit v1.2.2 From e0373607855d033283b19014c8f14b90b3836924 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Thu, 29 Mar 2012 08:30:19 +0530 Subject: SPEAr3xx: Add pinctrl support for boards Signed-off-by: Viresh Kumar Acked-by: Linus Walleij Reviewed-by: Stephen Warren --- arch/arm/boot/dts/spear300-evb.dts | 38 ++++++++++++++++++++++++ arch/arm/boot/dts/spear300.dtsi | 5 ++++ arch/arm/boot/dts/spear310-evb.dts | 61 ++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/spear310.dtsi | 5 ++++ arch/arm/boot/dts/spear320-evb.dts | 61 ++++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/spear320.dtsi | 7 ++++- arch/arm/mach-spear3xx/Kconfig | 3 ++ arch/arm/plat-spear/Kconfig | 1 + 8 files changed, 180 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts index eaecc29b9d81..402ca0d55011 100644 --- a/arch/arm/boot/dts/spear300-evb.dts +++ b/arch/arm/boot/dts/spear300-evb.dts @@ -25,6 +25,44 @@ }; ahb { + pinmux@99000000 { + st,pinmux-mode = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + i2c0 { + st,pins = "i2c0_grp"; + st,function = "i2c0"; + }; + ssp0 { + st,pins = "ssp0_grp"; + st,function = "ssp0"; + }; + mii0 { + st,pins = "mii0_grp"; + st,function = "mii0"; + }; + uart0 { + st,pins = "uart0_grp"; + st,function = "uart0"; + }; + clcd { + st,pins = "clcd_pfmode_grp"; + st,function = "clcd"; + }; + sdhci { + st,pins = "sdhci_4bit_grp"; + st,function = "sdhci"; + }; + gpio1 { + st,pins = "gpio1_4_to_7_grp", + "gpio1_0_to_3_grp"; + st,function = "gpio1"; + }; + }; + }; + clcd@60000000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/spear300.dtsi b/arch/arm/boot/dts/spear300.dtsi index f9fcbf4f477b..01c5e358fdb2 100644 --- a/arch/arm/boot/dts/spear300.dtsi +++ b/arch/arm/boot/dts/spear300.dtsi @@ -21,6 +21,11 @@ ranges = <0x60000000 0x60000000 0x50000000 0xd0000000 0xd0000000 0x30000000>; + pinmux@99000000 { + compatible = "st,spear300-pinmux"; + reg = <0x99000000 0x1000>; + }; + clcd@60000000 { compatible = "arm,clcd-pl110", "arm,primecell"; reg = <0x60000000 0x1000>; diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts index c86af33f700e..6d95317100ad 100644 --- a/arch/arm/boot/dts/spear310-evb.dts +++ b/arch/arm/boot/dts/spear310-evb.dts @@ -25,6 +25,67 @@ }; ahb { + pinmux@b4000000 { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + gpio0 { + st,pins = "gpio0_pin0_grp", + "gpio0_pin1_grp", + "gpio0_pin2_grp", + "gpio0_pin3_grp", + "gpio0_pin4_grp", + "gpio0_pin5_grp"; + st,function = "gpio0"; + }; + i2c0 { + st,pins = "i2c0_grp"; + st,function = "i2c0"; + }; + mii0 { + st,pins = "mii0_grp"; + st,function = "mii0"; + }; + ssp0 { + st,pins = "ssp0_grp"; + st,function = "ssp0"; + }; + uart0 { + st,pins = "uart0_grp"; + st,function = "uart0"; + }; + emi { + st,pins = "emi_cs_0_to_5_grp"; + st,function = "emi"; + }; + fsmc { + st,pins = "fsmc_grp"; + st,function = "fsmc"; + }; + uart1 { + st,pins = "uart1_grp"; + st,function = "uart1"; + }; + uart2 { + st,pins = "uart2_grp"; + st,function = "uart2"; + }; + uart3 { + st,pins = "uart3_grp"; + st,function = "uart3"; + }; + uart4 { + st,pins = "uart4_grp"; + st,function = "uart4"; + }; + uart5 { + st,pins = "uart5_grp"; + st,function = "uart5"; + }; + }; + }; + dma@fc400000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi index dc7fa14da846..e47081c494d9 100644 --- a/arch/arm/boot/dts/spear310.dtsi +++ b/arch/arm/boot/dts/spear310.dtsi @@ -22,6 +22,11 @@ 0xb0000000 0xb0000000 0x10000000 0xd0000000 0xd0000000 0x30000000>; + pinmux@b4000000 { + compatible = "st,spear310-pinmux"; + reg = <0xb4000000 0x1000>; + }; + fsmc: flash@44000000 { compatible = "st,spear600-fsmc-nand"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts index d43de712e863..0c6463b71a37 100644 --- a/arch/arm/boot/dts/spear320-evb.dts +++ b/arch/arm/boot/dts/spear320-evb.dts @@ -25,6 +25,67 @@ }; ahb { + pinmux@b3000000 { + st,pinmux-mode = <3>; + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + i2c0 { + st,pins = "i2c0_grp"; + st,function = "i2c0"; + }; + mii0 { + st,pins = "mii0_grp"; + st,function = "mii0"; + }; + ssp0 { + st,pins = "ssp0_grp"; + st,function = "ssp0"; + }; + uart0 { + st,pins = "uart0_grp"; + st,function = "uart0"; + }; + sdhci { + st,pins = "sdhci_cd_51_grp"; + st,function = "sdhci"; + }; + i2s { + st,pins = "i2s_grp"; + st,function = "i2s"; + }; + uart1 { + st,pins = "uart1_grp"; + st,function = "uart1"; + }; + uart2 { + st,pins = "uart2_grp"; + st,function = "uart2"; + }; + can0 { + st,pins = "can0_grp"; + st,function = "can0"; + }; + can1 { + st,pins = "can1_grp"; + st,function = "can1"; + }; + mii2 { + st,pins = "mii2_grp"; + st,function = "mii2"; + }; + pwm0_1 { + st,pins = "pwm0_1_pin_14_15_grp"; + st,function = "pwm0_1"; + }; + pwm2 { + st,pins = "pwm2_pin_13_grp"; + st,function = "pwm2"; + }; + }; + }; + clcd@90000000 { status = "okay"; }; diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi index 9a0267a5a0b7..5372ca399b1f 100644 --- a/arch/arm/boot/dts/spear320.dtsi +++ b/arch/arm/boot/dts/spear320.dtsi @@ -18,9 +18,14 @@ #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; - ranges = <0x40000000 0x40000000 0x70000000 + ranges = <0x40000000 0x40000000 0x80000000 0xd0000000 0xd0000000 0x30000000>; + pinmux@b3000000 { + compatible = "st,spear320-pinmux"; + reg = <0xb3000000 0x1000>; + }; + clcd@90000000 { compatible = "arm,clcd-pl110", "arm,primecell"; reg = <0x90000000 0x1000>; diff --git a/arch/arm/mach-spear3xx/Kconfig b/arch/arm/mach-spear3xx/Kconfig index d9fe11cb6f16..8bd37291fa4f 100644 --- a/arch/arm/mach-spear3xx/Kconfig +++ b/arch/arm/mach-spear3xx/Kconfig @@ -7,16 +7,19 @@ if ARCH_SPEAR3XX menu "SPEAr3xx Implementations" config MACH_SPEAR300 bool "SPEAr300 Machine support with Device Tree" + select PINCTRL_SPEAR300 help Supports ST SPEAr300 machine configured via the device-tree config MACH_SPEAR310 bool "SPEAr310 Machine support with Device Tree" + select PINCTRL_SPEAR310 help Supports ST SPEAr310 machine configured via the device-tree config MACH_SPEAR320 bool "SPEAr320 Machine support with Device Tree" + select PINCTRL_SPEAR320 help Supports ST SPEAr320 machine configured via the device-tree endmenu diff --git a/arch/arm/plat-spear/Kconfig b/arch/arm/plat-spear/Kconfig index 6c066fcb2979..387655b5ce05 100644 --- a/arch/arm/plat-spear/Kconfig +++ b/arch/arm/plat-spear/Kconfig @@ -13,6 +13,7 @@ config ARCH_SPEAR3XX select ARM_VIC select CPU_ARM926T select USE_OF + select PINCTRL help Supports for ARM's SPEAR3XX family -- cgit v1.2.2 From fa599c333d3d66846545026b41bcf36d1350fe30 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 24 Apr 2012 11:15:39 +0530 Subject: ARM: SPEAr3xx: Correct keyboard data passed from DT keyboard data passed via DT is in wrong format. Fix it. Signed-off-by: Viresh Kumar Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/spear300-evb.dts | 162 ++++++++++++++++++------------------- 1 file changed, 81 insertions(+), 81 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts index eaecc29b9d81..6a79d69775b5 100644 --- a/arch/arm/boot/dts/spear300-evb.dts +++ b/arch/arm/boot/dts/spear300-evb.dts @@ -81,87 +81,87 @@ }; kbd@a0000000 { - linux,keymap = < 0x00010000 - 0x00020100 - 0x00030200 - 0x00040300 - 0x00050400 - 0x00060500 - 0x00070600 - 0x00080700 - 0x00090800 - 0x000a0001 - 0x000c0101 - 0x000d0201 - 0x000e0301 - 0x000f0401 - 0x00100501 - 0x00110601 - 0x00120701 - 0x00130801 - 0x00140002 - 0x00150102 - 0x00160202 - 0x00170302 - 0x00180402 - 0x00190502 - 0x001a0602 - 0x001b0702 - 0x001c0802 - 0x001d0003 - 0x001e0103 - 0x001f0203 - 0x00200303 - 0x00210403 - 0x00220503 - 0x00230603 - 0x00240703 - 0x00250803 - 0x00260004 - 0x00270104 - 0x00280204 - 0x00290304 - 0x002a0404 - 0x002b0504 - 0x002c0604 - 0x002d0704 - 0x002e0804 - 0x002f0005 - 0x00300105 - 0x00310205 - 0x00320305 - 0x00330405 - 0x00340505 - 0x00350605 - 0x00360705 - 0x00370805 - 0x00380006 - 0x00390106 - 0x003a0206 - 0x003b0306 - 0x003c0406 - 0x003d0506 - 0x003e0606 - 0x003f0706 - 0x00400806 - 0x00410007 - 0x00420107 - 0x00430207 - 0x00440307 - 0x00450407 - 0x00460507 - 0x00470607 - 0x00480707 - 0x00490807 - 0x004a0008 - 0x004b0108 - 0x004c0208 - 0x004d0308 - 0x004e0408 - 0x004f0508 - 0x00500608 - 0x00510708 - 0x00520808 >; + linux,keymap = < 0x00000001 + 0x00010002 + 0x00020003 + 0x00030004 + 0x00040005 + 0x00050006 + 0x00060007 + 0x00070008 + 0x00080009 + 0x0100000a + 0x0101000c + 0x0102000d + 0x0103000e + 0x0104000f + 0x01050010 + 0x01060011 + 0x01070012 + 0x01080013 + 0x02000014 + 0x02010015 + 0x02020016 + 0x02030017 + 0x02040018 + 0x02050019 + 0x0206001a + 0x0207001b + 0x0208001c + 0x0300001d + 0x0301001e + 0x0302001f + 0x03030020 + 0x03040021 + 0x03050022 + 0x03060023 + 0x03070024 + 0x03080025 + 0x04000026 + 0x04010027 + 0x04020028 + 0x04030029 + 0x0404002a + 0x0405002b + 0x0406002c + 0x0407002d + 0x0408002e + 0x0500002f + 0x05010030 + 0x05020031 + 0x05030032 + 0x05040033 + 0x05050034 + 0x05060035 + 0x05070036 + 0x05080037 + 0x06000038 + 0x06010039 + 0x0602003a + 0x0603003b + 0x0604003c + 0x0605003d + 0x0606003e + 0x0607003f + 0x06080040 + 0x07000041 + 0x07010042 + 0x07020043 + 0x07030044 + 0x07040045 + 0x07050046 + 0x07060047 + 0x07070048 + 0x07080049 + 0x0800004a + 0x0801004b + 0x0802004c + 0x0803004d + 0x0804004e + 0x0805004f + 0x08060050 + 0x08070051 + 0x08080052 >; autorepeat; st,mode = <0>; status = "okay"; -- cgit v1.2.2 From a2aa65a332b46c4e95f1226b567ff5e68bdfceac Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Wed, 2 May 2012 19:31:20 +0800 Subject: ARM: imx: enable pinctrl dummy states Enable pinctrl dummy states for imx platforms without pinctrl support. Acked-by: Stephen Warren Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo --- arch/arm/mach-imx/imx51-dt.c | 3 +++ arch/arm/mach-imx/imx53-dt.c | 3 +++ arch/arm/mach-imx/mach-imx6q.c | 7 +++++++ arch/arm/mach-imx/mm-imx1.c | 2 ++ arch/arm/mach-imx/mm-imx21.c | 2 ++ arch/arm/mach-imx/mm-imx25.c | 2 ++ arch/arm/mach-imx/mm-imx27.c | 2 ++ arch/arm/mach-imx/mm-imx3.c | 2 ++ arch/arm/mach-imx/mm-imx5.c | 2 ++ 9 files changed, 25 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c index 5cca573964f0..5f577fbda2c8 100644 --- a/arch/arm/mach-imx/imx51-dt.c +++ b/arch/arm/mach-imx/imx51-dt.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -81,6 +82,8 @@ static void __init imx51_dt_init(void) of_irq_init(imx51_irq_match); + pinctrl_provide_dummies(); + node = of_find_matching_node(NULL, imx51_iomuxc_of_match); if (node) { of_id = of_match_node(imx51_iomuxc_of_match, node); diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c index 4172279b3900..574eca4b89a5 100644 --- a/arch/arm/mach-imx/imx53-dt.c +++ b/arch/arm/mach-imx/imx53-dt.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -88,6 +89,8 @@ static void __init imx53_dt_init(void) of_irq_init(imx53_irq_match); + pinctrl_provide_dummies(); + node = of_find_matching_node(NULL, imx53_iomuxc_of_match); if (node) { of_id = of_match_node(imx53_iomuxc_of_match, node); diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index da6c1d9af768..3df360a52c17 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -77,6 +78,12 @@ static int ksz9021rn_phy_fixup(struct phy_device *phydev) static void __init imx6q_init_machine(void) { + /* + * This should be removed when all imx6q boards have pinctrl + * states for devices defined in device tree. + */ + pinctrl_provide_dummies(); + if (of_machine_is_compatible("fsl,imx6q-sabrelite")) phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK, ksz9021rn_phy_fixup); diff --git a/arch/arm/mach-imx/mm-imx1.c b/arch/arm/mach-imx/mm-imx1.c index 2bded591d5c2..fcafd3dafb8c 100644 --- a/arch/arm/mach-imx/mm-imx1.c +++ b/arch/arm/mach-imx/mm-imx1.c @@ -18,6 +18,7 @@ #include #include #include +#include #include @@ -58,4 +59,5 @@ void __init imx1_soc_init(void) MX1_GPIO_INT_PORTC, 0); mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256, MX1_GPIO_INT_PORTD, 0); + pinctrl_provide_dummies(); } diff --git a/arch/arm/mach-imx/mm-imx21.c b/arch/arm/mach-imx/mm-imx21.c index 14d540edfd1e..5f43905e5290 100644 --- a/arch/arm/mach-imx/mm-imx21.c +++ b/arch/arm/mach-imx/mm-imx21.c @@ -20,6 +20,7 @@ #include #include +#include #include #include #include @@ -88,6 +89,7 @@ void __init imx21_soc_init(void) mxc_register_gpio("imx21-gpio", 4, MX21_GPIO5_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); + pinctrl_provide_dummies(); imx_add_imx_dma(); platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res, ARRAY_SIZE(imx21_audmux_res)); diff --git a/arch/arm/mach-imx/mm-imx25.c b/arch/arm/mach-imx/mm-imx25.c index 153b457acdc0..6ff37140a4f8 100644 --- a/arch/arm/mach-imx/mm-imx25.c +++ b/arch/arm/mach-imx/mm-imx25.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -95,6 +96,7 @@ void __init imx25_soc_init(void) mxc_register_gpio("imx31-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); mxc_register_gpio("imx31-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); + pinctrl_provide_dummies(); /* i.mx25 has the i.mx35 type sdma */ imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata); /* i.mx25 has the i.mx31 type audmux */ diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c index 8cb3f5e3e569..25662558e018 100644 --- a/arch/arm/mach-imx/mm-imx27.c +++ b/arch/arm/mach-imx/mm-imx27.c @@ -20,6 +20,7 @@ #include #include +#include #include #include #include @@ -89,6 +90,7 @@ void __init imx27_soc_init(void) mxc_register_gpio("imx21-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); + pinctrl_provide_dummies(); imx_add_imx_dma(); /* imx27 has the imx21 type audmux */ platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res, diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 74127389e7ab..9128d15b1eb7 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -267,6 +268,7 @@ void __init imx35_soc_init(void) mxc_register_gpio("imx31-gpio", 1, MX35_GPIO2_BASE_ADDR, SZ_16K, MX35_INT_GPIO2, 0); mxc_register_gpio("imx31-gpio", 2, MX35_GPIO3_BASE_ADDR, SZ_16K, MX35_INT_GPIO3, 0); + pinctrl_provide_dummies(); if (to_version == 1) { strncpy(imx35_sdma_pdata.fw_name, "sdma-imx35-to1.bin", strlen(imx35_sdma_pdata.fw_name)); diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index e10f3914fcfe..ba91e6b31cf4 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -223,6 +224,7 @@ void __init imx53_soc_init(void) mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); + pinctrl_provide_dummies(); /* i.mx53 has the i.mx35 type sdma */ imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata); -- cgit v1.2.2 From d1654b803f23a77e01ead7ab50ee3fdea931ae5a Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 6 May 2012 22:14:13 +0800 Subject: ARM: mxs: enable pinctrl dummy states The mxs pinctrl driver will only support DT probe. That said, the mxs device drivers can only get pinctrl state from pinctrl subsystem when the drivers get probed from device tree. Before converting the whole mxs platform support over to device tree, we need to enable pinctrl dummy states for those non-DT board files to ensure the pinctrl API adopted by mxs device drivers will work for both DT and non-DT probe. Instead of calling pinctrl_provide_dummies() directly in every board file, the patch introduces soc specific calls mx23_soc_init() and mx28_soc_init() for boards' .init_machine hook to invoke, so that any soc specific setup for non-DT boot only can be added there. Signed-off-by: Shawn Guo --- arch/arm/mach-mxs/include/mach/common.h | 2 ++ arch/arm/mach-mxs/mach-apx4devkit.c | 2 ++ arch/arm/mach-mxs/mach-m28evk.c | 2 ++ arch/arm/mach-mxs/mach-mx23evk.c | 2 ++ arch/arm/mach-mxs/mach-mx28evk.c | 2 ++ arch/arm/mach-mxs/mach-stmp378x_devb.c | 2 ++ arch/arm/mach-mxs/mach-tx28.c | 2 ++ arch/arm/mach-mxs/mm.c | 11 +++++++++++ 8 files changed, 25 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h index c50c3ea28a9d..8d88399b73ef 100644 --- a/arch/arm/mach-mxs/include/mach/common.h +++ b/arch/arm/mach-mxs/include/mach/common.h @@ -19,11 +19,13 @@ extern void mxs_timer_init(struct clk *, int); extern void mxs_restart(char, const char *); extern int mxs_saif_clkmux_select(unsigned int clkmux); +extern void mx23_soc_init(void); extern int mx23_register_gpios(void); extern int mx23_clocks_init(void); extern void mx23_map_io(void); extern void mx23_init_irq(void); +extern void mx28_soc_init(void); extern int mx28_register_gpios(void); extern int mx28_clocks_init(void); extern void mx28_map_io(void); diff --git a/arch/arm/mach-mxs/mach-apx4devkit.c b/arch/arm/mach-mxs/mach-apx4devkit.c index 48a7fab571a6..5e90b9dcdef8 100644 --- a/arch/arm/mach-mxs/mach-apx4devkit.c +++ b/arch/arm/mach-mxs/mach-apx4devkit.c @@ -207,6 +207,8 @@ static int apx4devkit_phy_fixup(struct phy_device *phy) static void __init apx4devkit_init(void) { + mx28_soc_init(); + mxs_iomux_setup_multiple_pads(apx4devkit_pads, ARRAY_SIZE(apx4devkit_pads)); diff --git a/arch/arm/mach-mxs/mach-m28evk.c b/arch/arm/mach-mxs/mach-m28evk.c index 06d79963611c..4c00c879b893 100644 --- a/arch/arm/mach-mxs/mach-m28evk.c +++ b/arch/arm/mach-mxs/mach-m28evk.c @@ -319,6 +319,8 @@ static struct mxs_mmc_platform_data m28evk_mmc_pdata[] __initdata = { static void __init m28evk_init(void) { + mx28_soc_init(); + mxs_iomux_setup_multiple_pads(m28evk_pads, ARRAY_SIZE(m28evk_pads)); mx28_add_duart(); diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c index 5ea1c57d2606..e7272a41939d 100644 --- a/arch/arm/mach-mxs/mach-mx23evk.c +++ b/arch/arm/mach-mxs/mach-mx23evk.c @@ -141,6 +141,8 @@ static void __init mx23evk_init(void) { int ret; + mx23_soc_init(); + mxs_iomux_setup_multiple_pads(mx23evk_pads, ARRAY_SIZE(mx23evk_pads)); mx23_add_duart(); diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c index e386c142f93c..da4610ebe9e6 100644 --- a/arch/arm/mach-mxs/mach-mx28evk.c +++ b/arch/arm/mach-mxs/mach-mx28evk.c @@ -413,6 +413,8 @@ static void __init mx28evk_init(void) { int ret; + mx28_soc_init(); + mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads)); mx28_add_duart(); diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c index a626c07b8713..6548965e4a76 100644 --- a/arch/arm/mach-mxs/mach-stmp378x_devb.c +++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c @@ -85,6 +85,8 @@ static void __init stmp378x_dvb_init(void) { int ret; + mx23_soc_init(); + mxs_iomux_setup_multiple_pads(stmp378x_dvb_pads, ARRAY_SIZE(stmp378x_dvb_pads)); diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c index 2c0862e655ee..8837029de1a4 100644 --- a/arch/arm/mach-mxs/mach-tx28.c +++ b/arch/arm/mach-mxs/mach-tx28.c @@ -146,6 +146,8 @@ static struct mxs_mmc_platform_data tx28_mmc0_pdata __initdata = { static void __init tx28_stk5v3_init(void) { + mx28_soc_init(); + mxs_iomux_setup_multiple_pads(tx28_stk5v3_pads, ARRAY_SIZE(tx28_stk5v3_pads)); diff --git a/arch/arm/mach-mxs/mm.c b/arch/arm/mach-mxs/mm.c index 50af5ceebf6d..67a384edcf5b 100644 --- a/arch/arm/mach-mxs/mm.c +++ b/arch/arm/mach-mxs/mm.c @@ -13,6 +13,7 @@ #include #include +#include #include @@ -61,3 +62,13 @@ void __init mx28_init_irq(void) { icoll_init_irq(); } + +void __init mx23_soc_init(void) +{ + pinctrl_provide_dummies(); +} + +void __init mx28_soc_init(void) +{ + pinctrl_provide_dummies(); +} -- cgit v1.2.2 From 32329a2cfc2546ad8b7e8b44c395a0031d3e55db Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Wed, 2 May 2012 19:31:21 +0800 Subject: ARM: imx6q: switch to use pinctrl subsystem Acked-by: Stephen Warren Signed-off-by: Dong Aisheng Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Kconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 7561eca131b0..e0fc67cf659b 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -842,6 +842,8 @@ config SOC_IMX6Q select HAVE_IMX_MMDC select HAVE_IMX_SRC select HAVE_SMP + select PINCTRL + select PINCTRL_IMX6Q select USE_OF help -- cgit v1.2.2 From a0f5e3631b07cabf624e7d818df76d47d9d21017 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 6 May 2012 23:13:13 +0800 Subject: ARM: mxs: enable pinctrl support Signed-off-by: Shawn Guo --- arch/arm/Kconfig | 1 + arch/arm/mach-mxs/Kconfig | 2 ++ 2 files changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cf006d40342c..c67494fc05a7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -469,6 +469,7 @@ config ARCH_MXS select CLKDEV_LOOKUP select CLKSRC_MMIO select HAVE_CLK_PREPARE + select PINCTRL help Support for Freescale MXS-based family of processors diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index c57f9964a713..07d5383d68ee 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -9,11 +9,13 @@ config SOC_IMX23 bool select CPU_ARM926T select HAVE_PWM + select PINCTRL_IMX23 config SOC_IMX28 bool select CPU_ARM926T select HAVE_PWM + select PINCTRL_IMX28 comment "MXS platforms:" -- cgit v1.2.2 From 30551c0108e0d2fed48778a6bbd52843088bcb7b Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Sat, 21 Apr 2012 13:15:37 +0530 Subject: SPEAr: Add DT bindings for SPEAr's timer All SPEAr SoC's use ST's Timer module. This patch adds device tree probing capability for that. Signed-off-by: Viresh Kumar Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/spear3xx.dtsi | 6 ++++++ arch/arm/boot/dts/spear600.dtsi | 6 ++++++ arch/arm/mach-spear3xx/include/mach/generic.h | 2 +- arch/arm/mach-spear3xx/include/mach/irqs.h | 1 - arch/arm/mach-spear3xx/include/mach/spear.h | 1 - arch/arm/mach-spear3xx/spear3xx.c | 2 +- arch/arm/mach-spear6xx/include/mach/generic.h | 2 +- arch/arm/mach-spear6xx/include/mach/irqs.h | 3 --- arch/arm/mach-spear6xx/include/mach/spear.h | 1 - arch/arm/mach-spear6xx/spear6xx.c | 2 +- arch/arm/plat-spear/time.c | 31 +++++++++++++++++++-------- 11 files changed, 38 insertions(+), 19 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi index 0ae7c8e86311..91072553963f 100644 --- a/arch/arm/boot/dts/spear3xx.dtsi +++ b/arch/arm/boot/dts/spear3xx.dtsi @@ -139,6 +139,12 @@ interrupts = <12>; status = "disabled"; }; + + timer@f0000000 { + compatible = "st,spear-timer"; + reg = <0xf0000000 0x400>; + interrupts = <2>; + }; }; }; }; diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi index d777e3a6f178..089f0a42c50e 100644 --- a/arch/arm/boot/dts/spear600.dtsi +++ b/arch/arm/boot/dts/spear600.dtsi @@ -177,6 +177,12 @@ interrupts = <28>; status = "disabled"; }; + + timer@f0000000 { + compatible = "st,spear-timer"; + reg = <0xf0000000 0x400>; + interrupts = <16>; + }; }; }; }; diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h index e4f4d721cda2..efb69357429a 100644 --- a/arch/arm/mach-spear3xx/include/mach/generic.h +++ b/arch/arm/mach-spear3xx/include/mach/generic.h @@ -28,7 +28,7 @@ extern struct pl022_ssp_controller pl022_plat_data; extern struct pl08x_platform_data pl080_plat_data; /* Add spear3xx family function declarations here */ -void __init spear_setup_timer(resource_size_t base, int irq); +void __init spear_setup_of_timer(void); void __init spear3xx_map_io(void); void __init spear3xx_dt_init_irq(void); diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h index 319620a1afb4..51bd62a0254c 100644 --- a/arch/arm/mach-spear3xx/include/mach/irqs.h +++ b/arch/arm/mach-spear3xx/include/mach/irqs.h @@ -16,7 +16,6 @@ /* FIXME: probe all these from DT */ #define SPEAR3XX_IRQ_INTRCOMM_RAS_ARM 1 -#define SPEAR3XX_IRQ_CPU_GPT1_1 2 #define SPEAR3XX_IRQ_GEN_RAS_1 28 #define SPEAR3XX_IRQ_GEN_RAS_2 29 #define SPEAR3XX_IRQ_GEN_RAS_3 30 diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h index 6d4dadc67633..04da906b0d4c 100644 --- a/arch/arm/mach-spear3xx/include/mach/spear.h +++ b/arch/arm/mach-spear3xx/include/mach/spear.h @@ -26,7 +26,6 @@ /* ML1 - Multi Layer CPU Subsystem */ #define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000) #define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) -#define SPEAR3XX_CPU_TMR_BASE UL(0xF0000000) /* ICM3 - Basic Subsystem */ #define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index bbb11efa6056..25c6c67d5b07 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c @@ -534,7 +534,7 @@ static void __init spear3xx_timer_init(void) clk_put(gpt_clk); clk_put(pclk); - spear_setup_timer(SPEAR3XX_CPU_TMR_BASE, SPEAR3XX_IRQ_CPU_GPT1_1); + spear_setup_of_timer(); } struct sys_timer spear3xx_timer = { diff --git a/arch/arm/mach-spear6xx/include/mach/generic.h b/arch/arm/mach-spear6xx/include/mach/generic.h index 7167fd331d86..65514b159370 100644 --- a/arch/arm/mach-spear6xx/include/mach/generic.h +++ b/arch/arm/mach-spear6xx/include/mach/generic.h @@ -16,7 +16,7 @@ #include -void __init spear_setup_timer(resource_size_t base, int irq); +void __init spear_setup_of_timer(void); void spear_restart(char, const char *); void __init spear6xx_clk_init(void); diff --git a/arch/arm/mach-spear6xx/include/mach/irqs.h b/arch/arm/mach-spear6xx/include/mach/irqs.h index 2b735389e74b..37a5c411a866 100644 --- a/arch/arm/mach-spear6xx/include/mach/irqs.h +++ b/arch/arm/mach-spear6xx/include/mach/irqs.h @@ -16,9 +16,6 @@ /* IRQ definitions */ /* VIC 1 */ -/* FIXME: probe this from DT */ -#define IRQ_CPU_GPT1_1 16 - #define IRQ_VIC_END 64 /* GPIO pins virtual irqs */ diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h index d278ed047a53..cb8ed2f4dc85 100644 --- a/arch/arm/mach-spear6xx/include/mach/spear.h +++ b/arch/arm/mach-spear6xx/include/mach/spear.h @@ -25,7 +25,6 @@ /* ML-1, 2 - Multi Layer CPU Subsystem */ #define SPEAR6XX_ML_CPU_BASE UL(0xF0000000) #define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) -#define SPEAR6XX_CPU_TMR_BASE UL(0xF0000000) /* ICM3 - Basic Subsystem */ #define SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index de194dbb8371..7ae4d5be6cb5 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c @@ -448,7 +448,7 @@ static void __init spear6xx_timer_init(void) clk_put(gpt_clk); clk_put(pclk); - spear_setup_timer(SPEAR6XX_CPU_TMR_BASE, IRQ_CPU_GPT1_1); + spear_setup_of_timer(); } struct sys_timer spear6xx_timer = { diff --git a/arch/arm/plat-spear/time.c b/arch/arm/plat-spear/time.c index a3164d1647fd..9a378987bbb1 100644 --- a/arch/arm/plat-spear/time.c +++ b/arch/arm/plat-spear/time.c @@ -18,6 +18,8 @@ #include #include #include +#include +#include #include #include #include @@ -197,19 +199,32 @@ static void __init spear_clockevent_init(int irq) setup_irq(irq, &spear_timer_irq); } -void __init spear_setup_timer(resource_size_t base, int irq) +const static struct of_device_id timer_of_match[] __initconst = { + { .compatible = "st,spear-timer", }, + { }, +}; + +void __init spear_setup_of_timer(void) { - int ret; + struct device_node *np; + int irq, ret; + + np = of_find_matching_node(NULL, timer_of_match); + if (!np) { + pr_err("%s: No timer passed via DT\n", __func__); + return; + } - if (!request_mem_region(base, SZ_1K, "gpt0")) { - pr_err("%s:cannot get IO addr\n", __func__); + irq = irq_of_parse_and_map(np, 0); + if (!irq) { + pr_err("%s: No irq passed for timer via DT\n", __func__); return; } - gpt_base = ioremap(base, SZ_1K); + gpt_base = of_iomap(np, 0); if (!gpt_base) { - pr_err("%s:ioremap failed for gpt\n", __func__); - goto err_mem; + pr_err("%s: of iomap failed\n", __func__); + return; } gpt_clk = clk_get_sys("gpt0", NULL); @@ -233,6 +248,4 @@ err_clk: clk_put(gpt_clk); err_iomap: iounmap(gpt_base); -err_mem: - release_mem_region(base, SZ_1K); } -- cgit v1.2.2 From 30a0d03776ff2d7ee5ec72d515d8e3cc6d2f0c62 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 1 May 2012 18:09:22 +0530 Subject: SPEAr: Add SMI NOR partition info in dts files This patch adds NOR partitions in all SPEAr boards dts files. Signed-off-by: Viresh Kumar Acked-by: Arnd Bergmann Acked-by: Stefan Roese Signed-off-by: Arnd Bergmann --- arch/arm/boot/dts/spear300-evb.dts | 25 +++++++++++++++++++++++++ arch/arm/boot/dts/spear310-evb.dts | 20 ++++++++++++++++++-- arch/arm/boot/dts/spear320-evb.dts | 25 +++++++++++++++++++++++++ arch/arm/boot/dts/spear600-evb.dts | 29 +++++++++++++++++++++++++++++ 4 files changed, 97 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts index 6a79d69775b5..bf491a332145 100644 --- a/arch/arm/boot/dts/spear300-evb.dts +++ b/arch/arm/boot/dts/spear300-evb.dts @@ -49,6 +49,31 @@ smi: flash@fc000000 { status = "okay"; + clock-rate=<50000000>; + + flash@f8000000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xf8000000 0x800000>; + st,smi-fast-mode; + + partition@0 { + label = "xloader"; + reg = <0x0 0x10000>; + }; + partition@10000 { + label = "u-boot"; + reg = <0x10000 0x40000>; + }; + partition@50000 { + label = "linux"; + reg = <0x50000 0x2c0000>; + }; + partition@310000 { + label = "rootfs"; + reg = <0x310000 0x4f0000>; + }; + }; }; spi0: spi@d0100000 { diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts index c86af33f700e..f7ecb0c1c6e8 100644 --- a/arch/arm/boot/dts/spear310-evb.dts +++ b/arch/arm/boot/dts/spear310-evb.dts @@ -42,11 +42,27 @@ clock-rate=<50000000>; flash@f8000000 { - label = "m25p64"; - reg = <0xf8000000 0x800000>; #address-cells = <1>; #size-cells = <1>; + reg = <0xf8000000 0x800000>; st,smi-fast-mode; + + partition@0 { + label = "xloader"; + reg = <0x0 0x10000>; + }; + partition@10000 { + label = "u-boot"; + reg = <0x10000 0x40000>; + }; + partition@50000 { + label = "linux"; + reg = <0x50000 0x2c0000>; + }; + partition@310000 { + label = "rootfs"; + reg = <0x310000 0x4f0000>; + }; }; }; diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts index d43de712e863..8fb59d805be3 100644 --- a/arch/arm/boot/dts/spear320-evb.dts +++ b/arch/arm/boot/dts/spear320-evb.dts @@ -49,6 +49,31 @@ smi: flash@fc000000 { status = "okay"; + clock-rate=<50000000>; + + flash@f8000000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xf8000000 0x800000>; + st,smi-fast-mode; + + partition@0 { + label = "xloader"; + reg = <0x0 0x10000>; + }; + partition@10000 { + label = "u-boot"; + reg = <0x10000 0x40000>; + }; + partition@50000 { + label = "linux"; + reg = <0x50000 0x2c0000>; + }; + partition@310000 { + label = "rootfs"; + reg = <0x310000 0x4f0000>; + }; + }; }; spi0: spi@d0100000 { diff --git a/arch/arm/boot/dts/spear600-evb.dts b/arch/arm/boot/dts/spear600-evb.dts index 790a7a8a5ccd..1119c22c9a82 100644 --- a/arch/arm/boot/dts/spear600-evb.dts +++ b/arch/arm/boot/dts/spear600-evb.dts @@ -33,6 +33,35 @@ status = "okay"; }; + smi: flash@fc000000 { + status = "okay"; + clock-rate=<50000000>; + + flash@f8000000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xf8000000 0x800000>; + st,smi-fast-mode; + + partition@0 { + label = "xloader"; + reg = <0x0 0x10000>; + }; + partition@10000 { + label = "u-boot"; + reg = <0x10000 0x40000>; + }; + partition@50000 { + label = "linux"; + reg = <0x50000 0x2c0000>; + }; + partition@310000 { + label = "rootfs"; + reg = <0x310000 0x4f0000>; + }; + }; + }; + apb { serial@d0000000 { status = "okay"; -- cgit v1.2.2 From f613e220aebfafb653f7ce264950c15c99e27f2a Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Tue, 1 May 2012 18:16:50 +0530 Subject: SPEAr: Update defconfigs This patch updates following configuration: - Update MTD specific configurations - Enables JFFS2 FS support - Updates 6xx defconfig, with recent changes done by Arnd in 6xx Kconfig Signed-off-by: Viresh Kumar Signed-off-by: Arnd Bergmann Acked-by: Stefan Roese --- arch/arm/configs/spear3xx_defconfig | 4 ++++ arch/arm/configs/spear6xx_defconfig | 5 ++++- 2 files changed, 8 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/configs/spear3xx_defconfig b/arch/arm/configs/spear3xx_defconfig index 7ed42912d69a..865980c5f212 100644 --- a/arch/arm/configs/spear3xx_defconfig +++ b/arch/arm/configs/spear3xx_defconfig @@ -14,6 +14,9 @@ CONFIG_BINFMT_MISC=y CONFIG_NET=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_MTD=y +CONFIG_MTD_OF_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y CONFIG_MTD_NAND=y CONFIG_MTD_NAND_FSMC=y CONFIG_BLK_DEV_RAM=y @@ -73,6 +76,7 @@ CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_IOCHARSET="ascii" CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=m diff --git a/arch/arm/configs/spear6xx_defconfig b/arch/arm/configs/spear6xx_defconfig index cf94bc73a0e0..a2a1265f86b6 100644 --- a/arch/arm/configs/spear6xx_defconfig +++ b/arch/arm/configs/spear6xx_defconfig @@ -8,11 +8,13 @@ CONFIG_MODVERSIONS=y CONFIG_PARTITION_ADVANCED=y CONFIG_PLAT_SPEAR=y CONFIG_ARCH_SPEAR6XX=y -CONFIG_BOARD_SPEAR600_DT=y CONFIG_BINFMT_MISC=y CONFIG_NET=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_MTD=y +CONFIG_MTD_OF_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y CONFIG_MTD_NAND=y CONFIG_MTD_NAND_FSMC=y CONFIG_BLK_DEV_RAM=y @@ -64,6 +66,7 @@ CONFIG_MSDOS_FS=m CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_IOCHARSET="ascii" CONFIG_TMPFS=y +CONFIG_JFFS2_FS=y CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=m -- cgit v1.2.2