From 505d7b193181be029f4f9aea59e6bdbfdd1e9e76 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 28 Jul 2005 20:32:47 +0100 Subject: [ARM SMP] Ensure secondary CPUs have a clean TLB Since ARMv6 CPUs will not flush the TLB on context switches, it is possible that we may end up with some global TLB entries remaining present, eventually upsetting userspace. Explicitly flush the entire TLB on secondary CPUs as they startup, after we have switched to the init_mm page tables. Signed-off-by: Russell King --- arch/arm/kernel/smp.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 295e0a8379cf..b2085735a2ba 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -176,6 +176,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void) cpu_set(cpu, mm->cpu_vm_mask); cpu_switch_mm(mm->pgd, mm); enter_lazy_tlb(mm, current); + local_flush_tlb_all(); cpu_init(); -- cgit v1.2.2