From 1cca2d2b99f3d7eea6aa627b96bffc3b0999eca2 Mon Sep 17 00:00:00 2001 From: Wolfgang Ocker Date: Sat, 3 Apr 2010 16:11:43 +0200 Subject: powerpc/fsl-cpm: Configure clock correctly for SCC Some board setup functions call cpm1_clk_setup() or cmp2_clk_setup() to configure the clock source. If CPM_CLK_RTX has been used for the parameter mode, the clock has been configured only for TX but not for RX. With this patch CPM_CLK_RTX configures the clock for both directions correctly. Signed-off-by: Wolfgang Ocker Acked-by: Scott Wood Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/cpm1.c | 14 +++++++++++--- arch/powerpc/sysdev/cpm2.c | 11 ++++++++--- 2 files changed, 19 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index 4dae3698bf24..8d103ca6d6ab 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c @@ -486,9 +486,6 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode) return -EINVAL; } - if (reg == &mpc8xx_immr->im_cpm.cp_sicr && mode == CPM_CLK_RX) - shift += 3; - for (i = 0; i < ARRAY_SIZE(clk_map); i++) { if (clk_map[i][0] == target && clk_map[i][1] == clock) { bits = clk_map[i][2]; @@ -503,6 +500,17 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode) bits <<= shift; mask <<= shift; + + if (reg == &mpc8xx_immr->im_cpm.cp_sicr) { + if (mode == CPM_CLK_RTX) { + bits |= bits << 3; + mask |= mask << 3; + } else if (mode == CPM_CLK_RX) { + bits <<= 3; + mask <<= 3; + } + } + out_be32(reg, (in_be32(reg) & ~mask) | bits); return 0; diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c index eb5927212fab..8dc1e24f3c23 100644 --- a/arch/powerpc/sysdev/cpm2.c +++ b/arch/powerpc/sysdev/cpm2.c @@ -244,9 +244,6 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode) return -EINVAL; } - if (mode == CPM_CLK_RX) - shift += 3; - for (i = 0; i < ARRAY_SIZE(clk_map); i++) { if (clk_map[i][0] == target && clk_map[i][1] == clock) { bits = clk_map[i][2]; @@ -259,6 +256,14 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode) bits <<= shift; mask <<= shift; + if (mode == CPM_CLK_RTX) { + bits |= bits << 3; + mask |= mask << 3; + } else if (mode == CPM_CLK_RX) { + bits <<= 3; + mask <<= 3; + } + out_be32(reg, (in_be32(reg) & ~mask) | bits); cpm2_unmap(im_cpmux); -- cgit v1.2.2