From 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Sat, 16 Apr 2005 15:20:36 -0700 Subject: Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip! --- arch/v850/kernel/v850e_timer_d.c | 54 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 arch/v850/kernel/v850e_timer_d.c (limited to 'arch/v850/kernel/v850e_timer_d.c') diff --git a/arch/v850/kernel/v850e_timer_d.c b/arch/v850/kernel/v850e_timer_d.c new file mode 100644 index 000000000000..d2a4ece2574c --- /dev/null +++ b/arch/v850/kernel/v850e_timer_d.c @@ -0,0 +1,54 @@ +/* + * include/asm-v850/v850e_timer_d.c -- `Timer D' component often used + * with V850E CPUs + * + * Copyright (C) 2001,02,03 NEC Electronics Corporation + * Copyright (C) 2001,02,03 Miles Bader + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + * + * Written by Miles Bader + */ + +#include + +#include +#include + +/* Start interval timer TIMER (0-3). The timer will issue the + corresponding INTCMD interrupt RATE times per second. + This function does not enable the interrupt. */ +void v850e_timer_d_configure (unsigned timer, unsigned rate) +{ + unsigned divlog2, count; + + /* Calculate params for timer. */ + if (! calc_counter_params ( + V850E_TIMER_D_BASE_FREQ, rate, + V850E_TIMER_D_TMCD_CS_MIN, V850E_TIMER_D_TMCD_CS_MAX, 16, + &divlog2, &count)) + printk (KERN_WARNING + "Cannot find interval timer %d setting suitable" + " for rate of %dHz.\n" + "Using rate of %dHz instead.\n", + timer, rate, + (V850E_TIMER_D_BASE_FREQ >> divlog2) >> 16); + + /* Do the actual hardware timer initialization: */ + + /* Enable timer. */ + V850E_TIMER_D_TMCD(timer) = V850E_TIMER_D_TMCD_CAE; + /* Set clock divider. */ + V850E_TIMER_D_TMCD(timer) + = V850E_TIMER_D_TMCD_CAE + | V850E_TIMER_D_TMCD_CS(divlog2); + /* Set timer compare register. */ + V850E_TIMER_D_CMD(timer) = count; + /* Start counting. */ + V850E_TIMER_D_TMCD(timer) + = V850E_TIMER_D_TMCD_CAE + | V850E_TIMER_D_TMCD_CS(divlog2) + | V850E_TIMER_D_TMCD_CE; +} -- cgit v1.2.2