From bff06d552240ba7f5b49482a4865871d7bc03dc2 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Thu, 22 Sep 2005 20:11:33 -0700 Subject: [SPARC64]: Rewrite bootup sequence. Instead of all of this cpu-specific code to remap the kernel to the correct location, use portable firmware calls to do this instead. What we do now is the following in position independant assembler: chosen_node = prom_finddevice("/chosen"); prom_mmu_ihandle_cache = prom_getint(chosen_node, "mmu"); vaddr = 4MB_ALIGN(current_text_addr()); prom_translate(vaddr, &paddr_high, &paddr_low, &mode); prom_boot_mapping_mode = mode; prom_boot_mapping_phys_high = paddr_high; prom_boot_mapping_phys_low = paddr_low; prom_map(-1, 8 * 1024 * 1024, KERNBASE, paddr_low); and that replaces the massive amount of by-hand TLB probing and programming we used to do here. The new code should also handle properly the case where the kernel is mapped at the correct address already (think: future kexec support). Consequently, the bulk of remap_kernel() dies as does the entirety of arch/sparc64/prom/map.S We try to share some strings in the PROM library with the ones used at bootup, and while we're here mark input strings to oplib.h routines with "const" when appropriate. There are many more simplifications now possible. For one thing, we can consolidate the two copies we now have of a lot of cpu setup code sitting in head.S and trampoline.S. This is a significant step towards CONFIG_DEBUG_PAGEALLOC support. Signed-off-by: David S. Miller --- arch/sparc64/kernel/setup.c | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) (limited to 'arch/sparc64/kernel/setup.c') diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c index ddbed3341a23..0296cb00fc99 100644 --- a/arch/sparc64/kernel/setup.c +++ b/arch/sparc64/kernel/setup.c @@ -536,20 +536,7 @@ void __init setup_arch(char **cmdline_p) } pfn_base = phys_base >> PAGE_SHIFT; - switch (tlb_type) { - default: - case spitfire: - kern_base = spitfire_get_itlb_data(sparc64_highest_locked_tlbent()); - kern_base &= _PAGE_PADDR_SF; - break; - - case cheetah: - case cheetah_plus: - kern_base = cheetah_get_litlb_data(sparc64_highest_locked_tlbent()); - kern_base &= _PAGE_PADDR; - break; - }; - + kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL; kern_size = (unsigned long)&_end - (unsigned long)KERNBASE; if (!root_flags) -- cgit v1.2.2 From 1c9ea5db001142a96fec8fed0f92f26892a1b6ac Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Fri, 23 Sep 2005 11:54:43 -0700 Subject: [SPARC64]: Kill unused variable in setup_arch() 'highest_paddr' is set, but never actually used. Signed-off-by: David S. Miller --- arch/sparc64/kernel/setup.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'arch/sparc64/kernel/setup.c') diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c index 0296cb00fc99..f4345d837284 100644 --- a/arch/sparc64/kernel/setup.c +++ b/arch/sparc64/kernel/setup.c @@ -496,7 +496,6 @@ extern void paging_init(void); void __init setup_arch(char **cmdline_p) { - unsigned long highest_paddr; int i; /* Initialize PROM console and command line. */ @@ -519,11 +518,7 @@ void __init setup_arch(char **cmdline_p) idprom_init(); (void) prom_probe_memory(); - /* In paging_init() we tip off this value to see if we need - * to change init_mm.pgd to point to the real alias mapping. - */ phys_base = 0xffffffffffffffffUL; - highest_paddr = 0UL; for (i = 0; sp_banks[i].num_bytes != 0; i++) { unsigned long top; @@ -531,8 +526,6 @@ void __init setup_arch(char **cmdline_p) phys_base = sp_banks[i].base_addr; top = sp_banks[i].base_addr + sp_banks[i].num_bytes; - if (highest_paddr < top) - highest_paddr = top; } pfn_base = phys_base >> PAGE_SHIFT; -- cgit v1.2.2 From 80dc0d6b44ce0f01df58d8899e46612690ed7d81 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Mon, 26 Sep 2005 00:32:17 -0700 Subject: [SPARC64]: Probe D/I/E-cache config and use. At boot time, determine the D-cache, I-cache and E-cache size and line-size. Use them in cache flushes when appropriate. This change was motivated by discovering that the D-cache on UltraSparc-IIIi and later are 64K not 32K, and the flushes done by the Cheetah error handlers were assuming a 32K size. There are still some pieces of code that are hard coding things and will need to be fixed up at some point. While we're here, fix the D-cache and I-cache parity error handlers to run with interrupts disabled, and when the trap occurs at trap level > 1 log the event via a counter displayed in /proc/cpuinfo. Signed-off-by: David S. Miller --- arch/sparc64/kernel/setup.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'arch/sparc64/kernel/setup.c') diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c index f4345d837284..8e8baf2354df 100644 --- a/arch/sparc64/kernel/setup.c +++ b/arch/sparc64/kernel/setup.c @@ -605,6 +605,9 @@ extern void smp_info(struct seq_file *); extern void smp_bogo(struct seq_file *); extern void mmu_info(struct seq_file *); +unsigned int dcache_parity_tl1_occurred; +unsigned int icache_parity_tl1_occurred; + static int show_cpuinfo(struct seq_file *m, void *__unused) { seq_printf(m, @@ -615,6 +618,8 @@ static int show_cpuinfo(struct seq_file *m, void *__unused) "type\t\t: sun4u\n" "ncpus probed\t: %ld\n" "ncpus active\t: %ld\n" + "D$ parity tl1\t: %u\n" + "I$ parity tl1\t: %u\n" #ifndef CONFIG_SMP "Cpu0Bogo\t: %lu.%02lu\n" "Cpu0ClkTck\t: %016lx\n" @@ -627,7 +632,9 @@ static int show_cpuinfo(struct seq_file *m, void *__unused) (prom_prev >> 8) & 0xff, prom_prev & 0xff, (long)num_possible_cpus(), - (long)num_online_cpus() + (long)num_online_cpus(), + dcache_parity_tl1_occurred, + icache_parity_tl1_occurred #ifndef CONFIG_SMP , cpu_data(0).udelay_val/(500000/HZ), (cpu_data(0).udelay_val/(5000/HZ)) % 100, -- cgit v1.2.2