From 35a96c739fd7624b8edff990a74b86b5a85342da Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 15 Nov 2010 18:18:32 +0900 Subject: sh: clkfwk: Kill off now unused algo_id in set_rate op. Now that clk_set_rate_ex() is gone, there is also no way to get at rate setting algo id, which is now also completely unused. Kill it off before new clock ops start using it. Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4/clock-sh4-202.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/sh/kernel/cpu') diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c index 4eabc68cd753..b601fa3978d1 100644 --- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c +++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c @@ -110,7 +110,7 @@ static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate) return 0; } -static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id) +static int shoc_clk_set_rate(struct clk *clk, unsigned long rate) { unsigned long frqcr3; unsigned int tmp; -- cgit v1.2.2 From 4bd5d259e451d35380de2fcd1a3510ae22d000a3 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Fri, 26 Nov 2010 09:40:22 +0000 Subject: sh: Add div6_reparent_clks to clock framework for FSI Current clk_ops doesn't support .init which is used to select external clock on ecovec without CONFIG_SH_CLK_CPG_LEGACY. To solve this problem, this patch add div6_reparent_clks to clock-sh7724. This patch solve compile error too. Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 44 ++++++++++++++++++++++++++++++---- 1 file changed, 39 insertions(+), 5 deletions(-) (limited to 'arch/sh/kernel/cpu') diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c index 0fe2e9329cb2..271c0b325a9a 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c @@ -111,12 +111,21 @@ static struct clk div3_clk = { .parent = &pll_clk, }; +/* External input clock (pin name: FSIMCKA/FSIMCKB ) */ +struct clk sh7724_fsimcka_clk = { +}; + +struct clk sh7724_fsimckb_clk = { +}; + static struct clk *main_clks[] = { &r_clk, &extal_clk, &fll_clk, &pll_clk, &div3_clk, + &sh7724_fsimcka_clk, + &sh7724_fsimckb_clk, }; static void div4_kick(struct clk *clk) @@ -154,16 +163,38 @@ struct clk div4_clks[DIV4_NR] = { [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), }; -enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR }; +enum { DIV6_V, DIV6_I, DIV6_S, DIV6_NR }; static struct clk div6_clks[DIV6_NR] = { [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0), - [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0), - [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0), [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0), [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT), }; +enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR }; + +/* Indices are important - they are the actual src selecting values */ +static struct clk *fclkacr_parent[] = { + [0] = &div3_clk, + [1] = NULL, + [2] = &sh7724_fsimcka_clk, + [3] = NULL, +}; + +static struct clk *fclkbcr_parent[] = { + [0] = &div3_clk, + [1] = NULL, + [2] = &sh7724_fsimckb_clk, + [3] = NULL, +}; + +static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = { + [DIV6_FA] = SH_CLK_DIV6_EXT(&div3_clk, FCLKACR, 0, + fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2), + [DIV6_FB] = SH_CLK_DIV6_EXT(&div3_clk, FCLKBCR, 0, + fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2), +}; + static struct clk mstp_clks[HWBLK_NR] = { SH_HWBLK_CLK(HWBLK_TLB, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), SH_HWBLK_CLK(HWBLK_IC, &div4_clks[DIV4_I], CLK_ENABLE_ON_INIT), @@ -240,8 +271,8 @@ static struct clk_lookup lookups[] = { /* DIV6 clocks */ CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]), - CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]), - CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]), + CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FA]), + CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FB]), CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]), CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]), @@ -375,6 +406,9 @@ int __init arch_clk_init(void) if (!ret) ret = sh_clk_div6_register(div6_clks, DIV6_NR); + if (!ret) + ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR); + if (!ret) ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); -- cgit v1.2.2