From 6865f0ea6ad91fec3ae7831c49d48b5a7db4b428 Mon Sep 17 00:00:00 2001 From: Ryusuke Sakato Date: Tue, 1 May 2007 09:45:29 +0900 Subject: sh: Solution Engine 7722 board support. This adds more full-featured support for the SH7722 Solution Engine. Previously this was using the generic board, and lacked most of the peripheral support. Signed-off-by: Ryusuke Sakato Signed-off-by: Paul Mundt --- arch/sh/boards/se/7722/Makefile | 10 +++ arch/sh/boards/se/7722/irq.c | 101 +++++++++++++++++++++++++++ arch/sh/boards/se/7722/setup.c | 148 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 259 insertions(+) create mode 100644 arch/sh/boards/se/7722/Makefile create mode 100644 arch/sh/boards/se/7722/irq.c create mode 100644 arch/sh/boards/se/7722/setup.c (limited to 'arch/sh/boards/se') diff --git a/arch/sh/boards/se/7722/Makefile b/arch/sh/boards/se/7722/Makefile new file mode 100644 index 000000000000..8694373389e5 --- /dev/null +++ b/arch/sh/boards/se/7722/Makefile @@ -0,0 +1,10 @@ +# +# Makefile for the HITACHI UL SolutionEngine 7722 specific parts of the kernel +# +# This file is subject to the terms and conditions of the GNU General Public +# License. See the file "COPYING" in the main directory of this archive +# for more details. +# +# + +obj-y := setup.o irq.o diff --git a/arch/sh/boards/se/7722/irq.c b/arch/sh/boards/se/7722/irq.c new file mode 100644 index 000000000000..099e5deb77f8 --- /dev/null +++ b/arch/sh/boards/se/7722/irq.c @@ -0,0 +1,101 @@ +/* + * linux/arch/sh/boards/se/7722/irq.c + * + * Copyright (C) 2007 Nobuhiro Iwamatsu + * + * Hitachi UL SolutionEngine 7722 Support. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include +#include +#include +#include +#include +#include + +#define INTC_INTMSK0 0xFFD00044 +#define INTC_INTMSKCLR0 0xFFD00064 + +static void disable_se7722_irq(unsigned int irq) +{ + struct ipr_data *p = get_irq_chip_data(irq); + ctrl_outw( ctrl_inw( p->addr ) | p->priority , p->addr ); +} + +static void enable_se7722_irq(unsigned int irq) +{ + struct ipr_data *p = get_irq_chip_data(irq); + ctrl_outw( ctrl_inw( p->addr ) & ~p->priority , p->addr ); +} + +static struct irq_chip se7722_irq_chip __read_mostly = { + .name = "SE7722", + .mask = disable_se7722_irq, + .unmask = enable_se7722_irq, + .mask_ack = disable_se7722_irq, +}; + +static struct ipr_data ipr_irq_table[] = { + /* irq ,idx,sft, priority , addr */ + { MRSHPC_IRQ0 , 0 , 0 , MRSHPC_BIT0 , IRQ01_MASK } , + { MRSHPC_IRQ1 , 0 , 0 , MRSHPC_BIT1 , IRQ01_MASK } , + { MRSHPC_IRQ2 , 0 , 0 , MRSHPC_BIT2 , IRQ01_MASK } , + { MRSHPC_IRQ3 , 0 , 0 , MRSHPC_BIT3 , IRQ01_MASK } , + { SMC_IRQ , 0 , 0 , SMC_BIT , IRQ01_MASK } , + { EXT_IRQ , 0 , 0 , EXT_BIT , IRQ01_MASK } , +}; + +int se7722_irq_demux(int irq) +{ + + if ((irq == IRQ0_IRQ)||(irq == IRQ1_IRQ)) { + volatile unsigned short intv = + *(volatile unsigned short *)IRQ01_STS; + if (irq == IRQ0_IRQ){ + if(intv & SMC_BIT ) { + return SMC_IRQ; + } else if(intv & USB_BIT) { + return USB_IRQ; + } else { + printk("intv =%04x\n", intv); + return SMC_IRQ; + } + } else if(irq == IRQ1_IRQ){ + if(intv & MRSHPC_BIT0) { + return MRSHPC_IRQ0; + } else if(intv & MRSHPC_BIT1) { + return MRSHPC_IRQ1; + } else if(intv & MRSHPC_BIT2) { + return MRSHPC_IRQ2; + } else if(intv & MRSHPC_BIT3) { + return MRSHPC_IRQ3; + } else { + printk("BIT_EXTENTION =%04x\n", intv); + return EXT_IRQ; + } + } + } + return irq; + +} +/* + * Initialize IRQ setting + */ +void __init init_se7722_IRQ(void) +{ + int i = 0; + ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ + ctrl_outl((3 << ((7 - 0) * 4))|(3 << ((7 - 1) * 4)), INTC_INTPRI0); /* irq0 pri=3,irq1,pri=3 */ + ctrl_outw((2 << ((7 - 0) * 2))|(2 << ((7 - 1) * 2)), INTC_ICR1); /* irq0,1 low-level irq */ + + for (i = 0; i < ARRAY_SIZE(ipr_irq_table); i++) { + disable_irq_nosync(ipr_irq_table[i].irq); + set_irq_chip_and_handler_name( ipr_irq_table[i].irq, &se7722_irq_chip, + handle_level_irq, "level"); + set_irq_chip_data( ipr_irq_table[i].irq, &ipr_irq_table[i] ); + disable_se7722_irq(ipr_irq_table[i].irq); + } +} diff --git a/arch/sh/boards/se/7722/setup.c b/arch/sh/boards/se/7722/setup.c new file mode 100644 index 000000000000..636ca6c987e0 --- /dev/null +++ b/arch/sh/boards/se/7722/setup.c @@ -0,0 +1,148 @@ +/* + * linux/arch/sh/boards/se/7722/setup.c + * + * Copyright (C) 2007 Nobuhiro Iwamatsu + * + * Hitachi UL SolutionEngine 7722 Support. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ +#include +#include +#include +#include +#include +#include + +/* Heartbeat */ +static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 }; + +static struct resource heartbeat_resources[] = { + [0] = { + .start = PA_LED, + .end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device heartbeat_device = { + .name = "heartbeat", + .id = -1, + .dev = { + .platform_data = heartbeat_bit_pos, + }, + .num_resources = ARRAY_SIZE(heartbeat_resources), + .resource = heartbeat_resources, +}; + +/* SMC91x */ +static struct resource smc91x_eth_resources[] = { + [0] = { + .name = "smc91x-regs" , + .start = PA_LAN + 0x300, + .end = PA_LAN + 0x300 + 0x10 , + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = SMC_IRQ, + .end = SMC_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device smc91x_eth_device = { + .name = "smc91x", + .id = 0, + .dev = { + .dma_mask = NULL, /* don't use dma */ + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(smc91x_eth_resources), + .resource = smc91x_eth_resources, +}; + +static struct resource cf_ide_resources[] = { + [0] = { + .start = PA_MRSHPC_IO + 0x1f0, + .end = PA_MRSHPC_IO + 0x1f0 + 8 , + .flags = IORESOURCE_IO, + }, + [1] = { + .start = PA_MRSHPC_IO + 0x1f0 + 0x206, + .end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8, + .flags = IORESOURCE_IO, + }, + [2] = { + .start = MRSHPC_IRQ0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device cf_ide_device = { + .name = "pata_platform", + .id = -1, + .num_resources = ARRAY_SIZE(cf_ide_resources), + .resource = cf_ide_resources, +}; + +static struct platform_device *se7722_devices[] __initdata = { + &heartbeat_device, + &smc91x_eth_device, + &cf_ide_device, +}; + +static int __init se7722_devices_setup(void) +{ + return platform_add_devices(se7722_devices, + ARRAY_SIZE(se7722_devices)); +} +device_initcall(se7722_devices_setup); + +static void __init se7722_setup(char **cmdline_p) +{ + ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ + + ctrl_outl(0x00051001, MSTPCR0); + ctrl_outl(0x00000000, MSTPCR1); + /* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC */ + ctrl_outl(0xffffbfC0, MSTPCR2); + + ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ + ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */ + + /* LCDC I/O */ + ctrl_outw(0x0020, PORT_PSELD); + + /* SIOF1*/ + ctrl_outw(0x0003, PORT_PSELB); + ctrl_outw(0xe000, PORT_PSELC); + ctrl_outw(0x0000, PORT_PKCR); + + /* LCDC */ + ctrl_outw(0x4020, PORT_PHCR); + ctrl_outw(0x0000, PORT_PLCR); + ctrl_outw(0x0000, PORT_PMCR); + ctrl_outw(0x0002, PORT_PRCR); + ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */ + + /* KEYSC */ + ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */ + ctrl_outw(0x0000, PORT_PYCR); + ctrl_outw(0x0000, PORT_PZCR); +} + +/* + * The Machine Vector + */ +struct sh_machine_vector mv_se7722 __initmv = { + .mv_name = "Solution Engine 7722" , + .mv_setup = se7722_setup , + .mv_nr_irqs = 109 , + .mv_init_irq = init_se7722_IRQ, + .mv_irq_demux = se7722_irq_demux, + +}; +ALIAS_MV(se7722) -- cgit v1.2.2