From 36c50f729b77144cae8d43457fefca66a4eeff6a Mon Sep 17 00:00:00 2001 From: Jochen Friedrich Date: Tue, 28 Aug 2007 13:20:48 +0200 Subject: [PPC] 8xx: Fix r3 trashing due to 8MB TLB page instantiation Instantiation of 8MB pages on the TLB cache for the kernel static mapping trashes r3 register on !CONFIG_8xx_CPU6 configurations. This ensures r3 gets saved and restored. This has been posted to linuxppc-embedded by Marcelo Tosatti , but only an incomplete version of the patch has been applied in c51e078f82096a7d35ac8ec2416272e843a0e1c4. This patch adds the rest of the fix. Signed-off-by: Jochen Friedrich Signed-off-by: Kumar Gala --- arch/ppc/kernel/head_8xx.S | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/ppc') diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S index 944c35c24278..eb8d26f87362 100644 --- a/arch/ppc/kernel/head_8xx.S +++ b/arch/ppc/kernel/head_8xx.S @@ -495,9 +495,7 @@ LoadLargeDTLB: lwz r11, 4(r0) lwz r12, 16(r0) -#ifdef CONFIG_8xx_CPU6 lwz r3, 8(r0) -#endif rfi /* This is the data TLB error on the MPC8xx. This could be due to -- cgit v1.2.2