From e2a02ba6676cdc5ebec503b558838c08c7083c14 Mon Sep 17 00:00:00 2001 From: Michael Neuling Date: Fri, 6 Feb 2009 11:10:27 +1100 Subject: powerpc/83xx: Build breakage for CONFIG_PM but no CONFIG_SUSPEND I noticed this doing some randconfig testing (.config below). I have CONFIG_PM but no CONFIG_SUSPEND. Bug is against mainline. arch/powerpc/sysdev/built-in.o: In function `ipic_suspend': ipic.c:(.text+0x6b34): undefined reference to `fsl_deep_sleep' make[1]: *** [.tmp_vmlinux1] Error 1 make: *** [sub-make] Error 2 Looks like #ifdef CONFIG_PM in arch/powerpc/sysdev/ipic.c should be CONFIG_SUSPEND. d49747bdfb2ddebea24d1580da55b79d093d48a9 introduced this. Fix build when we have CONFIG_PM but no CONFIG_SUSPEND. Signed-off-by: Michael Neuling Acked-by: Scott Wood Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/ipic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 88a983ece5c9..9a89cd3e80a2 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c @@ -890,7 +890,7 @@ unsigned int ipic_get_irq(void) return irq_linear_revmap(primary_ipic->irqhost, irq); } -#ifdef CONFIG_PM +#ifdef CONFIG_SUSPEND static struct { u32 sicfr; u32 siprr[2]; -- cgit v1.2.2 From 7f3ea17f316577e31db868f720ac575c74d20163 Mon Sep 17 00:00:00 2001 From: paulfax Date: Tue, 27 Jan 2009 02:44:07 -0600 Subject: powerpc/cpm2: Fix set interrupt type This is a simple change to correct problems when using set_irq_type on platforms using CPM2. This code corrects the problem on most platform but may have issues on 8272 derived platforms for some interrupts. On 8272 PC2 & 3 are missing and PC 23 & 29 are added, which this patch does not address. Signed-off-by: Paul Bilke Reviewed-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/cpm2_pic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index b16ca3ed65d2..78f1f7cca0a0 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c @@ -165,7 +165,7 @@ static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type) edibit = (14 - (src - CPM2_IRQ_EXT1)); else if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0) - edibit = (31 - (src - CPM2_IRQ_PORTC15)); + edibit = (31 - (CPM2_IRQ_PORTC0 - src)); else return (flow_type & IRQ_TYPE_LEVEL_LOW) ? 0 : -EINVAL; -- cgit v1.2.2 From 1ac00cc21337b0b667493d9af79d88537de90aa3 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Sun, 1 Feb 2009 14:24:18 +0000 Subject: powerpc/44x: Fix address decoding setup of PCI 2.x cells The PCI 2.x cells used on some 44x SoCs only let us configure the decode for the low 32-bit of the incoming PLB addresses. The top 4 bits (this is a 36-bit bus) are hard wired to different values depending on the specific SoC in use. Our code used to work "by accident" until I added support for the ISA memory holes and while at it added more validity checking of the addresses. This patch should bring it back to working condition. It still relies on the device-tree being correct but that's somewhat a pre-requisite for anything to work anyway. Signed-off-by: Benjamin Herrenschmidt Acked-by: Geert Uytterhoeven Acked-by: Josh Boyer --- arch/powerpc/sysdev/ppc4xx_pci.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 77fae5f64f2e..5558d932b4d5 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -204,6 +204,23 @@ static int __init ppc4xx_setup_one_pci_PMM(struct pci_controller *hose, { u32 ma, pcila, pciha; + /* Hack warning ! The "old" PCI 2.x cell only let us configure the low + * 32-bit of incoming PLB addresses. The top 4 bits of the 36-bit + * address are actually hard wired to a value that appears to depend + * on the specific SoC. For example, it's 0 on 440EP and 1 on 440EPx. + * + * The trick here is we just crop those top bits and ignore them when + * programming the chip. That means the device-tree has to be right + * for the specific part used (we don't print a warning if it's wrong + * but on the other hand, you'll crash quickly enough), but at least + * this code should work whatever the hard coded value is + */ + plb_addr &= 0xffffffffull; + + /* Note: Due to the above hack, the test below doesn't actually test + * if you address is above 4G, but it tests that address and + * (address + size) are both contained in the same 4G + */ if ((plb_addr + size) > 0xffffffffull || !is_power_of_2(size) || size < 0x1000 || (plb_addr & (size - 1)) != 0) { printk(KERN_WARNING "%s: Resource out of range\n", -- cgit v1.2.2