From 995ada8d5e6b3d5a32ca3e544a564d0623c4f3fa Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 6 Jun 2008 00:22:29 +1000 Subject: powerpc/4xx: PCIe driver now detects if a port is disabled via the dev-tree This patch add a check to the PPC4xx PCIe driver to detect if the port is disabled via the device-tree. This is needed for the AMCC Canyonlands board which has an option to either select 2 PCIe ports or 1 PCIe port and one SATA port. The SATA port and the 1st PCIe port pins are multiplexed so we can't start both drivers. Signed-off-by: Stefan Roese Acked-by: Benjamin Herrenschmidt Signed-off-by: Josh Boyer --- arch/powerpc/sysdev/ppc4xx_pci.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index b4a54c52e880..76886cf0e6dc 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -1634,6 +1634,15 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np) } port = &ppc4xx_pciex_ports[portno]; port->index = portno; + + /* + * Check if device is enabled + */ + if (!of_device_is_available(np)) { + printk(KERN_INFO "PCIE%d: Port disabled via device-tree\n", port->index); + return; + } + port->node = of_node_get(np); pval = of_get_property(np, "sdr-base", NULL); if (pval == NULL) { -- cgit v1.2.2 From 5ce4b59653b2c2053cd9a011918ac1e4747f24cc Mon Sep 17 00:00:00 2001 From: Josh Boyer Date: Tue, 17 Jun 2008 19:01:38 -0400 Subject: powerpc/4xx: Workaround for PPC440EPx/GRx PCI_28 Errata The 440EPx/GRx chips don't support PCI MRM commands. Drivers determine this by looking for a zero value in the PCI cache line size register. However, some drivers write to this register upon initialization. This can cause MRMs to be used on these chips, which may cause deadlocks on PLB4. The workaround implemented here introduces a new indirect_type flag, called PPC_INDIRECT_TYPE_BROKEN_MRM. This is set in the pci_controller structure in the pci fixup function for 4xx PCI bridges by determining if the bridge is compatible with 440EPx/GRx. The flag is checked in the indirect_write_config function, and forces any writes to the PCI_CACHE_LINE_SIZE register to be zero, which will disable MRMs for these chips. A similar workaround has been tested by AMCC on various PCI cards, such as the Silicon Image ATA card and Intel E1000 GIGE card. Hangs were seen with the Silicon Image card, and MRMs were seen on the bus with a PCI analyzer. With the workaround in place, the card functioned properly and only Memory Reads were seen on the bus with the analyzer. Acked-by: Stefan Roese Signed-off-by: Josh Boyer --- arch/powerpc/sysdev/indirect_pci.c | 6 ++++++ arch/powerpc/sysdev/ppc4xx_pci.c | 5 +++++ 2 files changed, 11 insertions(+) (limited to 'arch/powerpc/sysdev') diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index cfbd2aae93e8..7fd49c97501a 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c @@ -123,6 +123,12 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, (bus->number == hose->first_busno)) val &= 0xffffff00; + /* Workaround for PCI_28 Errata in 440EPx/GRx */ + if ((hose->indirect_type & PPC_INDIRECT_TYPE_BROKEN_MRM) && + offset == PCI_CACHE_LINE_SIZE) { + val = 0; + } + /* * Note: the caller has already checked that offset is * suitably aligned and that len is 1, 2 or 4. diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 76886cf0e6dc..fb368dfde5d4 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -75,6 +75,11 @@ static void fixup_ppc4xx_pci_bridge(struct pci_dev *dev) !of_device_is_compatible(hose->dn, "ibm,plb-pci")) return; + if (of_device_is_compatible(hose->dn, "ibm,plb440epx-pci") || + of_device_is_compatible(hose->dn, "ibm,plb440grx-pci")) { + hose->indirect_type |= PPC_INDIRECT_TYPE_BROKEN_MRM; + } + /* Hide the PCI host BARs from the kernel as their content doesn't * fit well in the resource management */ -- cgit v1.2.2