From 619740384cebe2601a8d307654a22d9ed85f2fcb Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 21 Dec 2007 15:39:26 +1100 Subject: [POWERPC] 4xx: EP405 boards support for arch/powerpc Brings EP405 support to arch/powerpc. The IRQ routing for the CPLD comes from a device-tree property, PCI is working to the point where I can see the video card, USB device, and south bridge. This should work with both EP405 and EP405PC. I've not totally figured out how IRQs are wired on this hardware though, thus at this stage, expect only USB interrupts working, pretty much the same as what arch/ppc did. Also, the flash, nvram, rtc and temp control still have to be wired. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Josh Boyer --- arch/powerpc/boot/ep405.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 arch/powerpc/boot/ep405.c (limited to 'arch/powerpc/boot/ep405.c') diff --git a/arch/powerpc/boot/ep405.c b/arch/powerpc/boot/ep405.c new file mode 100644 index 000000000000..2d08a862cbea --- /dev/null +++ b/arch/powerpc/boot/ep405.c @@ -0,0 +1,74 @@ +/* + * Embedded Planet EP405 with PlanetCore firmware + * + * (c) Benjamin Herrenschmidt , IBM Corp,\ + * + * Based on ep88xc.c by + * + * Scott Wood + * + * Copyright (c) 2007 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ops.h" +#include "stdio.h" +#include "planetcore.h" +#include "dcr.h" +#include "4xx.h" +#include "io.h" + +static char *table; +static u64 mem_size; + +static void platform_fixups(void) +{ + u64 val; + void *nvrtc; + + dt_fixup_memory(0, mem_size); + planetcore_set_mac_addrs(table); + + if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) { + printf("No PlanetCore crystal frequency key.\r\n"); + return; + } + ibm405gp_fixup_clocks(val, 0xa8c000); + ibm4xx_quiesce_eth((u32 *)0xef600800, NULL); + ibm4xx_fixup_ebc_ranges("/plb/ebc"); + + if (!planetcore_get_decimal(table, PLANETCORE_KEY_KB_NVRAM, &val)) { + printf("No PlanetCore NVRAM size key.\r\n"); + return; + } + nvrtc = finddevice("/plb/ebc/nvrtc@4,200000"); + if (nvrtc != NULL) { + u32 reg[3] = { 4, 0x200000, 0}; + getprop(nvrtc, "reg", reg, 3); + reg[2] = (val << 10) & 0xffffffff; + setprop(nvrtc, "reg", reg, 3); + } +} + +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) +{ + table = (char *)r3; + planetcore_prepare_table(table); + + if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size)) + return; + + mem_size *= 1024 * 1024; + simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64); + + fdt_init(_dtb_start); + + planetcore_set_stdout_path(table); + + serial_console_init(); + platform_ops.fixups = platform_fixups; +} -- cgit v1.2.2