From 08aecfb9eaf019f07384175101c970ede271c17a Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Tue, 20 Jun 2006 23:26:30 +0900 Subject: [MIPS] Remove set_c0_status(ST0_IM) from wrppmc's irq.c. mips_cpu_irq_init() does clear_c0_status(ST0_IM) first, so set_c0_status(ST0_IM) isn't necessary. Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- arch/mips/gt64120/wrppmc/irq.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch/mips') diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c index 26cf360f1694..8d75a43ce877 100644 --- a/arch/mips/gt64120/wrppmc/irq.c +++ b/arch/mips/gt64120/wrppmc/irq.c @@ -62,9 +62,6 @@ void gt64120_init_pic(void) void __init arch_init_irq(void) { - /* enable all CPU interrupt bits. */ - set_c0_status(ST0_IM); /* IE bit is still 0 */ - /* IRQ 0 - 7 are for MIPS common irq_cpu controller */ mips_cpu_irq_init(0); -- cgit v1.2.2