From d599def5cd81439e7da04dc6754b257043f5e584 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Tue, 3 Oct 2006 12:42:02 +0100 Subject: [MIPS] SB1250: Interrupt handler fixes Mask cp0.status against cp0.cause. Additionally, spurious interrupts are not recorded. Signed-off-by: Maciej W. Rozycki Signed-off-by: Ralf Baechle --- arch/mips/sibyte/sb1250/irq.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/mips/sibyte') diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index a451b4c7732d..f9bd9f074517 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -442,7 +442,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs) * blasting the high 32 bits. */ - pending = read_c0_cause(); + pending = read_c0_cause() & read_c0_status(); #ifdef CONFIG_SIBYTE_SB1250_PROF if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ @@ -476,5 +476,8 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs) R_IMR_INTERRUPT_STATUS_BASE))); if (mask) do_IRQ(fls64(mask) - 1, regs); - } + else + spurious_interrupt(regs); + } else + spurious_interrupt(regs); } -- cgit v1.2.2