From 28d6f93d201d20ce47a9e8414655569a78f0353c Mon Sep 17 00:00:00 2001
From: Markos Chandras <markos.chandras@imgtec.com>
Date: Thu, 8 Jan 2015 11:55:20 +0000
Subject: MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions

MIPS R6 uses the <R6 sdc2 opcode for the new BNEZC and JIALC instructions

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
---
 arch/mips/kernel/branch.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

(limited to 'arch/mips/kernel/branch.c')

diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index c61a41df3363..249c61c9acf1 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -807,6 +807,16 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
 		/* Compact branch: BEQZC || JIC */
 		regs->cp0_epc += 8;
 		break;
+	case bnezcjialc_op:
+		if (!cpu_has_mips_r6) {
+			ret = -SIGILL;
+			break;
+		}
+		/* Compact branch: BNEZC || JIALC */
+		if (insn.i_format.rs)
+			regs->regs[31] = epc + 4;
+		regs->cp0_epc += 8;
+		break;
 #endif
 	case cbcond0_op:
 	case cbcond1_op:
-- 
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