From 13851966da54be8e37863aa93ee2c8f3d3a3186a Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 23 Mar 2010 08:09:32 +0100 Subject: microblaze: Add .type and .size to ASM functions Cachegrind analysis need this fix to be able to log asm functions. Signed-off-by: Michal Simek --- arch/microblaze/kernel/misc.S | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/microblaze/kernel/misc.S') diff --git a/arch/microblaze/kernel/misc.S b/arch/microblaze/kernel/misc.S index df16c6287a8e..18681eed5ec7 100644 --- a/arch/microblaze/kernel/misc.S +++ b/arch/microblaze/kernel/misc.S @@ -26,6 +26,7 @@ * We avoid flushing the pinned 0, 1 and possibly 2 entries. */ .globl _tlbia; +.type _tlbia, @function .align 4; _tlbia: addik r12, r0, 63 /* flush all entries (63 - 3) */ @@ -41,11 +42,13 @@ _tlbia_1: /* sync */ rtsd r15, 8 nop + .size _tlbia, . - _tlbia /* * Flush MMU TLB for a particular address (in r5) */ .globl _tlbie; +.type _tlbie, @function .align 4; _tlbie: mts rtlbsx, r5 /* look up the address in TLB */ @@ -59,10 +62,13 @@ _tlbie_1: rtsd r15, 8 nop + .size _tlbie, . - _tlbie + /* * Allocate TLB entry for early console */ .globl early_console_reg_tlb_alloc; +.type early_console_reg_tlb_alloc, @function .align 4; early_console_reg_tlb_alloc: /* @@ -86,6 +92,8 @@ early_console_reg_tlb_alloc: rtsd r15, 8 nop + .size early_console_reg_tlb_alloc, . - early_console_reg_tlb_alloc + /* * Copy a whole page (4096 bytes). */ @@ -104,6 +112,7 @@ early_console_reg_tlb_alloc: #define DCACHE_LINE_BYTES (4 * 4) .globl copy_page; +.type copy_page, @function .align 4; copy_page: ori r11, r0, (PAGE_SIZE/DCACHE_LINE_BYTES) - 1 @@ -118,3 +127,5 @@ _copy_page_loop: addik r11, r11, -1 rtsd r15, 8 nop + + .size copy_page, . - copy_page -- cgit v1.2.2 From 0691c97d74cbdfd49333ef01939ecaef158ebe1b Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 24 Mar 2010 10:09:17 +0100 Subject: microblaze: Use MICROBLAZE_TLB_SIZE in asm code TLB size was hardcoded in asm code. This patch brings ability to change TLB size only in one place. (mmu.h). Signed-off-by: Michal Simek --- arch/microblaze/kernel/misc.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/microblaze/kernel/misc.S') diff --git a/arch/microblaze/kernel/misc.S b/arch/microblaze/kernel/misc.S index 18681eed5ec7..7cf86498326c 100644 --- a/arch/microblaze/kernel/misc.S +++ b/arch/microblaze/kernel/misc.S @@ -29,7 +29,7 @@ .type _tlbia, @function .align 4; _tlbia: - addik r12, r0, 63 /* flush all entries (63 - 3) */ + addik r12, r0, MICROBLAZE_TLB_SIZE - 1 /* flush all entries (63 - 3) */ /* isync */ _tlbia_1: mts rtlbx, r12 @@ -75,7 +75,7 @@ early_console_reg_tlb_alloc: * Load a TLB entry for the UART, so that microblaze_progress() can use * the UARTs nice and early. We use a 4k real==virtual mapping. */ - ori r4, r0, 63 + ori r4, r0, MICROBLAZE_TLB_SIZE - 1 mts rtlbx, r4 /* TLB slot 2 */ or r4,r5,r0 -- cgit v1.2.2