From 63f49dce39e5d6a19e5f1f9004eb48e73ba259e8 Mon Sep 17 00:00:00 2001 From: Scott Jiang Date: Fri, 10 Aug 2012 18:06:09 -0400 Subject: blackfin: add platform device for ad1836 machine driver Signed-off-by: Mark Brown --- arch/blackfin/mach-bf527/boards/ezkit.c | 20 ++++++++++++++++++++ arch/blackfin/mach-bf533/boards/stamp.c | 20 ++++++++++++++++++++ arch/blackfin/mach-bf537/boards/stamp.c | 20 ++++++++++++++++++++ arch/blackfin/mach-bf561/boards/ezkit.c | 20 ++++++++++++++++++++ arch/blackfin/mach-bf609/boards/ezkit.c | 19 +++++++++++++++++++ 5 files changed, 99 insertions(+) (limited to 'arch/blackfin') diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c index fc179ca07799..29f16e5c37b9 100644 --- a/arch/blackfin/mach-bf527/boards/ezkit.c +++ b/arch/blackfin/mach-bf527/boards/ezkit.c @@ -587,6 +587,21 @@ static struct platform_device bfin_tdm = { }; #endif +#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \ + || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) +static const char * const ad1836_link[] = { + "bfin-tdm.0", + "spi0.4", +}; +static struct platform_device bfin_ad1836_machine = { + .name = "bfin-snd-ad1836", + .id = -1, + .dev = { + .platform_data = (void *)ad1836_link, + }, +}; +#endif + static struct spi_board_info bfin_spi_board_info[] __initdata = { #if defined(CONFIG_MTD_M25P80) \ || defined(CONFIG_MTD_M25P80_MODULE) @@ -1269,6 +1284,11 @@ static struct platform_device *stamp_devices[] __initdata = { #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) &bfin_tdm, #endif + +#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \ + defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) + &bfin_ad1836_machine, +#endif }; static int __init ezkit_init(void) diff --git a/arch/blackfin/mach-bf533/boards/stamp.c b/arch/blackfin/mach-bf533/boards/stamp.c index ce88a7165b62..6fca8698bf3b 100644 --- a/arch/blackfin/mach-bf533/boards/stamp.c +++ b/arch/blackfin/mach-bf533/boards/stamp.c @@ -617,6 +617,21 @@ static struct platform_device bfin_ac97_pcm = { }; #endif +#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \ + || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) +static const char * const ad1836_link[] = { + "bfin-tdm.0", + "spi0.4", +}; +static struct platform_device bfin_ad1836_machine = { + .name = "bfin-snd-ad1836", + .id = -1, + .dev = { + .platform_data = (void *)ad1836_link, + }, +}; +#endif + #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \ defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE) static const unsigned ad73311_gpio[] = { @@ -754,6 +769,11 @@ static struct platform_device *stamp_devices[] __initdata = { &bfin_ac97_pcm, #endif +#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \ + defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) + &bfin_ad1836_machine, +#endif + #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \ defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE) &bfin_ad73311_machine, diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index 5ed654ae66e1..307bd7e62f43 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c @@ -2641,6 +2641,21 @@ static struct platform_device bfin_ac97_pcm = { }; #endif +#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \ + || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) +static const char * const ad1836_link[] = { + "bfin-tdm.0", + "spi0.4", +}; +static struct platform_device bfin_ad1836_machine = { + .name = "bfin-snd-ad1836", + .id = -1, + .dev = { + .platform_data = (void *)ad1836_link, + }, +}; +#endif + #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \ defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE) static const unsigned ad73311_gpio[] = { @@ -2927,6 +2942,11 @@ static struct platform_device *stamp_devices[] __initdata = { &bfin_ac97_pcm, #endif +#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \ + defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) + &bfin_ad1836_machine, +#endif + #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \ defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE) &bfin_ad73311_machine, diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c index 7c36777c6455..551f866172cf 100644 --- a/arch/blackfin/mach-bf561/boards/ezkit.c +++ b/arch/blackfin/mach-bf561/boards/ezkit.c @@ -539,6 +539,21 @@ static struct platform_device bfin_ac97 = { }; #endif +#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \ + || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) +static const char * const ad1836_link[] = { + "bfin-tdm.0", + "spi0.4", +}; +static struct platform_device bfin_ad1836_machine = { + .name = "bfin-snd-ad1836", + .id = -1, + .dev = { + .platform_data = (void *)ad1836_link, + }, +}; +#endif + static struct platform_device *ezkit_devices[] __initdata = { &bfin_dpmc, @@ -603,6 +618,11 @@ static struct platform_device *ezkit_devices[] __initdata = { #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE) &bfin_ac97, #endif + +#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \ + defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) + &bfin_ad1836_machine, +#endif }; static int __init net2272_init(void) diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c b/arch/blackfin/mach-bf609/boards/ezkit.c index c2cf1ae31189..61c1f47a4bf2 100644 --- a/arch/blackfin/mach-bf609/boards/ezkit.c +++ b/arch/blackfin/mach-bf609/boards/ezkit.c @@ -818,6 +818,21 @@ static struct platform_device bfin_i2s = { }; #endif +#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \ + || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) +static const char * const ad1836_link[] = { + "bfin-tdm.0", + "spi0.76", +}; +static struct platform_device bfin_ad1836_machine = { + .name = "bfin-snd-ad1836", + .id = -1, + .dev = { + .platform_data = (void *)ad1836_link, + }, +}; +#endif + #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \ defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE) static struct platform_device adau1761_device = { @@ -1557,6 +1572,10 @@ static struct platform_device *ezkit_devices[] __initdata = { defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE) &bfin_i2s, #endif +#if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \ + defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE) + &bfin_ad1836_machine, +#endif #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \ defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE) &adau1761_device, -- cgit v1.2.2 From 50888469bda11bcff306893bbaff21f25894be0b Mon Sep 17 00:00:00 2001 From: Steven Miao Date: Tue, 31 Jul 2012 17:28:10 +0800 Subject: blackfin: smp: adapt to generic smp helpers Replace blackfin ipi message queue with generic smp helper function. Signed-off-by: Steven Miao Signed-off-by: Bob Liu --- arch/blackfin/Kconfig | 1 + arch/blackfin/include/asm/smp.h | 2 + arch/blackfin/mach-common/smp.c | 223 ++++++++++++---------------------------- 3 files changed, 69 insertions(+), 157 deletions(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index f34861920634..c7092e6057c5 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -38,6 +38,7 @@ config BLACKFIN select GENERIC_ATOMIC64 select GENERIC_IRQ_PROBE select IRQ_PER_CPU if SMP + select USE_GENERIC_SMP_HELPERS if SMP select HAVE_NMI_WATCHDOG if NMI_WATCHDOG select GENERIC_SMP_IDLE_THREAD select ARCH_USES_GETTIMEOFFSET if !GENERIC_CLOCKEVENTS diff --git a/arch/blackfin/include/asm/smp.h b/arch/blackfin/include/asm/smp.h index dc3d144b4bb5..9631598dcc5d 100644 --- a/arch/blackfin/include/asm/smp.h +++ b/arch/blackfin/include/asm/smp.h @@ -18,6 +18,8 @@ #define raw_smp_processor_id() blackfin_core_id() extern void bfin_relocate_coreb_l1_mem(void); +extern void arch_send_call_function_single_ipi(int cpu); +extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); #if defined(CONFIG_SMP) && defined(CONFIG_ICACHE_FLUSH_L1) asmlinkage void blackfin_icache_flush_range_l1(unsigned long *ptr); diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c index 00bbe672b3b3..a40151306b77 100644 --- a/arch/blackfin/mach-common/smp.c +++ b/arch/blackfin/mach-common/smp.c @@ -48,10 +48,13 @@ unsigned long blackfin_iflush_l1_entry[NR_CPUS]; struct blackfin_initial_pda __cpuinitdata initial_pda_coreb; -#define BFIN_IPI_TIMER 0 -#define BFIN_IPI_RESCHEDULE 1 -#define BFIN_IPI_CALL_FUNC 2 -#define BFIN_IPI_CPU_STOP 3 +enum ipi_message_type { + BFIN_IPI_TIMER, + BFIN_IPI_RESCHEDULE, + BFIN_IPI_CALL_FUNC, + BFIN_IPI_CALL_FUNC_SINGLE, + BFIN_IPI_CPU_STOP, +}; struct blackfin_flush_data { unsigned long start; @@ -60,35 +63,20 @@ struct blackfin_flush_data { void *secondary_stack; - -struct smp_call_struct { - void (*func)(void *info); - void *info; - int wait; - cpumask_t *waitmask; -}; - static struct blackfin_flush_data smp_flush_data; static DEFINE_SPINLOCK(stop_lock); -struct ipi_message { - unsigned long type; - struct smp_call_struct call_struct; -}; - /* A magic number - stress test shows this is safe for common cases */ #define BFIN_IPI_MSGQ_LEN 5 /* Simple FIFO buffer, overflow leads to panic */ -struct ipi_message_queue { - spinlock_t lock; +struct ipi_data { unsigned long count; - unsigned long head; /* head of the queue */ - struct ipi_message ipi_message[BFIN_IPI_MSGQ_LEN]; + unsigned long bits; }; -static DEFINE_PER_CPU(struct ipi_message_queue, ipi_msg_queue); +static DEFINE_PER_CPU(struct ipi_data, bfin_ipi); static void ipi_cpu_stop(unsigned int cpu) { @@ -129,28 +117,6 @@ static void ipi_flush_icache(void *info) blackfin_icache_flush_range(fdata->start, fdata->end); } -static void ipi_call_function(unsigned int cpu, struct ipi_message *msg) -{ - int wait; - void (*func)(void *info); - void *info; - func = msg->call_struct.func; - info = msg->call_struct.info; - wait = msg->call_struct.wait; - func(info); - if (wait) { -#ifdef __ARCH_SYNC_CORE_DCACHE - /* - * 'wait' usually means synchronization between CPUs. - * Invalidate D cache in case shared data was changed - * by func() to ensure cache coherence. - */ - resync_core_dcache(); -#endif - cpumask_clear_cpu(cpu, msg->call_struct.waitmask); - } -} - /* Use IRQ_SUPPLE_0 to request reschedule. * When returning from interrupt to user space, * there is chance to reschedule */ @@ -172,152 +138,95 @@ void ipi_timer(void) static irqreturn_t ipi_handler_int1(int irq, void *dev_instance) { - struct ipi_message *msg; - struct ipi_message_queue *msg_queue; + struct ipi_data *bfin_ipi_data; unsigned int cpu = smp_processor_id(); - unsigned long flags; + unsigned long pending; + unsigned long msg; platform_clear_ipi(cpu, IRQ_SUPPLE_1); - msg_queue = &__get_cpu_var(ipi_msg_queue); - - spin_lock_irqsave(&msg_queue->lock, flags); - - while (msg_queue->count) { - msg = &msg_queue->ipi_message[msg_queue->head]; - switch (msg->type) { - case BFIN_IPI_TIMER: - ipi_timer(); - break; - case BFIN_IPI_RESCHEDULE: - scheduler_ipi(); - break; - case BFIN_IPI_CALL_FUNC: - ipi_call_function(cpu, msg); - break; - case BFIN_IPI_CPU_STOP: - ipi_cpu_stop(cpu); - break; - default: - printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%lx\n", - cpu, msg->type); - break; - } - msg_queue->head++; - msg_queue->head %= BFIN_IPI_MSGQ_LEN; - msg_queue->count--; + bfin_ipi_data = &__get_cpu_var(bfin_ipi); + + while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) { + msg = 0; + do { + msg = find_next_bit(&pending, BITS_PER_LONG, msg + 1); + switch (msg) { + case BFIN_IPI_TIMER: + ipi_timer(); + break; + case BFIN_IPI_RESCHEDULE: + scheduler_ipi(); + break; + case BFIN_IPI_CALL_FUNC: + generic_smp_call_function_interrupt(); + break; + + case BFIN_IPI_CALL_FUNC_SINGLE: + generic_smp_call_function_single_interrupt(); + break; + + case BFIN_IPI_CPU_STOP: + ipi_cpu_stop(cpu); + break; + } + } while (msg < BITS_PER_LONG); + + smp_mb(); } - spin_unlock_irqrestore(&msg_queue->lock, flags); return IRQ_HANDLED; } -static void ipi_queue_init(void) +static void bfin_ipi_init(void) { unsigned int cpu; - struct ipi_message_queue *msg_queue; + struct ipi_data *bfin_ipi_data; for_each_possible_cpu(cpu) { - msg_queue = &per_cpu(ipi_msg_queue, cpu); - spin_lock_init(&msg_queue->lock); - msg_queue->count = 0; - msg_queue->head = 0; + bfin_ipi_data = &per_cpu(bfin_ipi, cpu); + bfin_ipi_data->bits = 0; + bfin_ipi_data->count = 0; } } -static inline void smp_send_message(cpumask_t callmap, unsigned long type, - void (*func) (void *info), void *info, int wait) +void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg) { unsigned int cpu; - struct ipi_message_queue *msg_queue; - struct ipi_message *msg; - unsigned long flags, next_msg; - cpumask_t waitmask; /* waitmask is shared by all cpus */ - - cpumask_copy(&waitmask, &callmap); - for_each_cpu(cpu, &callmap) { - msg_queue = &per_cpu(ipi_msg_queue, cpu); - spin_lock_irqsave(&msg_queue->lock, flags); - if (msg_queue->count < BFIN_IPI_MSGQ_LEN) { - next_msg = (msg_queue->head + msg_queue->count) - % BFIN_IPI_MSGQ_LEN; - msg = &msg_queue->ipi_message[next_msg]; - msg->type = type; - if (type == BFIN_IPI_CALL_FUNC) { - msg->call_struct.func = func; - msg->call_struct.info = info; - msg->call_struct.wait = wait; - msg->call_struct.waitmask = &waitmask; - } - msg_queue->count++; - } else - panic("IPI message queue overflow\n"); - spin_unlock_irqrestore(&msg_queue->lock, flags); + struct ipi_data *bfin_ipi_data; + unsigned long flags; + + local_irq_save(flags); + + for_each_cpu(cpu, cpumask) { + bfin_ipi_data = &per_cpu(bfin_ipi, cpu); + smp_mb(); + set_bit(msg, &bfin_ipi_data->bits); + bfin_ipi_data->count++; platform_send_ipi_cpu(cpu, IRQ_SUPPLE_1); } - if (wait) { - while (!cpumask_empty(&waitmask)) - blackfin_dcache_invalidate_range( - (unsigned long)(&waitmask), - (unsigned long)(&waitmask)); -#ifdef __ARCH_SYNC_CORE_DCACHE - /* - * Invalidate D cache in case shared data was changed by - * other processors to ensure cache coherence. - */ - resync_core_dcache(); -#endif - } + local_irq_restore(flags); } -int smp_call_function(void (*func)(void *info), void *info, int wait) +void arch_send_call_function_single_ipi(int cpu) { - cpumask_t callmap; - - preempt_disable(); - cpumask_copy(&callmap, cpu_online_mask); - cpumask_clear_cpu(smp_processor_id(), &callmap); - if (!cpumask_empty(&callmap)) - smp_send_message(callmap, BFIN_IPI_CALL_FUNC, func, info, wait); - - preempt_enable(); - - return 0; + send_ipi(cpumask_of(cpu), BFIN_IPI_CALL_FUNC_SINGLE); } -EXPORT_SYMBOL_GPL(smp_call_function); -int smp_call_function_single(int cpuid, void (*func) (void *info), void *info, - int wait) +void arch_send_call_function_ipi_mask(const struct cpumask *mask) { - unsigned int cpu = cpuid; - cpumask_t callmap; - - if (cpu_is_offline(cpu)) - return 0; - cpumask_clear(&callmap); - cpumask_set_cpu(cpu, &callmap); - - smp_send_message(callmap, BFIN_IPI_CALL_FUNC, func, info, wait); - - return 0; + send_ipi(mask, BFIN_IPI_CALL_FUNC); } -EXPORT_SYMBOL_GPL(smp_call_function_single); void smp_send_reschedule(int cpu) { - cpumask_t callmap; - /* simply trigger an ipi */ - - cpumask_clear(&callmap); - cpumask_set_cpu(cpu, &callmap); - - smp_send_message(callmap, BFIN_IPI_RESCHEDULE, NULL, NULL, 0); + send_ipi(cpumask_of(cpu), BFIN_IPI_RESCHEDULE); return; } void smp_send_msg(const struct cpumask *mask, unsigned long type) { - smp_send_message(*mask, type, NULL, NULL, 0); + send_ipi(mask, type); } void smp_timer_broadcast(const struct cpumask *mask) @@ -333,7 +242,7 @@ void smp_send_stop(void) cpumask_copy(&callmap, cpu_online_mask); cpumask_clear_cpu(smp_processor_id(), &callmap); if (!cpumask_empty(&callmap)) - smp_send_message(callmap, BFIN_IPI_CPU_STOP, NULL, NULL, 0); + send_ipi(&callmap, BFIN_IPI_CPU_STOP); preempt_enable(); @@ -436,7 +345,7 @@ void __init smp_prepare_boot_cpu(void) void __init smp_prepare_cpus(unsigned int max_cpus) { platform_prepare_cpus(max_cpus); - ipi_queue_init(); + bfin_ipi_init(); platform_request_ipi(IRQ_SUPPLE_0, ipi_handler_int0); platform_request_ipi(IRQ_SUPPLE_1, ipi_handler_int1); } -- cgit v1.2.2 From 6895f97e15895625e03c95df904d92befdac7118 Mon Sep 17 00:00:00 2001 From: James Hogan Date: Thu, 6 Sep 2012 22:11:25 +0100 Subject: kbuild: add symbol prefix arg to kallsyms Commit 1f2bfbd00e466ff3489b2ca5cc75b1cccd14c123 ("kbuild: link of vmlinux moved to a script") introduced in v3.5-rc1 broke kallsyms on architectures which have symbol prefixes. The --symbol-prefix argument used to be added to the KALLSYMS command line from the architecture Makefile, however this isn't picked up by the new scripts/link-vmlinux.sh. This resulted in symbols like kallsyms_addresses being added which weren't correctly overriding the weak symbols such as _kallsyms_addresses. These could then trigger BUG_ONs in kallsyms code. This is fixed by removing the KALLSYMS addition from the architecture Makefile, and using CONFIG_SYMBOL_PREFIX in the link-vmlinux.sh script to determine whether to add the --symbol-prefix argument. Signed-off-by: James Hogan Signed-off-by: Bob Liu --- arch/blackfin/Makefile | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/Makefile b/arch/blackfin/Makefile index d3d7e64ca96d..66cf00095b84 100644 --- a/arch/blackfin/Makefile +++ b/arch/blackfin/Makefile @@ -20,7 +20,6 @@ endif KBUILD_AFLAGS += $(call cc-option,-mno-fdpic) KBUILD_CFLAGS_MODULE += -mlong-calls LDFLAGS += -m elf32bfin -KALLSYMS += --symbol-prefix=_ KBUILD_DEFCONFIG := BF537-STAMP_defconfig -- cgit v1.2.2 From 4413e16d9d21673bb5048a2e542f1aaa00015c2e Mon Sep 17 00:00:00 2001 From: David Howells Date: Tue, 2 Oct 2012 18:01:35 +0100 Subject: UAPI: (Scripted) Set up UAPI Kbuild files Set up empty UAPI Kbuild files to be populated by the header splitter. Signed-off-by: David Howells Acked-by: Arnd Bergmann Acked-by: Thomas Gleixner Acked-by: Paul E. McKenney Acked-by: Dave Jones --- arch/blackfin/include/uapi/asm/Kbuild | 3 +++ 1 file changed, 3 insertions(+) create mode 100644 arch/blackfin/include/uapi/asm/Kbuild (limited to 'arch/blackfin') diff --git a/arch/blackfin/include/uapi/asm/Kbuild b/arch/blackfin/include/uapi/asm/Kbuild new file mode 100644 index 000000000000..baebb3da1d44 --- /dev/null +++ b/arch/blackfin/include/uapi/asm/Kbuild @@ -0,0 +1,3 @@ +# UAPI Header export list +include include/uapi/asm-generic/Kbuild.asm + -- cgit v1.2.2 From 16f3e95b3209c4d9080e3a3c6bb9955a0e7cfa95 Mon Sep 17 00:00:00 2001 From: Jiri Kosina Date: Thu, 4 Oct 2012 17:12:20 -0700 Subject: cross-arch: don't corrupt personality flags upon exec() Historically, the top three bytes of personality have been used for things such as ADDR_NO_RANDOMIZE, which made sense only for specific architectures. We now however have a flag there that is general no matter the architecture (UNAME26); generally we have to be careful to preserve the personality flags across exec(). This patch tries to fix all architectures that forcefully overwrite personality flags during exec() (ppc32 and s390 have been fixed recently by commits f9783ec862ea ("[S390] Do not clobber personality flags on exec") and 59e4c3a2fe9c ("powerpc/32: Don't clobber personality flags on exec") in a similar way already). Signed-off-by: Jiri Kosina Cc: Haavard Skinnemoen Cc: Hans-Christian Egtvedt Cc: Mike Frysinger Cc: Mark Salter Cc: Mikael Starvik Cc: Jesper Nilsson Cc: David Howells Cc: Yoshinori Sato Cc: Richard Kuo Cc: Hirokazu Takata Cc: Geert Uytterhoeven Cc: Michal Simek Cc: Koichi Yasutake Cc: Jonas Bonn Cc: Chen Liqin Cc: Lennox Wu Cc: Paul Mundt Cc: "David S. Miller" Cc: Chris Zankel Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/blackfin/include/asm/elf.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/include/asm/elf.h b/arch/blackfin/include/asm/elf.h index e6c6812a9abd..14bc98ff668f 100644 --- a/arch/blackfin/include/asm/elf.h +++ b/arch/blackfin/include/asm/elf.h @@ -132,6 +132,7 @@ do { \ #define ELF_PLATFORM (NULL) -#define SET_PERSONALITY(ex) set_personality(PER_LINUX) +#define SET_PERSONALITY(ex) \ + set_personality(PER_LINUX | (current->personality & (~PER_MASK))) #endif -- cgit v1.2.2 From 4563f2cc295e1094fc66e9d0cd9c5e4ea0616ae3 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Tue, 31 Jul 2012 02:17:07 -0400 Subject: Blackfin: bf533-ezkit: enable flash drivers by default This board has a JEDEC ST PSD4256G6V flash device, so enable all the options needed so it gets probed by default. Signed-off-by: Mike Frysinger Signed-off-by: Bob Liu --- arch/blackfin/configs/BF533-EZKIT_defconfig | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig index 127f20df75a0..16273a922056 100644 --- a/arch/blackfin/configs/BF533-EZKIT_defconfig +++ b/arch/blackfin/configs/BF533-EZKIT_defconfig @@ -52,10 +52,13 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_MTD=y CONFIG_MTD_CHAR=m CONFIG_MTD_BLOCK=y -CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_CFI_AMDSTD=y CONFIG_MTD_RAM=y -CONFIG_MTD_ROM=m +CONFIG_MTD_ROM=y CONFIG_MTD_COMPLEX_MAPPINGS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PLATRAM=y CONFIG_BLK_DEV_RAM=y CONFIG_NETDEVICES=y # CONFIG_NET_VENDOR_BROADCOM is not set -- cgit v1.2.2 From 57820b34690ab6c8b367d6b8b61c21a1fe99f867 Mon Sep 17 00:00:00 2001 From: Scott Jiang Date: Tue, 14 Aug 2012 11:59:31 -0400 Subject: Blackfin: bf537: fix lq035 platform device name Lq035 fb driver uses KBUILD_MODNAME which is bf537_lq035 instead of bf537-lq035. Signed-off-by: Scott Jiang Signed-off-by: Bob Liu --- arch/blackfin/mach-bf537/boards/stamp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index 5ed654ae66e1..6acbead90fad 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c @@ -1525,7 +1525,7 @@ static struct platform_device bfin_sport_spi1_device = { #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE) static struct platform_device bfin_fb_device = { - .name = "bf537-lq035", + .name = "bf537_lq035", }; #endif -- cgit v1.2.2 From a54081c45c4070c4ec708f63abb87b8d0944f77a Mon Sep 17 00:00:00 2001 From: Harald Krapfenbauer Date: Tue, 14 Aug 2012 12:04:06 +0200 Subject: Blackfin: CM-BF537E: Update SPORT support in board file. Signed-off-by: Harald Krapfenbauer Signed-off-by: Bob Liu --- arch/blackfin/mach-bf537/boards/cm_bf537e.c | 130 ++++++++++++++++++++++++++-- 1 file changed, 125 insertions(+), 5 deletions(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c index 9408ab56d87f..85e4fc9f9c22 100644 --- a/arch/blackfin/mach-bf537/boards/cm_bf537e.c +++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c @@ -25,6 +25,7 @@ #include #include #include +#include /* * Name the Board for the /proc/cpuinfo @@ -143,6 +144,71 @@ static struct platform_device bfin_spi0_device = { }; #endif /* spi master and devices */ +#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE) + +/* SPORT SPI controller data */ +static struct bfin5xx_spi_master bfin_sport_spi0_info = { + .num_chipselect = MAX_BLACKFIN_GPIOS, + .enable_dma = 0, /* master don't support DMA */ + .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI, + P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0}, +}; + +static struct resource bfin_sport_spi0_resource[] = { + [0] = { + .start = SPORT0_TCR1, + .end = SPORT0_TCR1 + 0xFF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_SPORT0_ERROR, + .end = IRQ_SPORT0_ERROR, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device bfin_sport_spi0_device = { + .name = "bfin-sport-spi", + .id = 1, /* Bus number */ + .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource), + .resource = bfin_sport_spi0_resource, + .dev = { + .platform_data = &bfin_sport_spi0_info, /* Passed to driver */ + }, +}; + +static struct bfin5xx_spi_master bfin_sport_spi1_info = { + .num_chipselect = MAX_BLACKFIN_GPIOS, + .enable_dma = 0, /* master don't support DMA */ + .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI, + P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0}, +}; + +static struct resource bfin_sport_spi1_resource[] = { + [0] = { + .start = SPORT1_TCR1, + .end = SPORT1_TCR1 + 0xFF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_SPORT1_ERROR, + .end = IRQ_SPORT1_ERROR, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device bfin_sport_spi1_device = { + .name = "bfin-sport-spi", + .id = 2, /* Bus number */ + .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource), + .resource = bfin_sport_spi1_resource, + .dev = { + .platform_data = &bfin_sport_spi1_info, /* Passed to driver */ + }, +}; + +#endif /* sport spi master and devices */ + #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) static struct platform_device rtc_device = { .name = "rtc-bfin", @@ -512,6 +578,13 @@ static struct platform_device i2c_bfin_twi_device = { }; #endif +#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) \ +|| defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE) +unsigned short bfin_sport0_peripherals[] = { + P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, + P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0 +}; +#endif #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART static struct resource bfin_sport0_uart_resources[] = { @@ -532,11 +605,6 @@ static struct resource bfin_sport0_uart_resources[] = { }, }; -static unsigned short bfin_sport0_peripherals[] = { - P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, - P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0 -}; - static struct platform_device bfin_sport0_uart_device = { .name = "bfin-sport-uart", .id = 0, @@ -582,6 +650,49 @@ static struct platform_device bfin_sport1_uart_device = { }; #endif #endif +#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE) +static struct resource bfin_sport0_resources[] = { + { + .start = SPORT0_TCR1, + .end = SPORT0_MRCS3+4, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_SPORT0_RX, + .end = IRQ_SPORT0_RX+1, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_SPORT0_TX, + .end = IRQ_SPORT0_TX+1, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_SPORT0_ERROR, + .end = IRQ_SPORT0_ERROR, + .flags = IORESOURCE_IRQ, + }, + { + .start = CH_SPORT0_TX, + .end = CH_SPORT0_TX, + .flags = IORESOURCE_DMA, + }, + { + .start = CH_SPORT0_RX, + .end = CH_SPORT0_RX, + .flags = IORESOURCE_DMA, + }, +}; +static struct platform_device bfin_sport0_device = { + .name = "bfin_sport_raw", + .id = 0, + .num_resources = ARRAY_SIZE(bfin_sport0_resources), + .resource = bfin_sport0_resources, + .dev = { + .platform_data = &bfin_sport0_peripherals, /* Passed to driver */ + }, +}; +#endif #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) #include @@ -684,6 +795,10 @@ static struct platform_device *cm_bf537e_devices[] __initdata = { &bfin_dpmc, +#if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE) + &bfin_sport0_device, +#endif + #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE) &hitachi_fb_device, #endif @@ -744,6 +859,11 @@ static struct platform_device *cm_bf537e_devices[] __initdata = { &bfin_spi0_device, #endif +#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE) + &bfin_sport_spi0_device, + &bfin_sport_spi1_device, +#endif + #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE) &bfin_pata_device, #endif -- cgit v1.2.2 From ce8609146d09df213ed1e842ece7ad477e0ab7a6 Mon Sep 17 00:00:00 2001 From: Steven Miao Date: Thu, 16 Aug 2012 13:41:47 +0800 Subject: Blackfin: bfin_gpio: proc: fix return value Signed-off-by: Steven Miao Signed-off-by: Bob Liu --- arch/blackfin/kernel/bfin_gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c index 83139aaf3072..ed978f1c5cb9 100644 --- a/arch/blackfin/kernel/bfin_gpio.c +++ b/arch/blackfin/kernel/bfin_gpio.c @@ -1265,8 +1265,8 @@ static __init int gpio_register_proc(void) { struct proc_dir_entry *proc_gpio; - proc_gpio = proc_create("gpio", S_IRUGO, NULL, &gpio_proc_ops); - return proc_gpio != NULL; + proc_gpio = proc_create("gpio", 0, NULL, &gpio_proc_ops); + return proc_gpio == NULL; } __initcall(gpio_register_proc); #endif -- cgit v1.2.2 From 810f1512dc8a1f64c22229c3def85fc398b6a24f Mon Sep 17 00:00:00 2001 From: James Cosin Date: Mon, 20 Aug 2012 11:55:36 +0800 Subject: Blackfin: cpufreq: fix dpm_state_table This patch fixes an assumption that cclk's initial divisor will always be 1 (or 0 in the register). TSCALE is always initialized on startup with a value of 4 regardless of the inital cclk divisor; so, we can't make the assumption without making lots of other assumptions. The TPERIOD value is set with a value of the current cclk (value / (HZ * TSCALE)) - 1; so, we need to adjust based on this initial frequency and not use cclk's initial divisor for adjusting the tscale. Signed-off-by: Steven Miao Signed-off-by: Bob Liu --- arch/blackfin/mach-common/cpufreq.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c index c854a27cbeab..65a4511e1d1f 100644 --- a/arch/blackfin/mach-common/cpufreq.c +++ b/arch/blackfin/mach-common/cpufreq.c @@ -77,15 +77,14 @@ static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk) csel = bfin_read32(CGU0_DIV) & 0x1F; #endif - for (index = 0; (cclk >> index) >= min_cclk && csel <= 3; index++, csel++) { + for (index = 0; (cclk >> index) >= min_cclk && csel <= 3 && index < 3; index++, csel++) { bfin_freq_table[index].frequency = cclk >> index; #ifndef CONFIG_BF60x dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */ - dpm_state_table[index].tscale = (TIME_SCALE / (1 << csel)) - 1; #else dpm_state_table[index].csel = csel; - dpm_state_table[index].tscale = TIME_SCALE >> index; #endif + dpm_state_table[index].tscale = (TIME_SCALE >> index) - 1; pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n", bfin_freq_table[index].frequency, -- cgit v1.2.2 From 740dd8c2bc180bdad27868208c00f969281b69ac Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Thu, 30 Aug 2012 18:54:24 +0800 Subject: Blackfin: bf60x: Add bf608 and bf609 specific perpheral MMRs Signed-off-by: Sonic Zhang Signed-off-by: Bob Liu --- arch/blackfin/mach-bf609/include/mach/defBF609.h | 271 +++++++++++++++++++++++ 1 file changed, 271 insertions(+) (limited to 'arch/blackfin') diff --git a/arch/blackfin/mach-bf609/include/mach/defBF609.h b/arch/blackfin/mach-bf609/include/mach/defBF609.h index 19690cc42113..8045ade34370 100644 --- a/arch/blackfin/mach-bf609/include/mach/defBF609.h +++ b/arch/blackfin/mach-bf609/include/mach/defBF609.h @@ -11,5 +11,276 @@ #include "defBF60x_base.h" /* The following are the #defines needed by ADSP-BF609 that are not in the common header */ +/* ========================= + PIXC Registers + ========================= */ + +/* ========================= + PIXC0 + ========================= */ +#define PIXC0_CTL 0xFFC19000 /* PIXC0 Control Register */ +#define PIXC0_PPL 0xFFC19004 /* PIXC0 Pixels Per Line Register */ +#define PIXC0_LPF 0xFFC19008 /* PIXC0 Line Per Frame Register */ +#define PIXC0_HSTART_A 0xFFC1900C /* PIXC0 Overlay A Horizontal Start Register */ +#define PIXC0_HEND_A 0xFFC19010 /* PIXC0 Overlay A Horizontal End Register */ +#define PIXC0_VSTART_A 0xFFC19014 /* PIXC0 Overlay A Vertical Start Register */ +#define PIXC0_VEND_A 0xFFC19018 /* PIXC0 Overlay A Vertical End Register */ +#define PIXC0_TRANSP_A 0xFFC1901C /* PIXC0 Overlay A Transparency Ratio Register */ +#define PIXC0_HSTART_B 0xFFC19020 /* PIXC0 Overlay B Horizontal Start Register */ +#define PIXC0_HEND_B 0xFFC19024 /* PIXC0 Overlay B Horizontal End Register */ +#define PIXC0_VSTART_B 0xFFC19028 /* PIXC0 Overlay B Vertical Start Register */ +#define PIXC0_VEND_B 0xFFC1902C /* PIXC0 Overlay B Vertical End Register */ +#define PIXC0_TRANSP_B 0xFFC19030 /* PIXC0 Overlay B Transparency Ratio Register */ +#define PIXC0_IRQSTAT 0xFFC1903C /* PIXC0 Interrupt Status Register */ +#define PIXC0_CONRY 0xFFC19040 /* PIXC0 RY Conversion Component Register */ +#define PIXC0_CONGU 0xFFC19044 /* PIXC0 GU Conversion Component Register */ +#define PIXC0_CONBV 0xFFC19048 /* PIXC0 BV Conversion Component Register */ +#define PIXC0_CCBIAS 0xFFC1904C /* PIXC0 Conversion Bias Register */ +#define PIXC0_TC 0xFFC19050 /* PIXC0 Transparency Register */ +#define PIXC0_REVID 0xFFC19054 /* PIXC0 PIXC Revision Id */ + +/* ========================= + PVP Registers + ========================= */ + +/* ========================= + PVP0 + ========================= */ +#define PVP0_REVID 0xFFC1A000 /* PVP0 Revision ID */ +#define PVP0_CTL 0xFFC1A004 /* PVP0 Control */ +#define PVP0_IMSK0 0xFFC1A008 /* PVP0 INTn interrupt line masks */ +#define PVP0_IMSK1 0xFFC1A00C /* PVP0 INTn interrupt line masks */ +#define PVP0_STAT 0xFFC1A010 /* PVP0 Status */ +#define PVP0_ILAT 0xFFC1A014 /* PVP0 Latched status */ +#define PVP0_IREQ0 0xFFC1A018 /* PVP0 INT0 masked latched status */ +#define PVP0_IREQ1 0xFFC1A01C /* PVP0 INT0 masked latched status */ +#define PVP0_OPF0_CFG 0xFFC1A020 /* PVP0 Config */ +#define PVP0_OPF1_CFG 0xFFC1A040 /* PVP0 Config */ +#define PVP0_OPF2_CFG 0xFFC1A060 /* PVP0 Config */ +#define PVP0_OPF0_CTL 0xFFC1A024 /* PVP0 Control */ +#define PVP0_OPF1_CTL 0xFFC1A044 /* PVP0 Control */ +#define PVP0_OPF2_CTL 0xFFC1A064 /* PVP0 Control */ +#define PVP0_OPF3_CFG 0xFFC1A080 /* PVP0 Config */ +#define PVP0_OPF3_CTL 0xFFC1A084 /* PVP0 Control */ +#define PVP0_PEC_CFG 0xFFC1A0A0 /* PVP0 Config */ +#define PVP0_PEC_CTL 0xFFC1A0A4 /* PVP0 Control */ +#define PVP0_PEC_D1TH0 0xFFC1A0A8 /* PVP0 Lower Hysteresis Threshold */ +#define PVP0_PEC_D1TH1 0xFFC1A0AC /* PVP0 Upper Hysteresis Threshold */ +#define PVP0_PEC_D2TH0 0xFFC1A0B0 /* PVP0 Weak Zero Crossing Threshold */ +#define PVP0_PEC_D2TH1 0xFFC1A0B4 /* PVP0 Strong Zero Crossing Threshold */ +#define PVP0_IIM0_CFG 0xFFC1A0C0 /* PVP0 Config */ +#define PVP0_IIM1_CFG 0xFFC1A0E0 /* PVP0 Config */ +#define PVP0_IIM0_CTL 0xFFC1A0C4 /* PVP0 Control */ +#define PVP0_IIM1_CTL 0xFFC1A0E4 /* PVP0 Control */ +#define PVP0_IIM0_SCALE 0xFFC1A0C8 /* PVP0 Scaler Values */ +#define PVP0_IIM1_SCALE 0xFFC1A0E8 /* PVP0 Scaler Values */ +#define PVP0_IIM0_SOVF_STAT 0xFFC1A0CC /* PVP0 Signed Overflow Status */ +#define PVP0_IIM1_SOVF_STAT 0xFFC1A0EC /* PVP0 Signed Overflow Status */ +#define PVP0_IIM0_UOVF_STAT 0xFFC1A0D0 /* PVP0 Unsigned Overflow Status */ +#define PVP0_IIM1_UOVF_STAT 0xFFC1A0F0 /* PVP0 Unsigned Overflow Status */ +#define PVP0_ACU_CFG 0xFFC1A100 /* PVP0 ACU Configuration Register */ +#define PVP0_ACU_CTL 0xFFC1A104 /* PVP0 ACU Control Register */ +#define PVP0_ACU_OFFSET 0xFFC1A108 /* PVP0 SUM constant register */ +#define PVP0_ACU_FACTOR 0xFFC1A10C /* PVP0 PROD constant register */ +#define PVP0_ACU_SHIFT 0xFFC1A110 /* PVP0 Shift constant register */ +#define PVP0_ACU_MIN 0xFFC1A114 /* PVP0 Lower saturation threshold set to MIN */ +#define PVP0_ACU_MAX 0xFFC1A118 /* PVP0 Upper saturation threshold set to MAX */ +#define PVP0_UDS_CFG 0xFFC1A140 /* PVP0 UDS Configuration Register */ +#define PVP0_UDS_CTL 0xFFC1A144 /* PVP0 UDS Control Register */ +#define PVP0_UDS_OHCNT 0xFFC1A148 /* PVP0 UDS Output H Dimension */ +#define PVP0_UDS_OVCNT 0xFFC1A14C /* PVP0 UDS Output V Dimension */ +#define PVP0_UDS_HAVG 0xFFC1A150 /* PVP0 UDS H Taps */ +#define PVP0_UDS_VAVG 0xFFC1A154 /* PVP0 UDS V Taps */ +#define PVP0_IPF0_CFG 0xFFC1A180 /* PVP0 Configuration */ +#define PVP0_IPF0_PIPECTL 0xFFC1A184 /* PVP0 Pipe Control */ +#define PVP0_IPF1_PIPECTL 0xFFC1A1C4 /* PVP0 Pipe Control */ +#define PVP0_IPF0_CTL 0xFFC1A188 /* PVP0 Control */ +#define PVP0_IPF1_CTL 0xFFC1A1C8 /* PVP0 Control */ +#define PVP0_IPF0_TAG 0xFFC1A18C /* PVP0 TAG Value */ +#define PVP0_IPF1_TAG 0xFFC1A1CC /* PVP0 TAG Value */ +#define PVP0_IPF0_FCNT 0xFFC1A190 /* PVP0 Frame Count */ +#define PVP0_IPF1_FCNT 0xFFC1A1D0 /* PVP0 Frame Count */ +#define PVP0_IPF0_HCNT 0xFFC1A194 /* PVP0 Horizontal Count */ +#define PVP0_IPF1_HCNT 0xFFC1A1D4 /* PVP0 Horizontal Count */ +#define PVP0_IPF0_VCNT 0xFFC1A198 /* PVP0 Vertical Count */ +#define PVP0_IPF1_VCNT 0xFFC1A1D8 /* PVP0 Vertical Count */ +#define PVP0_IPF0_HPOS 0xFFC1A19C /* PVP0 Horizontal Position */ +#define PVP0_IPF0_VPOS 0xFFC1A1A0 /* PVP0 Vertical Position */ +#define PVP0_IPF0_TAG_STAT 0xFFC1A1A4 /* PVP0 TAG Status */ +#define PVP0_IPF1_TAG_STAT 0xFFC1A1E4 /* PVP0 TAG Status */ +#define PVP0_IPF1_CFG 0xFFC1A1C0 /* PVP0 Configuration */ +#define PVP0_CNV0_CFG 0xFFC1A200 /* PVP0 Configuration */ +#define PVP0_CNV1_CFG 0xFFC1A280 /* PVP0 Configuration */ +#define PVP0_CNV2_CFG 0xFFC1A300 /* PVP0 Configuration */ +#define PVP0_CNV3_CFG 0xFFC1A380 /* PVP0 Configuration */ +#define PVP0_CNV0_CTL 0xFFC1A204 /* PVP0 Control */ +#define PVP0_CNV1_CTL 0xFFC1A284 /* PVP0 Control */ +#define PVP0_CNV2_CTL 0xFFC1A304 /* PVP0 Control */ +#define PVP0_CNV3_CTL 0xFFC1A384 /* PVP0 Control */ +#define PVP0_CNV0_C00C01 0xFFC1A208 /* PVP0 Coefficients 0, 0 and 0, 1 */ +#define PVP0_CNV1_C00C01 0xFFC1A288 /* PVP0 Coefficients 0, 0 and 0, 1 */ +#define PVP0_CNV2_C00C01 0xFFC1A308 /* PVP0 Coefficients 0, 0 and 0, 1 */ +#define PVP0_CNV3_C00C01 0xFFC1A388 /* PVP0 Coefficients 0, 0 and 0, 1 */ +#define PVP0_CNV0_C02C03 0xFFC1A20C /* PVP0 Coefficients 0, 2 and 0, 3 */ +#define PVP0_CNV1_C02C03 0xFFC1A28C /* PVP0 Coefficients 0, 2 and 0, 3 */ +#define PVP0_CNV2_C02C03 0xFFC1A30C /* PVP0 Coefficients 0, 2 and 0, 3 */ +#define PVP0_CNV3_C02C03 0xFFC1A38C /* PVP0 Coefficients 0, 2 and 0, 3 */ +#define PVP0_CNV0_C04 0xFFC1A210 /* PVP0 Coefficient 0, 4 */ +#define PVP0_CNV1_C04 0xFFC1A290 /* PVP0 Coefficient 0, 4 */ +#define PVP0_CNV2_C04 0xFFC1A310 /* PVP0 Coefficient 0, 4 */ +#define PVP0_CNV3_C04 0xFFC1A390 /* PVP0 Coefficient 0, 4 */ +#define PVP0_CNV0_C10C11 0xFFC1A214 /* PVP0 Coefficients 1, 0 and 1, 1 */ +#define PVP0_CNV1_C10C11 0xFFC1A294 /* PVP0 Coefficients 1, 0 and 1, 1 */ +#define PVP0_CNV2_C10C11 0xFFC1A314 /* PVP0 Coefficients 1, 0 and 1, 1 */ +#define PVP0_CNV3_C10C11 0xFFC1A394 /* PVP0 Coefficients 1, 0 and 1, 1 */ +#define PVP0_CNV0_C12C13 0xFFC1A218 /* PVP0 Coefficients 1, 2 and 1, 3 */ +#define PVP0_CNV1_C12C13 0xFFC1A298 /* PVP0 Coefficients 1, 2 and 1, 3 */ +#define PVP0_CNV2_C12C13 0xFFC1A318 /* PVP0 Coefficients 1, 2 and 1, 3 */ +#define PVP0_CNV3_C12C13 0xFFC1A398 /* PVP0 Coefficients 1, 2 and 1, 3 */ +#define PVP0_CNV0_C14 0xFFC1A21C /* PVP0 Coefficient 1, 4 */ +#define PVP0_CNV1_C14 0xFFC1A29C /* PVP0 Coefficient 1, 4 */ +#define PVP0_CNV2_C14 0xFFC1A31C /* PVP0 Coefficient 1, 4 */ +#define PVP0_CNV3_C14 0xFFC1A39C /* PVP0 Coefficient 1, 4 */ +#define PVP0_CNV0_C20C21 0xFFC1A220 /* PVP0 Coefficients 2, 0 and 2, 1 */ +#define PVP0_CNV1_C20C21 0xFFC1A2A0 /* PVP0 Coefficients 2, 0 and 2, 1 */ +#define PVP0_CNV2_C20C21 0xFFC1A320 /* PVP0 Coefficients 2, 0 and 2, 1 */ +#define PVP0_CNV3_C20C21 0xFFC1A3A0 /* PVP0 Coefficients 2, 0 and 2, 1 */ +#define PVP0_CNV0_C22C23 0xFFC1A224 /* PVP0 Coefficients 2, 2 and 2, 3 */ +#define PVP0_CNV1_C22C23 0xFFC1A2A4 /* PVP0 Coefficients 2, 2 and 2, 3 */ +#define PVP0_CNV2_C22C23 0xFFC1A324 /* PVP0 Coefficients 2, 2 and 2, 3 */ +#define PVP0_CNV3_C22C23 0xFFC1A3A4 /* PVP0 Coefficients 2, 2 and 2, 3 */ +#define PVP0_CNV0_C24 0xFFC1A228 /* PVP0 Coefficient 2,4 */ +#define PVP0_CNV1_C24 0xFFC1A2A8 /* PVP0 Coefficient 2,4 */ +#define PVP0_CNV2_C24 0xFFC1A328 /* PVP0 Coefficient 2,4 */ +#define PVP0_CNV3_C24 0xFFC1A3A8 /* PVP0 Coefficient 2,4 */ +#define PVP0_CNV0_C30C31 0xFFC1A22C /* PVP0 Coefficients 3, 0 and 3, 1 */ +#define PVP0_CNV1_C30C31 0xFFC1A2AC /* PVP0 Coefficients 3, 0 and 3, 1 */ +#define PVP0_CNV2_C30C31 0xFFC1A32C /* PVP0 Coefficients 3, 0 and 3, 1 */ +#define PVP0_CNV3_C30C31 0xFFC1A3AC /* PVP0 Coefficients 3, 0 and 3, 1 */ +#define PVP0_CNV0_C32C33 0xFFC1A230 /* PVP0 Coefficients 3, 2 and 3, 3 */ +#define PVP0_CNV1_C32C33 0xFFC1A2B0 /* PVP0 Coefficients 3, 2 and 3, 3 */ +#define PVP0_CNV2_C32C33 0xFFC1A330 /* PVP0 Coefficients 3, 2 and 3, 3 */ +#define PVP0_CNV3_C32C33 0xFFC1A3B0 /* PVP0 Coefficients 3, 2 and 3, 3 */ +#define PVP0_CNV0_C34 0xFFC1A234 /* PVP0 Coefficient 3, 4 */ +#define PVP0_CNV1_C34 0xFFC1A2B4 /* PVP0 Coefficient 3, 4 */ +#define PVP0_CNV2_C34 0xFFC1A334 /* PVP0 Coefficient 3, 4 */ +#define PVP0_CNV3_C34 0xFFC1A3B4 /* PVP0 Coefficient 3, 4 */ +#define PVP0_CNV0_C40C41 0xFFC1A238 /* PVP0 Coefficients 4, 0 and 4, 1 */ +#define PVP0_CNV1_C40C41 0xFFC1A2B8 /* PVP0 Coefficients 4, 0 and 4, 1 */ +#define PVP0_CNV2_C40C41 0xFFC1A338 /* PVP0 Coefficients 4, 0 and 4, 1 */ +#define PVP0_CNV3_C40C41 0xFFC1A3B8 /* PVP0 Coefficients 4, 0 and 4, 1 */ +#define PVP0_CNV0_C42C43 0xFFC1A23C /* PVP0 Coefficients 4, 2 and 4, 3 */ +#define PVP0_CNV1_C42C43 0xFFC1A2BC /* PVP0 Coefficients 4, 2 and 4, 3 */ +#define PVP0_CNV2_C42C43 0xFFC1A33C /* PVP0 Coefficients 4, 2 and 4, 3 */ +#define PVP0_CNV3_C42C43 0xFFC1A3BC /* PVP0 Coefficients 4, 2 and 4, 3 */ +#define PVP0_CNV0_C44 0xFFC1A240 /* PVP0 Coefficient 4, 4 */ +#define PVP0_CNV1_C44 0xFFC1A2C0 /* PVP0 Coefficient 4, 4 */ +#define PVP0_CNV2_C44 0xFFC1A340 /* PVP0 Coefficient 4, 4 */ +#define PVP0_CNV3_C44 0xFFC1A3C0 /* PVP0 Coefficient 4, 4 */ +#define PVP0_CNV0_SCALE 0xFFC1A244 /* PVP0 Scaling factor */ +#define PVP0_CNV1_SCALE 0xFFC1A2C4 /* PVP0 Scaling factor */ +#define PVP0_CNV2_SCALE 0xFFC1A344 /* PVP0 Scaling factor */ +#define PVP0_CNV3_SCALE 0xFFC1A3C4 /* PVP0 Scaling factor */ +#define PVP0_THC0_CFG 0xFFC1A400 /* PVP0 Configuration */ +#define PVP0_THC1_CFG 0xFFC1A500 /* PVP0 Configuration */ +#define PVP0_THC0_CTL 0xFFC1A404 /* PVP0 Control */ +#define PVP0_THC1_CTL 0xFFC1A504 /* PVP0 Control */ +#define PVP0_THC0_HFCNT 0xFFC1A408 /* PVP0 Number of frames */ +#define PVP0_THC1_HFCNT 0xFFC1A508 /* PVP0 Number of frames */ +#define PVP0_THC0_RMAXREP 0xFFC1A40C /* PVP0 Maximum number of RLE reports */ +#define PVP0_THC1_RMAXREP 0xFFC1A50C /* PVP0 Maximum number of RLE reports */ +#define PVP0_THC0_CMINVAL 0xFFC1A410 /* PVP0 Min clip value */ +#define PVP0_THC1_CMINVAL 0xFFC1A510 /* PVP0 Min clip value */ +#define PVP0_THC0_CMINTH 0xFFC1A414 /* PVP0 Clip Min Threshold */ +#define PVP0_THC1_CMINTH 0xFFC1A514 /* PVP0 Clip Min Threshold */ +#define PVP0_THC0_CMAXTH 0xFFC1A418 /* PVP0 Clip Max Threshold */ +#define PVP0_THC1_CMAXTH 0xFFC1A518 /* PVP0 Clip Max Threshold */ +#define PVP0_THC0_CMAXVAL 0xFFC1A41C /* PVP0 Max clip value */ +#define PVP0_THC1_CMAXVAL 0xFFC1A51C /* PVP0 Max clip value */ +#define PVP0_THC0_TH0 0xFFC1A420 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH0 0xFFC1A520 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH1 0xFFC1A424 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH1 0xFFC1A524 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH2 0xFFC1A428 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH2 0xFFC1A528 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH3 0xFFC1A42C /* PVP0 Threshold Value */ +#define PVP0_THC1_TH3 0xFFC1A52C /* PVP0 Threshold Value */ +#define PVP0_THC0_TH4 0xFFC1A430 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH4 0xFFC1A530 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH5 0xFFC1A434 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH5 0xFFC1A534 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH6 0xFFC1A438 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH6 0xFFC1A538 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH7 0xFFC1A43C /* PVP0 Threshold Value */ +#define PVP0_THC1_TH7 0xFFC1A53C /* PVP0 Threshold Value */ +#define PVP0_THC0_TH8 0xFFC1A440 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH8 0xFFC1A540 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH9 0xFFC1A444 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH9 0xFFC1A544 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH10 0xFFC1A448 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH10 0xFFC1A548 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH11 0xFFC1A44C /* PVP0 Threshold Value */ +#define PVP0_THC1_TH11 0xFFC1A54C /* PVP0 Threshold Value */ +#define PVP0_THC0_TH12 0xFFC1A450 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH12 0xFFC1A550 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH13 0xFFC1A454 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH13 0xFFC1A554 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH14 0xFFC1A458 /* PVP0 Threshold Value */ +#define PVP0_THC1_TH14 0xFFC1A558 /* PVP0 Threshold Value */ +#define PVP0_THC0_TH15 0xFFC1A45C /* PVP0 Threshold Value */ +#define PVP0_THC1_TH15 0xFFC1A55C /* PVP0 Threshold Value */ +#define PVP0_THC0_HHPOS 0xFFC1A460 /* PVP0 Window start X-coordinate */ +#define PVP0_THC1_HHPOS 0xFFC1A560 /* PVP0 Window start X-coordinate */ +#define PVP0_THC0_HVPOS 0xFFC1A464 /* PVP0 Window start Y-coordinate */ +#define PVP0_THC1_HVPOS 0xFFC1A564 /* PVP0 Window start Y-coordinate */ +#define PVP0_THC0_HHCNT 0xFFC1A468 /* PVP0 Window width in X dimension */ +#define PVP0_THC1_HHCNT 0xFFC1A568 /* PVP0 Window width in X dimension */ +#define PVP0_THC0_HVCNT 0xFFC1A46C /* PVP0 Window width in Y dimension */ +#define PVP0_THC1_HVCNT 0xFFC1A56C /* PVP0 Window width in Y dimension */ +#define PVP0_THC0_RHPOS 0xFFC1A470 /* PVP0 Window start X-coordinate */ +#define PVP0_THC1_RHPOS 0xFFC1A570 /* PVP0 Window start X-coordinate */ +#define PVP0_THC0_RVPOS 0xFFC1A474 /* PVP0 Window start Y-coordinate */ +#define PVP0_THC1_RVPOS 0xFFC1A574 /* PVP0 Window start Y-coordinate */ +#define PVP0_THC0_RHCNT 0xFFC1A478 /* PVP0 Window width in X dimension */ +#define PVP0_THC1_RHCNT 0xFFC1A578 /* PVP0 Window width in X dimension */ +#define PVP0_THC0_RVCNT 0xFFC1A47C /* PVP0 Window width in Y dimension */ +#define PVP0_THC1_RVCNT 0xFFC1A57C /* PVP0 Window width in Y dimension */ +#define PVP0_THC0_HFCNT_STAT 0xFFC1A480 /* PVP0 Current Frame counter */ +#define PVP0_THC1_HFCNT_STAT 0xFFC1A580 /* PVP0 Current Frame counter */ +#define PVP0_THC0_HCNT0_STAT 0xFFC1A484 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT0_STAT 0xFFC1A584 /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT1_STAT 0xFFC1A488 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT1_STAT 0xFFC1A588 /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT2_STAT 0xFFC1A48C /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT2_STAT 0xFFC1A58C /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT3_STAT 0xFFC1A490 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT3_STAT 0xFFC1A590 /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT4_STAT 0xFFC1A494 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT4_STAT 0xFFC1A594 /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT5_STAT 0xFFC1A498 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT5_STAT 0xFFC1A598 /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT6_STAT 0xFFC1A49C /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT6_STAT 0xFFC1A59C /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT7_STAT 0xFFC1A4A0 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT7_STAT 0xFFC1A5A0 /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT8_STAT 0xFFC1A4A4 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT8_STAT 0xFFC1A5A4 /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT9_STAT 0xFFC1A4A8 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT9_STAT 0xFFC1A5A8 /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT10_STAT 0xFFC1A4AC /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT10_STAT 0xFFC1A5AC /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT11_STAT 0xFFC1A4B0 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT11_STAT 0xFFC1A5B0 /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT12_STAT 0xFFC1A4B4 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT12_STAT 0xFFC1A5B4 /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT13_STAT 0xFFC1A4B8 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT13_STAT 0xFFC1A5B8 /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT14_STAT 0xFFC1A4BC /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT14_STAT 0xFFC1A5BC /* PVP0 Histogram counter value */ +#define PVP0_THC0_HCNT15_STAT 0xFFC1A4C0 /* PVP0 Histogram counter value */ +#define PVP0_THC1_HCNT15_STAT 0xFFC1A5C0 /* PVP0 Histogram counter value */ +#define PVP0_THC0_RREP_STAT 0xFFC1A4C4 /* PVP0 Number of RLE Reports */ +#define PVP0_THC1_RREP_STAT 0xFFC1A5C4 /* PVP0 Number of RLE Reports */ +#define PVP0_PMA_CFG 0xFFC1A600 /* PVP0 PMA Configuration Register */ #endif /* _DEF_BF609_H */ -- cgit v1.2.2 From ee5124e3103582a9c0c4134fe96ad351f96309a9 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Fri, 31 Aug 2012 11:13:31 +0800 Subject: Blackfin: add bf548 v0.4 revision Signed-off-by: Sonic Zhang Signed-off-by: Bob Liu --- arch/blackfin/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index c7092e6057c5..99224c4eb86b 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -298,7 +298,7 @@ config BF_REV_0_3 config BF_REV_0_4 bool "0.4" - depends on (BF561 || BF533 || BF532 || BF531 || BF538 || BF539) + depends on (BF561 || BF533 || BF532 || BF531 || BF538 || BF539 || BF54x) config BF_REV_0_5 bool "0.5" -- cgit v1.2.2 From e334492632babe99db5ac6811fec15312eedb2ca Mon Sep 17 00:00:00 2001 From: Bob Liu Date: Thu, 9 Aug 2012 10:52:48 +0800 Subject: Blackfin: update defconfig for bf609-ezkit Signed-off-by: Bob Liu --- arch/blackfin/configs/BF609-EZKIT_defconfig | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/configs/BF609-EZKIT_defconfig b/arch/blackfin/configs/BF609-EZKIT_defconfig index f4b02350e415..13eb73231a9a 100644 --- a/arch/blackfin/configs/BF609-EZKIT_defconfig +++ b/arch/blackfin/configs/BF609-EZKIT_defconfig @@ -1,5 +1,6 @@ CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 @@ -24,7 +25,6 @@ CONFIG_BF609=y CONFIG_PINT1_ASSIGN=0x01010000 CONFIG_PINT2_ASSIGN=0x07000101 CONFIG_PINT3_ASSIGN=0x02020303 -CONFIG_HIGH_RES_TIMERS=y CONFIG_IP_CHECKSUM_L1=y CONFIG_SYSCALL_TAB_L1=y CONFIG_CPLB_SWITCH_TAB_L1=y @@ -116,9 +116,6 @@ CONFIG_SND_PCM_OSS=m # CONFIG_SND_SPI is not set # CONFIG_SND_USB is not set CONFIG_SND_SOC=m -CONFIG_SND_BF6XX_I2S=m -CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61=m -CONFIG_SND_SOC_ALL_CODECS=m CONFIG_USB=y CONFIG_USB_MUSB_HDRC=y CONFIG_USB_MUSB_BLACKFIN=m @@ -136,7 +133,6 @@ CONFIG_VFAT_FS=y CONFIG_JFFS2_FS=m CONFIG_UBIFS_FS=m CONFIG_NFS_FS=m -CONFIG_NFS_V3=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ISO8859_1=y CONFIG_DEBUG_FS=y @@ -149,9 +145,9 @@ CONFIG_DEBUG_BFIN_HWTRACE_COMPRESSION_ONE=y CONFIG_EARLY_PRINTK=y CONFIG_CPLB_INFO=y CONFIG_BFIN_PSEUDODBG_INSNS=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_MD4=y -CONFIG_CRYPTO_MD5=y -CONFIG_CRYPTO_ARC4=y +CONFIG_CRYPTO_HMAC=m +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_MD5=m +CONFIG_CRYPTO_ARC4=m # CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_DEV_BFIN_CRC=y +CONFIG_CRYPTO_DEV_BFIN_CRC=m -- cgit v1.2.2 From 5204e4787b89a281be88a2eb57407165da2757ad Mon Sep 17 00:00:00 2001 From: Steven Miao Date: Mon, 8 Oct 2012 14:18:34 +0800 Subject: Blackfin: fix wrong place disabled irq Shouldn't disable irq before send ipi. Signed-off-by: Steven Miao Signed-off-by: Bob Liu --- arch/blackfin/kernel/reboot.c | 1 - arch/blackfin/mach-common/cpufreq.c | 4 +--- 2 files changed, 1 insertion(+), 4 deletions(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/kernel/reboot.c b/arch/blackfin/kernel/reboot.c index 5272e6eefd92..c4f50a328501 100644 --- a/arch/blackfin/kernel/reboot.c +++ b/arch/blackfin/kernel/reboot.c @@ -86,7 +86,6 @@ void native_machine_restart(char *cmd) void machine_restart(char *cmd) { native_machine_restart(cmd); - local_irq_disable(); if (smp_processor_id()) smp_call_function((void *)bfin_reset, 0, 1); else diff --git a/arch/blackfin/mach-common/cpufreq.c b/arch/blackfin/mach-common/cpufreq.c index 65a4511e1d1f..d88bd31319e6 100644 --- a/arch/blackfin/mach-common/cpufreq.c +++ b/arch/blackfin/mach-common/cpufreq.c @@ -134,7 +134,7 @@ static int bfin_target(struct cpufreq_policy *poli, unsigned int plldiv; #endif unsigned int index, cpu; - unsigned long flags, cclk_hz; + unsigned long cclk_hz; struct cpufreq_freqs freqs; static unsigned long lpj_ref; static unsigned int lpj_ref_freq; @@ -165,7 +165,6 @@ static int bfin_target(struct cpufreq_policy *poli, cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); if (cpu == CPUFREQ_CPU) { - flags = hard_local_irq_save(); #ifndef CONFIG_BF60x plldiv = (bfin_read_PLL_DIV() & SSEL) | dpm_state_table[index].csel; @@ -194,7 +193,6 @@ static int bfin_target(struct cpufreq_policy *poli, loops_per_jiffy = cpufreq_scale(lpj_ref, lpj_ref_freq, freqs.new); } - hard_local_irq_restore(flags); } /* TODO: just test case for cycles clock source, remove later */ cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); -- cgit v1.2.2 From 4087af4c7f978fe574378e5d1e69db88281e60ce Mon Sep 17 00:00:00 2001 From: Steven Miao Date: Thu, 16 Aug 2012 13:43:15 +0800 Subject: Blackfin: drop irq enable in init_arch_irq() Kernel common code will enable irq, drop it in init_arch_irq(). Signed-off-by: Steven Miao Signed-off-by: Bob Liu --- arch/blackfin/mach-common/ints-priority.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 7ca09ec2ca53..902bebc434c6 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -1441,7 +1441,6 @@ int __init init_arch_irq(void) IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; - bfin_sti(bfin_irq_flags); /* This implicitly covers ANOMALY_05000171 * Boot-ROM code modifies SICA_IWRx wakeup registers -- cgit v1.2.2 From 6594b982f6d5f957c8d72de7658bf8e240c7dfca Mon Sep 17 00:00:00 2001 From: Steven Miao Date: Tue, 4 Sep 2012 16:57:14 +0800 Subject: Blackfin: smp: add smp_mb() to keep coherency After use generic smp helpers, smp_mb() should be added to keep coherency. Signed-off-by: Steven Miao Signed-off-by: Bob Liu --- arch/blackfin/mach-common/smp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/mach-common/smp.c b/arch/blackfin/mach-common/smp.c index a40151306b77..bb61ae4986e4 100644 --- a/arch/blackfin/mach-common/smp.c +++ b/arch/blackfin/mach-common/smp.c @@ -146,7 +146,7 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance) platform_clear_ipi(cpu, IRQ_SUPPLE_1); bfin_ipi_data = &__get_cpu_var(bfin_ipi); - + smp_mb(); while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) { msg = 0; do { @@ -195,7 +195,7 @@ void send_ipi(const struct cpumask *cpumask, enum ipi_message_type msg) unsigned long flags; local_irq_save(flags); - + smp_mb(); for_each_cpu(cpu, cpumask) { bfin_ipi_data = &per_cpu(bfin_ipi, cpu); smp_mb(); -- cgit v1.2.2 From af1839eb4bd4fe079a125eb199205fceb6ae19e6 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Mon, 8 Oct 2012 16:28:08 -0700 Subject: Kconfig: clean up the long arch list for the UID16 config option Introduce HAVE_UID16 config option and select it in corresponding architecture Kconfig files. UID16 now only depends on HAVE_UID16. Signed-off-by: Catalin Marinas Acked-by: Geert Uytterhoeven Cc: Russell King Cc: Mike Frysinger Cc: Mikael Starvik Cc: Jesper Nilsson Cc: David Howells Cc: Yoshinori Sato Cc: Martin Schwidefsky Cc: Heiko Carstens Cc: Paul Mundt Cc: "David S. Miller" Cc: Jeff Dike Cc: Richard Weinberger Cc: Thomas Gleixner Cc: Ingo Molnar Cc: "H. Peter Anvin" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/blackfin/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/blackfin') diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index c7092e6057c5..2169889c73ec 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -33,6 +33,7 @@ config BLACKFIN select HAVE_PERF_EVENTS select ARCH_HAVE_CUSTOM_GPIO_H select ARCH_WANT_OPTIONAL_GPIOLIB + select HAVE_UID16 select ARCH_WANT_IPC_PARSE_VERSION select HAVE_GENERIC_HARDIRQS select GENERIC_ATOMIC64 -- cgit v1.2.2