From 5a9eb8da8b95fce21eb2dd39fe71b2b7882ce89a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 19 Mar 2009 15:02:33 +0000 Subject: [ARM] S3C24XX: Move plat/dma.h Move the platform dma.h to dma-plat.h to ensure it doen't get confused with plat/dma.h Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/dma.c | 2 +- arch/arm/plat-s3c24xx/include/plat/dma-plat.h | 82 +++++++++++++++++++++++++++ arch/arm/plat-s3c24xx/include/plat/dma.h | 82 --------------------------- 3 files changed, 83 insertions(+), 83 deletions(-) create mode 100644 arch/arm/plat-s3c24xx/include/plat/dma-plat.h delete mode 100644 arch/arm/plat-s3c24xx/include/plat/dma.h (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index aee2aeb46c60..d3d1375d95b3 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -34,7 +34,7 @@ #include -#include +#include /* io map for dma */ static void __iomem *dma_base; diff --git a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h b/arch/arm/plat-s3c24xx/include/plat/dma-plat.h new file mode 100644 index 000000000000..fbe84afe2d90 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/dma-plat.h @@ -0,0 +1,82 @@ +/* linux/arch/arm/plat-s3c24xx/include/plat/dma-plat.h + * + * Copyright (C) 2006 Simtec Electronics + * Ben Dooks + * + * Samsung S3C24XX DMA support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +extern struct sysdev_class dma_sysclass; +extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS]; + +#define DMA_CH_VALID (1<<31) +#define DMA_CH_NEVER (1<<30) + +struct s3c24xx_dma_addr { + unsigned long from; + unsigned long to; +}; + +/* struct s3c24xx_dma_map + * + * this holds the mapping information for the channel selected + * to be connected to the specified device +*/ + +struct s3c24xx_dma_map { + const char *name; + struct s3c24xx_dma_addr hw_addr; + + unsigned long channels[S3C2410_DMA_CHANNELS]; + unsigned long channels_rx[S3C2410_DMA_CHANNELS]; +}; + +struct s3c24xx_dma_selection { + struct s3c24xx_dma_map *map; + unsigned long map_size; + unsigned long dcon_mask; + + void (*select)(struct s3c2410_dma_chan *chan, + struct s3c24xx_dma_map *map); + + void (*direction)(struct s3c2410_dma_chan *chan, + struct s3c24xx_dma_map *map, + enum s3c2410_dmasrc dir); +}; + +extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel); + +/* struct s3c24xx_dma_order_ch + * + * channel map for one of the `enum dma_ch` dma channels. the list + * entry contains a set of low-level channel numbers, orred with + * DMA_CH_VALID, which are checked in the order in the array. +*/ + +struct s3c24xx_dma_order_ch { + unsigned int list[S3C2410_DMA_CHANNELS]; /* list of channels */ + unsigned int flags; /* flags */ +}; + +/* struct s3c24xx_dma_order + * + * information provided by either the core or the board to give the + * dma system a hint on how to allocate channels +*/ + +struct s3c24xx_dma_order { + struct s3c24xx_dma_order_ch channels[DMACH_MAX]; +}; + +extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map); + +/* DMA init code, called from the cpu support code */ + +extern int s3c2410_dma_init(void); + +extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq, + unsigned int stride); diff --git a/arch/arm/plat-s3c24xx/include/plat/dma.h b/arch/arm/plat-s3c24xx/include/plat/dma.h deleted file mode 100644 index c78efe316fc8..000000000000 --- a/arch/arm/plat-s3c24xx/include/plat/dma.h +++ /dev/null @@ -1,82 +0,0 @@ -/* linux/include/asm-arm/plat-s3c24xx/dma.h - * - * Copyright (C) 2006 Simtec Electronics - * Ben Dooks - * - * Samsung S3C24XX DMA support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -extern struct sysdev_class dma_sysclass; -extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS]; - -#define DMA_CH_VALID (1<<31) -#define DMA_CH_NEVER (1<<30) - -struct s3c24xx_dma_addr { - unsigned long from; - unsigned long to; -}; - -/* struct s3c24xx_dma_map - * - * this holds the mapping information for the channel selected - * to be connected to the specified device -*/ - -struct s3c24xx_dma_map { - const char *name; - struct s3c24xx_dma_addr hw_addr; - - unsigned long channels[S3C2410_DMA_CHANNELS]; - unsigned long channels_rx[S3C2410_DMA_CHANNELS]; -}; - -struct s3c24xx_dma_selection { - struct s3c24xx_dma_map *map; - unsigned long map_size; - unsigned long dcon_mask; - - void (*select)(struct s3c2410_dma_chan *chan, - struct s3c24xx_dma_map *map); - - void (*direction)(struct s3c2410_dma_chan *chan, - struct s3c24xx_dma_map *map, - enum s3c2410_dmasrc dir); -}; - -extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel); - -/* struct s3c24xx_dma_order_ch - * - * channel map for one of the `enum dma_ch` dma channels. the list - * entry contains a set of low-level channel numbers, orred with - * DMA_CH_VALID, which are checked in the order in the array. -*/ - -struct s3c24xx_dma_order_ch { - unsigned int list[S3C2410_DMA_CHANNELS]; /* list of channels */ - unsigned int flags; /* flags */ -}; - -/* struct s3c24xx_dma_order - * - * information provided by either the core or the board to give the - * dma system a hint on how to allocate channels -*/ - -struct s3c24xx_dma_order { - struct s3c24xx_dma_order_ch channels[DMACH_MAX]; -}; - -extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map); - -/* DMA init code, called from the cpu support code */ - -extern int s3c2410_dma_init(void); - -extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq, - unsigned int stride); -- cgit v1.2.2 From 8970ef47d56fd3db28ee798b9d400caf08abd924 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 19 Mar 2009 15:02:34 +0000 Subject: [ARM] S3C24XX: Remove hardware specific registers from DMA calls The S3C24XX DMA API channel configuration registers are being passed values comprised of register values which makes it hard to move the API to cover both the S3C24XX and S3C64XX. These values can be calculated from knowing which device the channel is connected to, so remove them from the two calls s3c2410_dma_config and s3c2410_dma_devconfig. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/dma.c | 60 ++++++++++++++++++++++++++++++++++----------- 1 file changed, 46 insertions(+), 14 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index d3d1375d95b3..dc58a0ddc9f6 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -1038,14 +1038,13 @@ EXPORT_SYMBOL(s3c2410_dma_ctrl); /* s3c2410_dma_config * * xfersize: size of unit in bytes (1,2,4) - * dcon: base value of the DCONx register */ int s3c2410_dma_config(unsigned int channel, - int xferunit, - int dcon) + int xferunit) { struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); + unsigned int dcon; pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", __func__, channel, xferunit, dcon); @@ -1055,10 +1054,33 @@ int s3c2410_dma_config(unsigned int channel, pr_debug("%s: Initial dcon is %08x\n", __func__, dcon); - dcon |= chan->dcon & dma_sel.dcon_mask; + dcon = chan->dcon & dma_sel.dcon_mask; pr_debug("%s: New dcon is %08x\n", __func__, dcon); + switch (chan->req_ch) { + case DMACH_I2S_IN: + case DMACH_I2S_OUT: + case DMACH_PCM_IN: + case DMACH_PCM_OUT: + case DMACH_MIC_IN: + default: + dcon |= S3C2410_DCON_HANDSHAKE; + dcon |= S3C2410_DCON_SYNC_PCLK; + break; + + case DMACH_SDI: + /* note, ensure if need HANDSHAKE or not */ + dcon |= S3C2410_DCON_SYNC_PCLK; + break; + + case DMACH_XD0: + case DMACH_XD1: + dcon |= S3C2410_DCON_HANDSHAKE; + dcon |= S3C2410_DCON_SYNC_HCLK; + break; + } + switch (xferunit) { case 1: dcon |= S3C2410_DCON_BYTE; @@ -1150,29 +1172,38 @@ EXPORT_SYMBOL(s3c2410_dma_set_buffdone_fn); * source: S3C2410_DMASRC_HW: source is hardware * S3C2410_DMASRC_MEM: source is memory * - * hwcfg: the value for xxxSTCn register, - * bit 0: 0=increment pointer, 1=leave pointer - * bit 1: 0=source is AHB, 1=source is APB - * * devaddr: physical address of the source */ int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, - int hwcfg, unsigned long devaddr) { struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); + unsigned int hwcfg; if (chan == NULL) return -EINVAL; - pr_debug("%s: source=%d, hwcfg=%08x, devaddr=%08lx\n", - __func__, (int)source, hwcfg, devaddr); + pr_debug("%s: source=%d, devaddr=%08lx\n", + __func__, (int)source, devaddr); chan->source = source; chan->dev_addr = devaddr; - chan->hw_cfg = hwcfg; + + switch (chan->req_ch) { + case DMACH_XD0: + case DMACH_XD1: + hwcfg = 0; /* AHB */ + break; + + default: + hwcfg = S3C2410_DISRCC_APB; + } + + /* always assume our peripheral desintation is a fixed + * address in memory. */ + hwcfg |= S3C2410_DISRCC_INC; switch (source) { case S3C2410_DMASRC_HW: @@ -1278,8 +1309,8 @@ static int s3c2410_dma_resume(struct sys_device *dev) printk(KERN_INFO "dma%d: restoring configuration\n", cp->number); - s3c2410_dma_config(no, cp->xfer_unit, cp->dcon); - s3c2410_dma_devconfig(no, cp->source, cp->hw_cfg, cp->dev_addr); + s3c2410_dma_config(no, cp->xfer_unit); + s3c2410_dma_devconfig(no, cp->source, cp->dev_addr); /* re-select the dma source for this channel */ @@ -1476,6 +1507,7 @@ static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel) found: dmach = &s3c2410_chans[ch]; dmach->map = ch_map; + dmach->req_ch = channel; dma_chan_map[channel] = dmach; /* select the channel */ -- cgit v1.2.2 From 44dc94045f6ddbc07db3e0eb3448c2efc13ac2cf Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 19 Mar 2009 15:02:35 +0000 Subject: [ARM] S3C24XX: DMA: Split hardware regs out of The is for the driver API for the DMA system and should not have anything relying on the CPU specific registers. Remove the registers to for the code that really needs to know about them. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/dma.c | 2 +- arch/arm/plat-s3c24xx/include/plat/regs-dma.h | 145 ++++++++++++++++++++++++++ 2 files changed, 146 insertions(+), 1 deletion(-) create mode 100644 arch/arm/plat-s3c24xx/include/plat/regs-dma.h (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index dc58a0ddc9f6..7c37c9a75323 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -31,10 +31,10 @@ #include #include #include - #include #include +#include /* io map for dma */ static void __iomem *dma_base; diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-dma.h b/arch/arm/plat-s3c24xx/include/plat/regs-dma.h new file mode 100644 index 000000000000..d38e7b76c260 --- /dev/null +++ b/arch/arm/plat-s3c24xx/include/plat/regs-dma.h @@ -0,0 +1,145 @@ +/* arch/arm/mach-s3c2410/include/mach/dma.h + * + * Copyright (C) 2003,2004,2006 Simtec Electronics + * Ben Dooks + * + * Samsung S3C24XX DMA support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* DMA Register definitions */ + +#define S3C2410_DMA_DISRC (0x00) +#define S3C2410_DMA_DISRCC (0x04) +#define S3C2410_DMA_DIDST (0x08) +#define S3C2410_DMA_DIDSTC (0x0C) +#define S3C2410_DMA_DCON (0x10) +#define S3C2410_DMA_DSTAT (0x14) +#define S3C2410_DMA_DCSRC (0x18) +#define S3C2410_DMA_DCDST (0x1C) +#define S3C2410_DMA_DMASKTRIG (0x20) +#define S3C2412_DMA_DMAREQSEL (0x24) +#define S3C2443_DMA_DMAREQSEL (0x24) + +#define S3C2410_DISRCC_INC (1<<0) +#define S3C2410_DISRCC_APB (1<<1) + +#define S3C2410_DMASKTRIG_STOP (1<<2) +#define S3C2410_DMASKTRIG_ON (1<<1) +#define S3C2410_DMASKTRIG_SWTRIG (1<<0) + +#define S3C2410_DCON_DEMAND (0<<31) +#define S3C2410_DCON_HANDSHAKE (1<<31) +#define S3C2410_DCON_SYNC_PCLK (0<<30) +#define S3C2410_DCON_SYNC_HCLK (1<<30) + +#define S3C2410_DCON_INTREQ (1<<29) + +#define S3C2410_DCON_CH0_XDREQ0 (0<<24) +#define S3C2410_DCON_CH0_UART0 (1<<24) +#define S3C2410_DCON_CH0_SDI (2<<24) +#define S3C2410_DCON_CH0_TIMER (3<<24) +#define S3C2410_DCON_CH0_USBEP1 (4<<24) + +#define S3C2410_DCON_CH1_XDREQ1 (0<<24) +#define S3C2410_DCON_CH1_UART1 (1<<24) +#define S3C2410_DCON_CH1_I2SSDI (2<<24) +#define S3C2410_DCON_CH1_SPI (3<<24) +#define S3C2410_DCON_CH1_USBEP2 (4<<24) + +#define S3C2410_DCON_CH2_I2SSDO (0<<24) +#define S3C2410_DCON_CH2_I2SSDI (1<<24) +#define S3C2410_DCON_CH2_SDI (2<<24) +#define S3C2410_DCON_CH2_TIMER (3<<24) +#define S3C2410_DCON_CH2_USBEP3 (4<<24) + +#define S3C2410_DCON_CH3_UART2 (0<<24) +#define S3C2410_DCON_CH3_SDI (1<<24) +#define S3C2410_DCON_CH3_SPI (2<<24) +#define S3C2410_DCON_CH3_TIMER (3<<24) +#define S3C2410_DCON_CH3_USBEP4 (4<<24) + +#define S3C2410_DCON_SRCSHIFT (24) +#define S3C2410_DCON_SRCMASK (7<<24) + +#define S3C2410_DCON_BYTE (0<<20) +#define S3C2410_DCON_HALFWORD (1<<20) +#define S3C2410_DCON_WORD (2<<20) + +#define S3C2410_DCON_AUTORELOAD (0<<22) +#define S3C2410_DCON_NORELOAD (1<<22) +#define S3C2410_DCON_HWTRIG (1<<23) + +#ifdef CONFIG_CPU_S3C2440 +#define S3C2440_DIDSTC_CHKINT (1<<2) + +#define S3C2440_DCON_CH0_I2SSDO (5<<24) +#define S3C2440_DCON_CH0_PCMIN (6<<24) + +#define S3C2440_DCON_CH1_PCMOUT (5<<24) +#define S3C2440_DCON_CH1_SDI (6<<24) + +#define S3C2440_DCON_CH2_PCMIN (5<<24) +#define S3C2440_DCON_CH2_MICIN (6<<24) + +#define S3C2440_DCON_CH3_MICIN (5<<24) +#define S3C2440_DCON_CH3_PCMOUT (6<<24) +#endif + +#ifdef CONFIG_CPU_S3C2412 + +#define S3C2412_DMAREQSEL_SRC(x) ((x)<<1) + +#define S3C2412_DMAREQSEL_HW (1) + +#define S3C2412_DMAREQSEL_SPI0TX S3C2412_DMAREQSEL_SRC(0) +#define S3C2412_DMAREQSEL_SPI0RX S3C2412_DMAREQSEL_SRC(1) +#define S3C2412_DMAREQSEL_SPI1TX S3C2412_DMAREQSEL_SRC(2) +#define S3C2412_DMAREQSEL_SPI1RX S3C2412_DMAREQSEL_SRC(3) +#define S3C2412_DMAREQSEL_I2STX S3C2412_DMAREQSEL_SRC(4) +#define S3C2412_DMAREQSEL_I2SRX S3C2412_DMAREQSEL_SRC(5) +#define S3C2412_DMAREQSEL_TIMER S3C2412_DMAREQSEL_SRC(9) +#define S3C2412_DMAREQSEL_SDI S3C2412_DMAREQSEL_SRC(10) +#define S3C2412_DMAREQSEL_USBEP1 S3C2412_DMAREQSEL_SRC(13) +#define S3C2412_DMAREQSEL_USBEP2 S3C2412_DMAREQSEL_SRC(14) +#define S3C2412_DMAREQSEL_USBEP3 S3C2412_DMAREQSEL_SRC(15) +#define S3C2412_DMAREQSEL_USBEP4 S3C2412_DMAREQSEL_SRC(16) +#define S3C2412_DMAREQSEL_XDREQ0 S3C2412_DMAREQSEL_SRC(17) +#define S3C2412_DMAREQSEL_XDREQ1 S3C2412_DMAREQSEL_SRC(18) +#define S3C2412_DMAREQSEL_UART0_0 S3C2412_DMAREQSEL_SRC(19) +#define S3C2412_DMAREQSEL_UART0_1 S3C2412_DMAREQSEL_SRC(20) +#define S3C2412_DMAREQSEL_UART1_0 S3C2412_DMAREQSEL_SRC(21) +#define S3C2412_DMAREQSEL_UART1_1 S3C2412_DMAREQSEL_SRC(22) +#define S3C2412_DMAREQSEL_UART2_0 S3C2412_DMAREQSEL_SRC(23) +#define S3C2412_DMAREQSEL_UART2_1 S3C2412_DMAREQSEL_SRC(24) + +#endif + +#define S3C2443_DMAREQSEL_SRC(x) ((x)<<1) + +#define S3C2443_DMAREQSEL_HW (1) + +#define S3C2443_DMAREQSEL_SPI0TX S3C2443_DMAREQSEL_SRC(0) +#define S3C2443_DMAREQSEL_SPI0RX S3C2443_DMAREQSEL_SRC(1) +#define S3C2443_DMAREQSEL_SPI1TX S3C2443_DMAREQSEL_SRC(2) +#define S3C2443_DMAREQSEL_SPI1RX S3C2443_DMAREQSEL_SRC(3) +#define S3C2443_DMAREQSEL_I2STX S3C2443_DMAREQSEL_SRC(4) +#define S3C2443_DMAREQSEL_I2SRX S3C2443_DMAREQSEL_SRC(5) +#define S3C2443_DMAREQSEL_TIMER S3C2443_DMAREQSEL_SRC(9) +#define S3C2443_DMAREQSEL_SDI S3C2443_DMAREQSEL_SRC(10) +#define S3C2443_DMAREQSEL_XDREQ0 S3C2443_DMAREQSEL_SRC(17) +#define S3C2443_DMAREQSEL_XDREQ1 S3C2443_DMAREQSEL_SRC(18) +#define S3C2443_DMAREQSEL_UART0_0 S3C2443_DMAREQSEL_SRC(19) +#define S3C2443_DMAREQSEL_UART0_1 S3C2443_DMAREQSEL_SRC(20) +#define S3C2443_DMAREQSEL_UART1_0 S3C2443_DMAREQSEL_SRC(21) +#define S3C2443_DMAREQSEL_UART1_1 S3C2443_DMAREQSEL_SRC(22) +#define S3C2443_DMAREQSEL_UART2_0 S3C2443_DMAREQSEL_SRC(23) +#define S3C2443_DMAREQSEL_UART2_1 S3C2443_DMAREQSEL_SRC(24) +#define S3C2443_DMAREQSEL_UART3_0 S3C2443_DMAREQSEL_SRC(25) +#define S3C2443_DMAREQSEL_UART3_1 S3C2443_DMAREQSEL_SRC(26) +#define S3C2443_DMAREQSEL_PCMOUT S3C2443_DMAREQSEL_SRC(27) +#define S3C2443_DMAREQSEL_PCMIN S3C2443_DMAREQSEL_SRC(28) +#define S3C2443_DMAREQSEL_MICIN S3C2443_DMAREQSEL_SRC(29) -- cgit v1.2.2 From 023b40cd1018915beb5a519b55ea174683215f16 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 19 Mar 2009 15:02:36 +0000 Subject: [ARM] S3C24XX: Fix indentation in The pre-date the invention of the TAB character, so fix the indentation of the register defines. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/include/plat/regs-dma.h | 138 +++++++++++++------------- 1 file changed, 69 insertions(+), 69 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-dma.h b/arch/arm/plat-s3c24xx/include/plat/regs-dma.h index d38e7b76c260..3bc0a216df97 100644 --- a/arch/arm/plat-s3c24xx/include/plat/regs-dma.h +++ b/arch/arm/plat-s3c24xx/include/plat/regs-dma.h @@ -12,81 +12,81 @@ /* DMA Register definitions */ -#define S3C2410_DMA_DISRC (0x00) -#define S3C2410_DMA_DISRCC (0x04) -#define S3C2410_DMA_DIDST (0x08) -#define S3C2410_DMA_DIDSTC (0x0C) -#define S3C2410_DMA_DCON (0x10) -#define S3C2410_DMA_DSTAT (0x14) -#define S3C2410_DMA_DCSRC (0x18) -#define S3C2410_DMA_DCDST (0x1C) -#define S3C2410_DMA_DMASKTRIG (0x20) -#define S3C2412_DMA_DMAREQSEL (0x24) -#define S3C2443_DMA_DMAREQSEL (0x24) - -#define S3C2410_DISRCC_INC (1<<0) -#define S3C2410_DISRCC_APB (1<<1) - -#define S3C2410_DMASKTRIG_STOP (1<<2) -#define S3C2410_DMASKTRIG_ON (1<<1) -#define S3C2410_DMASKTRIG_SWTRIG (1<<0) - -#define S3C2410_DCON_DEMAND (0<<31) -#define S3C2410_DCON_HANDSHAKE (1<<31) -#define S3C2410_DCON_SYNC_PCLK (0<<30) -#define S3C2410_DCON_SYNC_HCLK (1<<30) - -#define S3C2410_DCON_INTREQ (1<<29) - -#define S3C2410_DCON_CH0_XDREQ0 (0<<24) -#define S3C2410_DCON_CH0_UART0 (1<<24) -#define S3C2410_DCON_CH0_SDI (2<<24) -#define S3C2410_DCON_CH0_TIMER (3<<24) -#define S3C2410_DCON_CH0_USBEP1 (4<<24) - -#define S3C2410_DCON_CH1_XDREQ1 (0<<24) -#define S3C2410_DCON_CH1_UART1 (1<<24) -#define S3C2410_DCON_CH1_I2SSDI (2<<24) -#define S3C2410_DCON_CH1_SPI (3<<24) -#define S3C2410_DCON_CH1_USBEP2 (4<<24) - -#define S3C2410_DCON_CH2_I2SSDO (0<<24) -#define S3C2410_DCON_CH2_I2SSDI (1<<24) -#define S3C2410_DCON_CH2_SDI (2<<24) -#define S3C2410_DCON_CH2_TIMER (3<<24) -#define S3C2410_DCON_CH2_USBEP3 (4<<24) - -#define S3C2410_DCON_CH3_UART2 (0<<24) -#define S3C2410_DCON_CH3_SDI (1<<24) -#define S3C2410_DCON_CH3_SPI (2<<24) -#define S3C2410_DCON_CH3_TIMER (3<<24) -#define S3C2410_DCON_CH3_USBEP4 (4<<24) - -#define S3C2410_DCON_SRCSHIFT (24) -#define S3C2410_DCON_SRCMASK (7<<24) - -#define S3C2410_DCON_BYTE (0<<20) -#define S3C2410_DCON_HALFWORD (1<<20) -#define S3C2410_DCON_WORD (2<<20) - -#define S3C2410_DCON_AUTORELOAD (0<<22) -#define S3C2410_DCON_NORELOAD (1<<22) -#define S3C2410_DCON_HWTRIG (1<<23) +#define S3C2410_DMA_DISRC (0x00) +#define S3C2410_DMA_DISRCC (0x04) +#define S3C2410_DMA_DIDST (0x08) +#define S3C2410_DMA_DIDSTC (0x0C) +#define S3C2410_DMA_DCON (0x10) +#define S3C2410_DMA_DSTAT (0x14) +#define S3C2410_DMA_DCSRC (0x18) +#define S3C2410_DMA_DCDST (0x1C) +#define S3C2410_DMA_DMASKTRIG (0x20) +#define S3C2412_DMA_DMAREQSEL (0x24) +#define S3C2443_DMA_DMAREQSEL (0x24) + +#define S3C2410_DISRCC_INC (1<<0) +#define S3C2410_DISRCC_APB (1<<1) + +#define S3C2410_DMASKTRIG_STOP (1<<2) +#define S3C2410_DMASKTRIG_ON (1<<1) +#define S3C2410_DMASKTRIG_SWTRIG (1<<0) + +#define S3C2410_DCON_DEMAND (0<<31) +#define S3C2410_DCON_HANDSHAKE (1<<31) +#define S3C2410_DCON_SYNC_PCLK (0<<30) +#define S3C2410_DCON_SYNC_HCLK (1<<30) + +#define S3C2410_DCON_INTREQ (1<<29) + +#define S3C2410_DCON_CH0_XDREQ0 (0<<24) +#define S3C2410_DCON_CH0_UART0 (1<<24) +#define S3C2410_DCON_CH0_SDI (2<<24) +#define S3C2410_DCON_CH0_TIMER (3<<24) +#define S3C2410_DCON_CH0_USBEP1 (4<<24) + +#define S3C2410_DCON_CH1_XDREQ1 (0<<24) +#define S3C2410_DCON_CH1_UART1 (1<<24) +#define S3C2410_DCON_CH1_I2SSDI (2<<24) +#define S3C2410_DCON_CH1_SPI (3<<24) +#define S3C2410_DCON_CH1_USBEP2 (4<<24) + +#define S3C2410_DCON_CH2_I2SSDO (0<<24) +#define S3C2410_DCON_CH2_I2SSDI (1<<24) +#define S3C2410_DCON_CH2_SDI (2<<24) +#define S3C2410_DCON_CH2_TIMER (3<<24) +#define S3C2410_DCON_CH2_USBEP3 (4<<24) + +#define S3C2410_DCON_CH3_UART2 (0<<24) +#define S3C2410_DCON_CH3_SDI (1<<24) +#define S3C2410_DCON_CH3_SPI (2<<24) +#define S3C2410_DCON_CH3_TIMER (3<<24) +#define S3C2410_DCON_CH3_USBEP4 (4<<24) + +#define S3C2410_DCON_SRCSHIFT (24) +#define S3C2410_DCON_SRCMASK (7<<24) + +#define S3C2410_DCON_BYTE (0<<20) +#define S3C2410_DCON_HALFWORD (1<<20) +#define S3C2410_DCON_WORD (2<<20) + +#define S3C2410_DCON_AUTORELOAD (0<<22) +#define S3C2410_DCON_NORELOAD (1<<22) +#define S3C2410_DCON_HWTRIG (1<<23) #ifdef CONFIG_CPU_S3C2440 -#define S3C2440_DIDSTC_CHKINT (1<<2) +#define S3C2440_DIDSTC_CHKINT (1<<2) -#define S3C2440_DCON_CH0_I2SSDO (5<<24) -#define S3C2440_DCON_CH0_PCMIN (6<<24) +#define S3C2440_DCON_CH0_I2SSDO (5<<24) +#define S3C2440_DCON_CH0_PCMIN (6<<24) -#define S3C2440_DCON_CH1_PCMOUT (5<<24) -#define S3C2440_DCON_CH1_SDI (6<<24) +#define S3C2440_DCON_CH1_PCMOUT (5<<24) +#define S3C2440_DCON_CH1_SDI (6<<24) -#define S3C2440_DCON_CH2_PCMIN (5<<24) -#define S3C2440_DCON_CH2_MICIN (6<<24) +#define S3C2440_DCON_CH2_PCMIN (5<<24) +#define S3C2440_DCON_CH2_MICIN (6<<24) -#define S3C2440_DCON_CH3_MICIN (5<<24) -#define S3C2440_DCON_CH3_PCMOUT (6<<24) +#define S3C2440_DCON_CH3_MICIN (5<<24) +#define S3C2440_DCON_CH3_PCMOUT (6<<24) #endif #ifdef CONFIG_CPU_S3C2412 -- cgit v1.2.2 From 97c1b145231730e62dd71921ec653315a1da3aad Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 19 Mar 2009 15:02:39 +0000 Subject: [ARM] S3C: Move DMA channel management code to plat-s3c Change the name of S3C2410_DMA_CHANNELS to S3C_DMA_CHANNELS in the process. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/Kconfig | 1 + arch/arm/plat-s3c24xx/dma.c | 87 +++------------------------ arch/arm/plat-s3c24xx/include/plat/dma-plat.h | 10 +-- 3 files changed, 15 insertions(+), 83 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig index 2c8a2f5d75ff..5b0bc914f58e 100644 --- a/arch/arm/plat-s3c24xx/Kconfig +++ b/arch/arm/plat-s3c24xx/Kconfig @@ -71,6 +71,7 @@ config PM_SIMTEC config S3C2410_DMA bool "S3C2410 DMA support" depends on ARCH_S3C2410 + select S3C_DMA help S3C2410 DMA support. This is needed for drivers like sound which use the S3C2410's DMA system to move data to and from the diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index 7c37c9a75323..b07fec01ab47 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c @@ -44,8 +44,6 @@ static int dma_channels; static struct s3c24xx_dma_selection dma_sel; -/* dma channel state information */ -struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS]; /* debugging functions */ @@ -135,21 +133,6 @@ dmadbg_showregs(const char *fname, int line, struct s3c2410_dma_chan *chan) #define dbg_showchan(chan) do { } while(0) #endif /* CONFIG_S3C2410_DMA_DEBUG */ -static struct s3c2410_dma_chan *dma_chan_map[DMACH_MAX]; - -/* lookup_dma_channel - * - * change the dma channel number given into a real dma channel id -*/ - -static struct s3c2410_dma_chan *lookup_dma_channel(unsigned int channel) -{ - if (channel & DMACH_LOW_LEVEL) - return &s3c2410_chans[channel & ~DMACH_LOW_LEVEL]; - else - return dma_chan_map[channel]; -} - /* s3c2410_dma_stats_timeout * * Update DMA stats from timeout info @@ -214,8 +197,6 @@ s3c2410_dma_waitforload(struct s3c2410_dma_chan *chan, int line) return 0; } - - /* s3c2410_dma_loadbuffer * * load a buffer, and update the channel state @@ -453,7 +434,7 @@ s3c2410_dma_canload(struct s3c2410_dma_chan *chan) int s3c2410_dma_enqueue(unsigned int channel, void *id, dma_addr_t data, int size) { - struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); + struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); struct s3c2410_dma_buf *buf; unsigned long flags; @@ -804,7 +785,7 @@ EXPORT_SYMBOL(s3c2410_dma_request); int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *client) { - struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); + struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); unsigned long flags; if (chan == NULL) @@ -836,7 +817,7 @@ int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *client) chan->irq_claimed = 0; if (!(channel & DMACH_LOW_LEVEL)) - dma_chan_map[channel] = NULL; + s3c_dma_chan_map[channel] = NULL; local_irq_restore(flags); @@ -995,7 +976,7 @@ static int s3c2410_dma_started(struct s3c2410_dma_chan *chan) int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op) { - struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); + struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); if (chan == NULL) return -EINVAL; @@ -1043,7 +1024,7 @@ EXPORT_SYMBOL(s3c2410_dma_ctrl); int s3c2410_dma_config(unsigned int channel, int xferunit) { - struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); + struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); unsigned int dcon; pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", @@ -1112,58 +1093,6 @@ int s3c2410_dma_config(unsigned int channel, EXPORT_SYMBOL(s3c2410_dma_config); -int s3c2410_dma_setflags(unsigned int channel, unsigned int flags) -{ - struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); - - if (chan == NULL) - return -EINVAL; - - pr_debug("%s: chan=%p, flags=%08x\n", __func__, chan, flags); - - chan->flags = flags; - - return 0; -} - -EXPORT_SYMBOL(s3c2410_dma_setflags); - - -/* do we need to protect the settings of the fields from - * irq? -*/ - -int s3c2410_dma_set_opfn(unsigned int channel, s3c2410_dma_opfn_t rtn) -{ - struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); - - if (chan == NULL) - return -EINVAL; - - pr_debug("%s: chan=%p, op rtn=%p\n", __func__, chan, rtn); - - chan->op_fn = rtn; - - return 0; -} - -EXPORT_SYMBOL(s3c2410_dma_set_opfn); - -int s3c2410_dma_set_buffdone_fn(unsigned int channel, s3c2410_dma_cbfn_t rtn) -{ - struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); - - if (chan == NULL) - return -EINVAL; - - pr_debug("%s: chan=%p, callback rtn=%p\n", __func__, chan, rtn); - - chan->callback_fn = rtn; - - return 0; -} - -EXPORT_SYMBOL(s3c2410_dma_set_buffdone_fn); /* s3c2410_dma_devconfig * @@ -1179,7 +1108,7 @@ int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, unsigned long devaddr) { - struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); + struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); unsigned int hwcfg; if (chan == NULL) @@ -1250,7 +1179,7 @@ EXPORT_SYMBOL(s3c2410_dma_devconfig); int s3c2410_dma_getposition(unsigned int channel, dma_addr_t *src, dma_addr_t *dst) { - struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); + struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); if (chan == NULL) return -EINVAL; @@ -1508,7 +1437,7 @@ static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel) dmach = &s3c2410_chans[ch]; dmach->map = ch_map; dmach->req_ch = channel; - dma_chan_map[channel] = dmach; + s3c_dma_chan_map[channel] = dmach; /* select the channel */ diff --git a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h b/arch/arm/plat-s3c24xx/include/plat/dma-plat.h index fbe84afe2d90..9565ead1bc9b 100644 --- a/arch/arm/plat-s3c24xx/include/plat/dma-plat.h +++ b/arch/arm/plat-s3c24xx/include/plat/dma-plat.h @@ -10,8 +10,10 @@ * published by the Free Software Foundation. */ +#include + extern struct sysdev_class dma_sysclass; -extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS]; +extern struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS]; #define DMA_CH_VALID (1<<31) #define DMA_CH_NEVER (1<<30) @@ -31,8 +33,8 @@ struct s3c24xx_dma_map { const char *name; struct s3c24xx_dma_addr hw_addr; - unsigned long channels[S3C2410_DMA_CHANNELS]; - unsigned long channels_rx[S3C2410_DMA_CHANNELS]; + unsigned long channels[S3C_DMA_CHANNELS]; + unsigned long channels_rx[S3C_DMA_CHANNELS]; }; struct s3c24xx_dma_selection { @@ -58,7 +60,7 @@ extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel); */ struct s3c24xx_dma_order_ch { - unsigned int list[S3C2410_DMA_CHANNELS]; /* list of channels */ + unsigned int list[S3C_DMA_CHANNELS]; /* list of channels */ unsigned int flags; /* flags */ }; -- cgit v1.2.2 From eca8655ffa1ffb23c8f6f1485c1315a3087c8f38 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 6 Mar 2009 19:49:48 +0000 Subject: [ARM] S3C: Add common USB OHCI device definition Add common definition for USB OHCI platform device, add a Kconfig to selectively compile it and add update all the users. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/devs.c | 30 ------------------------------ 1 file changed, 30 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/devs.c b/arch/arm/plat-s3c24xx/devs.c index 16ac01d9b8ab..4eb378c89a39 100644 --- a/arch/arm/plat-s3c24xx/devs.c +++ b/arch/arm/plat-s3c24xx/devs.c @@ -136,36 +136,6 @@ struct platform_device *s3c24xx_uart_src[4] = { struct platform_device *s3c24xx_uart_devs[4] = { }; -/* USB Host Controller */ - -static struct resource s3c_usb_resource[] = { - [0] = { - .start = S3C24XX_PA_USBHOST, - .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_USBH, - .end = IRQ_USBH, - .flags = IORESOURCE_IRQ, - } -}; - -static u64 s3c_device_usb_dmamask = 0xffffffffUL; - -struct platform_device s3c_device_usb = { - .name = "s3c2410-ohci", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_usb_resource), - .resource = s3c_usb_resource, - .dev = { - .dma_mask = &s3c_device_usb_dmamask, - .coherent_dma_mask = 0xffffffffUL - } -}; - -EXPORT_SYMBOL(s3c_device_usb); - /* LCD Controller */ static struct resource s3c_lcd_resource[] = { -- cgit v1.2.2 From e6a2a9ce69400a8109e01030aec0d5e1e2bc73c2 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 6 Mar 2009 19:51:50 +0000 Subject: [ARM] S3C: Rename S3C24XX_PA_USBHOST to S3C_PA_USBHOST The USB host base address is available on both the S3C24XX and S3C64XX ranges. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/include/plat/map.h | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/include/plat/map.h b/arch/arm/plat-s3c24xx/include/plat/map.h index eed8f78e7593..c4d133436fc7 100644 --- a/arch/arm/plat-s3c24xx/include/plat/map.h +++ b/arch/arm/plat-s3c24xx/include/plat/map.h @@ -58,7 +58,6 @@ #define S3C24XX_SZ_SPI SZ_1M #define S3C24XX_SZ_SDI SZ_1M #define S3C24XX_SZ_NAND SZ_1M -#define S3C24XX_SZ_USBHOST SZ_1M /* GPIO ports */ -- cgit v1.2.2 From 57699e9adf1b44f281d808609b47816804763bfa Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:23 +0000 Subject: [ARM] S3C: Add debug to UART save and a per-arch callback pre-restore Add a simple debug message on saving the UART state and add a per-arch pre-restore function to be used by the s3c64xx restore code to ensure the UARTs control registers do not go through any illegal state changes. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/include/plat/pm-core.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/include/plat/pm-core.h b/arch/arm/plat-s3c24xx/include/plat/pm-core.h index c75882113e04..fb45dd9adca5 100644 --- a/arch/arm/plat-s3c24xx/include/plat/pm-core.h +++ b/arch/arm/plat-s3c24xx/include/plat/pm-core.h @@ -57,3 +57,8 @@ static inline void s3c_pm_arch_show_resume_irqs(void) s3c_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND), s3c_irqwake_eintmask); } + +static inline void s3c_pm_arch_update_uart(void __iomem *regs, + struct pm_uart_save *save) +{ +} -- cgit v1.2.2 From d87964c46005ccb04754f6309df0fd8f67b08c6d Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:30 +0000 Subject: [ARM] S3C: GPIO PM core GPIOlib integration Move the GPIO suspend/resume support inline with the gpiolib support so that it will work with both the S3C24XX and S3C64XX series. The s3c_gpio_chip is extended to have a pm callback and a save block to keep the state of the GPIO over suspend, and the code from the s3c24xx implementation is added to a new common file. The suspend process now uses the list of registered chips to go through saving and restoring each one as appropriate, using the pm callback to select the appropriate routine depending on the type of control register present. This change also means that any additional GPIO added should not require changes to the PM. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/gpiolib.c | 8 ++ arch/arm/plat-s3c24xx/pm.c | 213 ---------------------------------------- 2 files changed, 8 insertions(+), 213 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index 5c0491bf738b..4bac12dc0733 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c @@ -22,6 +22,7 @@ #include #include #include +#include #include @@ -78,6 +79,7 @@ static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset) struct s3c_gpio_chip s3c24xx_gpios[] = { [0] = { .base = S3C24XX_GPIO_BASE(S3C2410_GPA0), + .pm = __gpio_pm(&s3c_gpio_pm_1bit), .chip = { .base = S3C2410_GPA0, .owner = THIS_MODULE, @@ -89,6 +91,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, [1] = { .base = S3C24XX_GPIO_BASE(S3C2410_GPB0), + .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPB0, .owner = THIS_MODULE, @@ -98,6 +101,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, [2] = { .base = S3C24XX_GPIO_BASE(S3C2410_GPC0), + .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPC0, .owner = THIS_MODULE, @@ -107,6 +111,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, [3] = { .base = S3C24XX_GPIO_BASE(S3C2410_GPD0), + .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPD0, .owner = THIS_MODULE, @@ -116,6 +121,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, [4] = { .base = S3C24XX_GPIO_BASE(S3C2410_GPE0), + .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPE0, .label = "GPIOE", @@ -125,6 +131,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, [5] = { .base = S3C24XX_GPIO_BASE(S3C2410_GPF0), + .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPF0, .owner = THIS_MODULE, @@ -135,6 +142,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, [6] = { .base = S3C24XX_GPIO_BASE(S3C2410_GPG0), + .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPG0, .owner = THIS_MODULE, diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index 062a29339a91..5135c40a1b90 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c @@ -75,43 +75,10 @@ static struct sleep_save core_save[] = { SAVE_ITEM(S3C2410_CLKSLOW), }; -static struct gpio_sleep { - void __iomem *base; - unsigned int gpcon; - unsigned int gpdat; - unsigned int gpup; -} gpio_save[] = { - [0] = { - .base = S3C2410_GPACON, - }, - [1] = { - .base = S3C2410_GPBCON, - }, - [2] = { - .base = S3C2410_GPCCON, - }, - [3] = { - .base = S3C2410_GPDCON, - }, - [4] = { - .base = S3C2410_GPECON, - }, - [5] = { - .base = S3C2410_GPFCON, - }, - [6] = { - .base = S3C2410_GPGCON, - }, - [7] = { - .base = S3C2410_GPHCON, - }, -}; - static struct sleep_save misc_save[] = { SAVE_ITEM(S3C2410_DCLKCON), }; - /* s3c_pm_check_resume_pin * * check to see if the pin is configured correctly for sleep mode, and @@ -165,186 +132,6 @@ void s3c_pm_configure_extint(void) } } -/* offsets for CON/DAT/UP registers */ - -#define OFFS_CON (S3C2410_GPACON - S3C2410_GPACON) -#define OFFS_DAT (S3C2410_GPADAT - S3C2410_GPACON) -#define OFFS_UP (S3C2410_GPBUP - S3C2410_GPBCON) - -/* s3c_pm_save_gpios() - * - * Save the state of the GPIOs - */ - -void s3c_pm_save_gpios(void) -{ - struct gpio_sleep *gps = gpio_save; - unsigned int gpio; - - for (gpio = 0; gpio < ARRAY_SIZE(gpio_save); gpio++, gps++) { - void __iomem *base = gps->base; - - gps->gpcon = __raw_readl(base + OFFS_CON); - gps->gpdat = __raw_readl(base + OFFS_DAT); - - if (gpio > 0) - gps->gpup = __raw_readl(base + OFFS_UP); - - } -} - -/* Test whether the given masked+shifted bits of an GPIO configuration - * are one of the SFN (special function) modes. */ - -static inline int is_sfn(unsigned long con) -{ - return (con == 2 || con == 3); -} - -/* Test if the given masked+shifted GPIO configuration is an input */ - -static inline int is_in(unsigned long con) -{ - return con == 0; -} - -/* Test if the given masked+shifted GPIO configuration is an output */ - -static inline int is_out(unsigned long con) -{ - return con == 1; -} - -/** - * s3c2410_pm_restore_gpio() - restore the given GPIO bank - * @index: The number of the GPIO bank being resumed. - * @gps: The sleep confgiuration for the bank. - * - * Restore one of the GPIO banks that was saved during suspend. This is - * not as simple as once thought, due to the possibility of glitches - * from the order that the CON and DAT registers are set in. - * - * The three states the pin can be are {IN,OUT,SFN} which gives us 9 - * combinations of changes to check. Three of these, if the pin stays - * in the same configuration can be discounted. This leaves us with - * the following: - * - * { IN => OUT } Change DAT first - * { IN => SFN } Change CON first - * { OUT => SFN } Change CON first, so new data will not glitch - * { OUT => IN } Change CON first, so new data will not glitch - * { SFN => IN } Change CON first - * { SFN => OUT } Change DAT first, so new data will not glitch [1] - * - * We do not currently deal with the UP registers as these control - * weak resistors, so a small delay in change should not need to bring - * these into the calculations. - * - * [1] this assumes that writing to a pin DAT whilst in SFN will set the - * state for when it is next output. - */ - -static void s3c2410_pm_restore_gpio(int index, struct gpio_sleep *gps) -{ - void __iomem *base = gps->base; - unsigned long gps_gpcon = gps->gpcon; - unsigned long gps_gpdat = gps->gpdat; - unsigned long old_gpcon; - unsigned long old_gpdat; - unsigned long old_gpup = 0x0; - unsigned long gpcon; - int nr; - - old_gpcon = __raw_readl(base + OFFS_CON); - old_gpdat = __raw_readl(base + OFFS_DAT); - - if (base == S3C2410_GPACON) { - /* GPACON only has one bit per control / data and no PULLUPs. - * GPACON[x] = 0 => Output, 1 => SFN */ - - /* first set all SFN bits to SFN */ - - gpcon = old_gpcon | gps->gpcon; - __raw_writel(gpcon, base + OFFS_CON); - - /* now set all the other bits */ - - __raw_writel(gps_gpdat, base + OFFS_DAT); - __raw_writel(gps_gpcon, base + OFFS_CON); - } else { - unsigned long old, new, mask; - unsigned long change_mask = 0x0; - - old_gpup = __raw_readl(base + OFFS_UP); - - /* Create a change_mask of all the items that need to have - * their CON value changed before their DAT value, so that - * we minimise the work between the two settings. - */ - - for (nr = 0, mask = 0x03; nr < 32; nr += 2, mask <<= 2) { - old = (old_gpcon & mask) >> nr; - new = (gps_gpcon & mask) >> nr; - - /* If there is no change, then skip */ - - if (old == new) - continue; - - /* If both are special function, then skip */ - - if (is_sfn(old) && is_sfn(new)) - continue; - - /* Change is IN => OUT, do not change now */ - - if (is_in(old) && is_out(new)) - continue; - - /* Change is SFN => OUT, do not change now */ - - if (is_sfn(old) && is_out(new)) - continue; - - /* We should now be at the case of IN=>SFN, - * OUT=>SFN, OUT=>IN, SFN=>IN. */ - - change_mask |= mask; - } - - /* Write the new CON settings */ - - gpcon = old_gpcon & ~change_mask; - gpcon |= gps_gpcon & change_mask; - - __raw_writel(gpcon, base + OFFS_CON); - - /* Now change any items that require DAT,CON */ - - __raw_writel(gps_gpdat, base + OFFS_DAT); - __raw_writel(gps_gpcon, base + OFFS_CON); - __raw_writel(gps->gpup, base + OFFS_UP); - } - - S3C_PMDBG("GPIO[%d] CON %08lx => %08lx, DAT %08lx => %08lx\n", - index, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); -} - - -/** s3c2410_pm_restore_gpios() - * - * Restore the state of the GPIOs - */ - -void s3c_pm_restore_gpios(void) -{ - struct gpio_sleep *gps = gpio_save; - int gpio; - - for (gpio = 0; gpio < ARRAY_SIZE(gpio_save); gpio++, gps++) { - s3c2410_pm_restore_gpio(gpio, gps); - } -} void s3c_pm_restore_core(void) { -- cgit v1.2.2 From 3f7ea467be1bad860c0f71ba7373dd3cf76b485a Mon Sep 17 00:00:00 2001 From: Nelson Castillo Date: Fri, 8 May 2009 08:10:12 -0500 Subject: [ARM] S3C: ADC: Expose number of remaining conversions to convert callback This patch allow us to efficiently modify the number of remaining conversions from the client side. This us useful when we do not know in advance how many conversions we will need or when we need to cancel pending conversions. This change is simple enough to be compatible with existing code that can just define the new pointer in the callback and ignore it. Sample usage: http://tinyurl.com/s3c2410-ts-c (function stylus_adc_action). Signed-off-by: Nelson Castillo Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/adc.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-s3c24xx/adc.c index 91adfa71c172..ee1baf11ad9e 100644 --- a/arch/arm/plat-s3c24xx/adc.c +++ b/arch/arm/plat-s3c24xx/adc.c @@ -45,7 +45,8 @@ struct s3c_adc_client { unsigned char channel; void (*select_cb)(unsigned selected); - void (*convert_cb)(unsigned val1, unsigned val2); + void (*convert_cb)(unsigned val1, unsigned val2, + unsigned *samples_left); }; struct adc_device { @@ -158,7 +159,8 @@ static void s3c_adc_default_select(unsigned select) struct s3c_adc_client *s3c_adc_register(struct platform_device *pdev, void (*select)(unsigned int selected), - void (*conv)(unsigned d0, unsigned d1), + void (*conv)(unsigned d0, unsigned d1, + unsigned *samples_left), unsigned int is_ts) { struct s3c_adc_client *client; @@ -227,9 +229,10 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw) data1 = readl(adc->regs + S3C2410_ADCDAT1); adc_dbg(adc, "read %d: 0x%04x, 0x%04x\n", client->nr_samples, data0, data1); - (client->convert_cb)(data0 & 0x3ff, data1 & 0x3ff); + client->nr_samples--; + (client->convert_cb)(data0 & 0x3ff, data1 & 0x3ff, &client->nr_samples); - if (--client->nr_samples > 0) { + if (client->nr_samples > 0) { /* fire another conversion for this */ client->select_cb(1); -- cgit v1.2.2 From ec7f4d5d67ef63c724ab6d4bdc7d2ffa8861071a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 13 May 2009 22:20:35 +0100 Subject: [ARM] S3C24XX: GPIO: Remove s3c2410_gpio_irq2pin() call Remove the s3c2410_gpio_irq2pin() function as it is not being used in any in kernel driver and the function is probably not being used anywhere else. This is also part of the effort to remove any of the s3c24xx gpio specific code that cannot be recreated by using the gpiolib framework now in the kernel. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/gpio.c | 16 ---------------- 1 file changed, 16 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c index 4a899c279eb5..65ebbaff7d50 100644 --- a/arch/arm/plat-s3c24xx/gpio.c +++ b/arch/arm/plat-s3c24xx/gpio.c @@ -199,19 +199,3 @@ int s3c2410_gpio_getirq(unsigned int pin) } EXPORT_SYMBOL(s3c2410_gpio_getirq); - -int s3c2410_gpio_irq2pin(unsigned int irq) -{ - if (irq >= IRQ_EINT0 && irq <= IRQ_EINT3) - return S3C2410_GPF0 + (irq - IRQ_EINT0); - - if (irq >= IRQ_EINT4 && irq <= IRQ_EINT7) - return S3C2410_GPF4 + (irq - IRQ_EINT4); - - if (irq >= IRQ_EINT8 && irq <= IRQ_EINT23) - return S3C2410_GPG0 + (irq - IRQ_EINT8); - - return -EINVAL; -} - -EXPORT_SYMBOL(s3c2410_gpio_irq2pin); -- cgit v1.2.2 From 9f05f6a921353f4293cda37f221b9bfa532d3c57 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 13 May 2009 21:46:15 +0100 Subject: [ARM] S3C24XX: GPIO: Remove pin specific input and output defines The use of S3C2410_GP[A-Z]x_INP and S3C2410_GP[A-Z]x_OUTP are very rare and are taking up large amounts of space in the regs-gpio.h header. The GPIO layer has had generic input and out defines called S3C2410_GPIO_INPUT and S3C2410_GPIO_OUTPUT for a while which work for all S3C24XX GPIOs. Do the following replacements: S3C2410_GP[A-Z][0-9]*_\OUTP => S3C2410_GPIO_OUTPUT S3C2410_GP[A-Z][0-9]*_\INP => /S3C2410_GPIO_INPUT S3C2410_GPA[0-9]*_OUT => S3C2410_GPIO_OUTPUT to remove any usages of these and prepare the header for the removal of these. The following command was used to acheive this: find . -type f -writable ! -name regs-gpio.h ! -name "*~" | xargs sed -i~ -e 's/S3C2410_GP[A-Z][0-9]*_\OUTP/S3C2410_GPIO_OUTPUT/g' -e 's/S3C2410_GP[A-Z][0-9]*_\INP/S3C2410_GPIO_INPUT/g' -e 's/S3C2410_GPA[0-9]*_OUT/S3C2410_GPIO_OUTPUT/g' Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/common-smdk.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c index 1a8347cec20a..ef4c8fde169f 100644 --- a/arch/arm/plat-s3c24xx/common-smdk.c +++ b/arch/arm/plat-s3c24xx/common-smdk.c @@ -184,10 +184,10 @@ void __init smdk_machine_init(void) { /* Configure the LEDs (even if we have no LED support)*/ - s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPF4_OUTP); - s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPF5_OUTP); - s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPF6_OUTP); - s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPF7_OUTP); + s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPIO_OUTPUT); s3c2410_gpio_setpin(S3C2410_GPF4, 1); s3c2410_gpio_setpin(S3C2410_GPF5, 1); -- cgit v1.2.2 From ec976d6eb021dc8f2994248c310a41540f4756bd Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 13 May 2009 22:52:24 +0100 Subject: [ARM] S3C24XX: GPIO: Move gpio functions out of Move all the gpio functions out of as this file is for defining the generic IO base addresses for the kernel IO calls. Make a new header to take this and include it via the chain from which is what most of these files should be using (and will be changed as soon as possible). Note, this does make minor changes to some drivers but should not mess up any pending merges. CC: Richard Purdie Acked-by: Mark Brown CC: David Brownell Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/common-smdk.c | 1 + arch/arm/plat-s3c24xx/pm.c | 1 + arch/arm/plat-s3c24xx/setup-i2c.c | 1 + 3 files changed, 3 insertions(+) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c index ef4c8fde169f..fe658c48f724 100644 --- a/arch/arm/plat-s3c24xx/common-smdk.c +++ b/arch/arm/plat-s3c24xx/common-smdk.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index 5135c40a1b90..16aaf36b6e5a 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/arm/plat-s3c24xx/setup-i2c.c b/arch/arm/plat-s3c24xx/setup-i2c.c index d62b7e7fb355..e0d18530555e 100644 --- a/arch/arm/plat-s3c24xx/setup-i2c.c +++ b/arch/arm/plat-s3c24xx/setup-i2c.c @@ -11,6 +11,7 @@ */ #include +#include struct platform_device; -- cgit v1.2.2 From 86c03c526e2b282846c09509a48ab8be68fe7168 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 17 May 2009 22:47:07 +0100 Subject: [ARM] S3C24XX: Fix missing In our recent changes, arch/arm/plat-s3c24xx/gpiolib.c needs to have included for it to build. This fixes the following error/warnings: arch/arm/plat-s3c/include/plat/pm.h:104: error: expected declaration specifiers or '...' before 'pm_message_t' arch/arm/plat-s3c/include/plat/pm.h:104: warning: 'struct sys_device' declared inside parameter list arch/arm/plat-s3c/include/plat/pm.h:104: warning: its scope is only this definition or declaration, which is probably not what you want arch/arm/plat-s3c/include/plat/pm.h:105: warning: 'struct sys_device' declared inside parameter list Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/gpiolib.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index 4bac12dc0733..3cbec6d3f381 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.2 From fda7b2b097fed9f88bc93ed3de0caea87ffe778e Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 17 May 2009 22:18:27 +0100 Subject: [ARM] S3C24XX: GPIO: Start removal of S3C24XX_GPIO_BASE The S3C24XX_GPIO_BASE makes it difficult to compress the GPIO number space, and is only used in a few places of which everything outside arch/arm/plat-s3c24xx/gpiolib.c will be removed as soon as possible. Change gpiolib.c to use the S3C2410_GPxCON register addresses as the base for each bank, thus eliminating S3C24XX_GPIO_BASE. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/gpiolib.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index 3cbec6d3f381..60a9f7247205 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c @@ -79,7 +79,7 @@ static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset) struct s3c_gpio_chip s3c24xx_gpios[] = { [0] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPA0), + .base = S3C2410_GPACON, .pm = __gpio_pm(&s3c_gpio_pm_1bit), .chip = { .base = S3C2410_GPA0, @@ -91,7 +91,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [1] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPB0), + .base = S3C2410_GPBCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPB0, @@ -101,7 +101,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [2] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPC0), + .base = S3C2410_GPCCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPC0, @@ -111,7 +111,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [3] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPD0), + .base = S3C2410_GPDCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPD0, @@ -121,7 +121,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [4] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPE0), + .base = S3C2410_GPECON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPE0, @@ -131,7 +131,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [5] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPF0), + .base = S3C2410_GPFCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPF0, @@ -142,7 +142,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { }, }, [6] = { - .base = S3C24XX_GPIO_BASE(S3C2410_GPG0), + .base = S3C2410_GPGCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { .base = S3C2410_GPG0, -- cgit v1.2.2 From 070276d5d049f385763dee19112bea08f56c9a0d Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 17 May 2009 22:32:23 +0100 Subject: [ARM] S3C24XX: GPIO: Change to macros for GPIO numbering Prepare to remove the large number of S3C2410_GPxn defines by moving to S3C2410_GPx(n) in arch/arm. The following perl was used to change the files: perl -pi~ -e 's/S3C2410_GP([A-Z])([0-9]+)([^_^0-9])/S3C2410_GP\1\(\2\)\3/g' Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/common-smdk.c | 24 ++++++++++++------------ arch/arm/plat-s3c24xx/gpio.c | 14 +++++++------- arch/arm/plat-s3c24xx/gpiolib.c | 14 +++++++------- arch/arm/plat-s3c24xx/pm.c | 8 ++++---- arch/arm/plat-s3c24xx/setup-i2c.c | 4 ++-- arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c | 20 ++++++++++---------- arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c | 20 ++++++++++---------- 7 files changed, 52 insertions(+), 52 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c index fe658c48f724..aa119863c5ce 100644 --- a/arch/arm/plat-s3c24xx/common-smdk.c +++ b/arch/arm/plat-s3c24xx/common-smdk.c @@ -48,27 +48,27 @@ /* LED devices */ static struct s3c24xx_led_platdata smdk_pdata_led4 = { - .gpio = S3C2410_GPF4, + .gpio = S3C2410_GPF(4), .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, .name = "led4", .def_trigger = "timer", }; static struct s3c24xx_led_platdata smdk_pdata_led5 = { - .gpio = S3C2410_GPF5, + .gpio = S3C2410_GPF(5), .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, .name = "led5", .def_trigger = "nand-disk", }; static struct s3c24xx_led_platdata smdk_pdata_led6 = { - .gpio = S3C2410_GPF6, + .gpio = S3C2410_GPF(6), .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, .name = "led6", }; static struct s3c24xx_led_platdata smdk_pdata_led7 = { - .gpio = S3C2410_GPF7, + .gpio = S3C2410_GPF(7), .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, .name = "led7", }; @@ -185,15 +185,15 @@ void __init smdk_machine_init(void) { /* Configure the LEDs (even if we have no LED support)*/ - s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPIO_OUTPUT); - s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPIO_OUTPUT); - s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPIO_OUTPUT); - s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT); + s3c2410_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT); - s3c2410_gpio_setpin(S3C2410_GPF4, 1); - s3c2410_gpio_setpin(S3C2410_GPF5, 1); - s3c2410_gpio_setpin(S3C2410_GPF6, 1); - s3c2410_gpio_setpin(S3C2410_GPF7, 1); + s3c2410_gpio_setpin(S3C2410_GPF(4), 1); + s3c2410_gpio_setpin(S3C2410_GPF(5), 1); + s3c2410_gpio_setpin(S3C2410_GPF(6), 1); + s3c2410_gpio_setpin(S3C2410_GPF(7), 1); if (machine_is_smdk2443()) smdk_nand_info.twrph0 = 50; diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c index 65ebbaff7d50..ae0b9d6f3fb8 100644 --- a/arch/arm/plat-s3c24xx/gpio.c +++ b/arch/arm/plat-s3c24xx/gpio.c @@ -183,19 +183,19 @@ EXPORT_SYMBOL(s3c2410_modify_misccr); int s3c2410_gpio_getirq(unsigned int pin) { - if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15) + if (pin < S3C2410_GPF(0) || pin > S3C2410_GPG(15)) return -1; /* not valid interrupts */ - if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7) + if (pin < S3C2410_GPG(0) && pin > S3C2410_GPF(7)) return -1; /* not valid pin */ - if (pin < S3C2410_GPF4) - return (pin - S3C2410_GPF0) + IRQ_EINT0; + if (pin < S3C2410_GPF(4)) + return (pin - S3C2410_GPF(0)) + IRQ_EINT0; - if (pin < S3C2410_GPG0) - return (pin - S3C2410_GPF4) + IRQ_EINT4; + if (pin < S3C2410_GPG(0)) + return (pin - S3C2410_GPF(4)) + IRQ_EINT4; - return (pin - S3C2410_GPG0) + IRQ_EINT8; + return (pin - S3C2410_GPG(0)) + IRQ_EINT8; } EXPORT_SYMBOL(s3c2410_gpio_getirq); diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index 60a9f7247205..a82adc3c98a5 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c @@ -82,7 +82,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { .base = S3C2410_GPACON, .pm = __gpio_pm(&s3c_gpio_pm_1bit), .chip = { - .base = S3C2410_GPA0, + .base = S3C2410_GPA(0), .owner = THIS_MODULE, .label = "GPIOA", .ngpio = 24, @@ -94,7 +94,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { .base = S3C2410_GPBCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { - .base = S3C2410_GPB0, + .base = S3C2410_GPB(0), .owner = THIS_MODULE, .label = "GPIOB", .ngpio = 16, @@ -104,7 +104,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { .base = S3C2410_GPCCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { - .base = S3C2410_GPC0, + .base = S3C2410_GPC(0), .owner = THIS_MODULE, .label = "GPIOC", .ngpio = 16, @@ -114,7 +114,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { .base = S3C2410_GPDCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { - .base = S3C2410_GPD0, + .base = S3C2410_GPD(0), .owner = THIS_MODULE, .label = "GPIOD", .ngpio = 16, @@ -124,7 +124,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { .base = S3C2410_GPECON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { - .base = S3C2410_GPE0, + .base = S3C2410_GPE(0), .label = "GPIOE", .owner = THIS_MODULE, .ngpio = 16, @@ -134,7 +134,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { .base = S3C2410_GPFCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { - .base = S3C2410_GPF0, + .base = S3C2410_GPF(0), .owner = THIS_MODULE, .label = "GPIOF", .ngpio = 8, @@ -145,7 +145,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { .base = S3C2410_GPGCON, .pm = __gpio_pm(&s3c_gpio_pm_2bit), .chip = { - .base = S3C2410_GPG0, + .base = S3C2410_GPG(0), .owner = THIS_MODULE, .label = "GPIOG", .ngpio = 10, diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index 16aaf36b6e5a..56e5253ca02c 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c @@ -124,12 +124,12 @@ void s3c_pm_configure_extint(void) * and then configure it as an input if it is not */ - for (pin = S3C2410_GPF0; pin <= S3C2410_GPF7; pin++) { - s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF0); + for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) { + s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0)); } - for (pin = S3C2410_GPG0; pin <= S3C2410_GPG7; pin++) { - s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG0)+8); + for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) { + s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG(0))+8); } } diff --git a/arch/arm/plat-s3c24xx/setup-i2c.c b/arch/arm/plat-s3c24xx/setup-i2c.c index e0d18530555e..71a6accf114e 100644 --- a/arch/arm/plat-s3c24xx/setup-i2c.c +++ b/arch/arm/plat-s3c24xx/setup-i2c.c @@ -21,6 +21,6 @@ struct platform_device; void s3c_i2c0_cfg_gpio(struct platform_device *dev) { - s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA); - s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL); + s3c2410_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPE15_IICSDA); + s3c2410_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPE14_IICSCL); } diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c index 8b403cbb53d2..9edf7894eedd 100644 --- a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c +++ b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c @@ -22,16 +22,16 @@ void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, int enable) { if (enable) { - s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPE13_SPICLK0); - s3c2410_gpio_cfgpin(S3C2410_GPE12, S3C2410_GPE12_SPIMOSI0); - s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPE11_SPIMISO0); - s3c2410_gpio_pullup(S3C2410_GPE11, 0); - s3c2410_gpio_pullup(S3C2410_GPE13, 0); + s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0); + s3c2410_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0); + s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0); + s3c2410_gpio_pullup(S3C2410_GPE(11), 0); + s3c2410_gpio_pullup(S3C2410_GPE(13), 0); } else { - s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPIO_INPUT); - s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPIO_INPUT); - s3c2410_gpio_pullup(S3C2410_GPE11, 1); - s3c2410_gpio_pullup(S3C2410_GPE12, 1); - s3c2410_gpio_pullup(S3C2410_GPE13, 1); + s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); + s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); + s3c2410_gpio_pullup(S3C2410_GPE(11), 1); + s3c2410_gpio_pullup(S3C2410_GPE(12), 1); + s3c2410_gpio_pullup(S3C2410_GPE(13), 1); } } diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c index 8fccd4e549f0..f34d0fc69ad8 100644 --- a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c +++ b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c @@ -22,16 +22,16 @@ void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, int enable) { if (enable) { - s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_SPICLK1); - s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_SPIMOSI1); - s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_SPIMISO1); - s3c2410_gpio_pullup(S3C2410_GPG5, 0); - s3c2410_gpio_pullup(S3C2410_GPG6, 0); + s3c2410_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPG7_SPICLK1); + s3c2410_gpio_cfgpin(S3C2410_GPG(6), S3C2410_GPG6_SPIMOSI1); + s3c2410_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPG5_SPIMISO1); + s3c2410_gpio_pullup(S3C2410_GPG(5), 0); + s3c2410_gpio_pullup(S3C2410_GPG(6), 0); } else { - s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPIO_INPUT); - s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPIO_INPUT); - s3c2410_gpio_pullup(S3C2410_GPG5, 1); - s3c2410_gpio_pullup(S3C2410_GPG6, 1); - s3c2410_gpio_pullup(S3C2410_GPG7, 1); + s3c2410_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT); + s3c2410_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT); + s3c2410_gpio_pullup(S3C2410_GPG(5), 1); + s3c2410_gpio_pullup(S3C2410_GPG(6), 1); + s3c2410_gpio_pullup(S3C2410_GPG(7), 1); } } -- cgit v1.2.2 From 373e9644c5f557bc8992036f9a9281e9d98aef40 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Mon, 18 May 2009 19:40:18 +0100 Subject: [ARM] S3C24XX: GPIO: Fix error returns from gpio functions Several GPIO functions have been returning -1 to indicate an error instead of returning a proper error code. Change to return -EINVAL for invalid argument(s). Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c index ae0b9d6f3fb8..95df059b5a1d 100644 --- a/arch/arm/plat-s3c24xx/gpio.c +++ b/arch/arm/plat-s3c24xx/gpio.c @@ -184,10 +184,10 @@ EXPORT_SYMBOL(s3c2410_modify_misccr); int s3c2410_gpio_getirq(unsigned int pin) { if (pin < S3C2410_GPF(0) || pin > S3C2410_GPG(15)) - return -1; /* not valid interrupts */ + return -EINVAL; /* not valid interrupts */ if (pin < S3C2410_GPG(0) && pin > S3C2410_GPF(7)) - return -1; /* not valid pin */ + return -EINVAL; /* not valid pin */ if (pin < S3C2410_GPF(4)) return (pin - S3C2410_GPF(0)) + IRQ_EINT0; -- cgit v1.2.2 From 9c0ec95797052af84b7579e2a00ea212cebf71a8 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Mon, 18 May 2009 20:03:23 +0100 Subject: [ARM] S3C24XX: GPIO: Move gpiolib initialisation earlier The arch_initcall() is too late for board initialisation to use gpiolib when doing their machine specific initilisation via the .init_machine callback. Bring the file into line with the s3c64xx implementation and use the core_initcall() to register the GPIO chips. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/gpiolib.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index a82adc3c98a5..9a2d114005b5 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c @@ -165,4 +165,4 @@ static __init int s3c24xx_gpiolib_init(void) return 0; } -arch_initcall(s3c24xx_gpiolib_init); +core_initcall(s3c24xx_gpiolib_init); -- cgit v1.2.2 From 5233c178d4cedad0acd0eb0f24b2e09f7fafaa1c Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Mon, 18 May 2009 20:10:43 +0100 Subject: [ARM] S3C24XX: GPIO: Fix missing GPIOs in gpiolib The GPG bank has 16 IOs, not 10. Add the missing GPH bank. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/gpiolib.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-s3c24xx') diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index 9a2d114005b5..6d7a961d3269 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c @@ -148,9 +148,18 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { .base = S3C2410_GPG(0), .owner = THIS_MODULE, .label = "GPIOG", - .ngpio = 10, + .ngpio = 16, .to_irq = s3c24xx_gpiolib_bankg_toirq, }, + }, { + .base = S3C2410_GPHCON, + .pm = __gpio_pm(&s3c_gpio_pm_2bit), + .chip = { + .base = S3C2410_GPH(0), + .owner = THIS_MODULE, + .label = "GPIOH", + .ngpio = 11, + }, }, }; -- cgit v1.2.2