From ee2b805c8eb6459cf541ef141ff70dae17af59ca Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 15 Aug 2009 15:12:05 +0100 Subject: ARM: 5678/1: SSP/SPI PL022 polarity terminology fix The definition of the SPI clock phase for the Motorola mode of the PL022 driver was incorrect: the spec had been interpreted as data being recieved on rising or falling edge of the clocks while the correct interpretation is that data can be recieved on the first or second edge transition, falling or rising depending on the polarity setting. Signed-off-by: Linus Walleij Signed-off-by: Russell King --- arch/arm/mach-u300/spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-u300') diff --git a/arch/arm/mach-u300/spi.c b/arch/arm/mach-u300/spi.c index 307d007ea7f3..f0e887bea30e 100644 --- a/arch/arm/mach-u300/spi.c +++ b/arch/arm/mach-u300/spi.c @@ -48,7 +48,7 @@ struct pl022_config_chip dummy_chip_info = { .data_size = SSP_DATA_BITS_8, /* used to be 12 in some default */ .rx_lev_trig = SSP_RX_1_OR_MORE_ELEM, .tx_lev_trig = SSP_TX_1_OR_MORE_EMPTY_LOC, - .clk_phase = SSP_CLK_FALLING_EDGE, + .clk_phase = SSP_CLK_SECOND_EDGE, .clk_pol = SSP_CLK_POL_IDLE_LOW, .ctrl_len = SSP_BITS_12, .wait_state = SSP_MWIRE_WAIT_ZERO, -- cgit v1.2.2