From 07ad64b60c4d1f2bdbefa5db29ccb235596bc670 Mon Sep 17 00:00:00 2001 From: Madhusudhan Chikkature Date: Fri, 1 Oct 2010 16:35:25 -0700 Subject: OMAP4 ES2: HSMMC soft reset change The omap4 es2 hsmmc has a updated soft reset logic.After the reset is issued monitor a 0->1 transition first. The reset of CMD or DATA lines is complete only after a 0->1->0 transition of SRC or SRD bits. Signed-off-by: Madhusudhan Chikkature Tested-by: Anand Gadiyar Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/hsmmc.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-omap2/hsmmc.c') diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c index eb92b8107d2c..df1311d93eba 100644 --- a/arch/arm/mach-omap2/hsmmc.c +++ b/arch/arm/mach-omap2/hsmmc.c @@ -303,6 +303,9 @@ void __init omap2_hsmmc_init(struct omap2_hsmmc_info *controllers) else mmc->slots[0].features |= HSMMC_HAS_PBIAS; + if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0)) + mmc->slots[0].features |= HSMMC_HAS_UPDATED_RESET; + switch (c->mmc) { case 1: if (mmc->slots[0].features & HSMMC_HAS_PBIAS) { -- cgit v1.2.2