From ef557d76dfbdf74c240f76be15fa90d62f1ae61f Mon Sep 17 00:00:00 2001 From: Andrzej Zaborowski Date: Wed, 6 Dec 2006 17:13:48 -0800 Subject: ARM: OMAP: correct misc 15xx and non-15xx platform code Disable accesses to SOFT_REQ_REG2 and ULPD_SOFT_DISABLE_REQ_REG registers for 15xx processors that don't have these registers. Enable level 2 interrupt handler for processors that identify as OMAP 15xx (e.g 310) and not 1510 specifically. Also fix the following compiler warning (only visible with CONFIG_OMAP_RESET_CLOCKS): arch/arm/mach-omap1/clock.c: In function 'omap1_clk_disable_unused': arch/arm/mach-omap1/clock.c:634: warning: 'return' with a value, in function returning void Signed-off-by: Andrzej Zaborowski Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap1/irq.c') diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 6383a12ad970..410d3e78dd0f 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -238,7 +238,7 @@ void __init omap_init_irq(void) if (cpu_is_omap730()) omap_unmask_irq(INT_730_IH2_IRQ); - else if (cpu_is_omap1510()) + else if (cpu_is_omap15xx()) omap_unmask_irq(INT_1510_IH2_IRQ); else if (cpu_is_omap16xx()) omap_unmask_irq(INT_1610_IH2_IRQ); -- cgit v1.2.2