From c852ac80440db9b0a47f48578e9c6303078abbc1 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Mon, 18 Sep 2006 23:26:25 +0100 Subject: [ARM] 3832/1: iop3xx: coding style cleanup Since the iop32x code isn't iop321-specific, and the iop33x code isn't iop331-specfic, do a s/iop321/iop32x/ and s/iop331/iop33x/, and tidy up the code to conform to the coding style guidelines somewhat better. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- arch/arm/mach-iop33x/iq80331.c | 12 +++--- arch/arm/mach-iop33x/iq80332.c | 12 +++--- arch/arm/mach-iop33x/irq.c | 95 +++++++++++++++++++----------------------- arch/arm/mach-iop33x/uart.c | 37 ++++++++-------- 4 files changed, 73 insertions(+), 83 deletions(-) (limited to 'arch/arm/mach-iop33x') diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c index 6b8475da3df6..97a7b7488264 100644 --- a/arch/arm/mach-iop33x/iq80331.c +++ b/arch/arm/mach-iop33x/iq80331.c @@ -61,19 +61,19 @@ iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) if (slot == 1 && pin == 1) { /* PCI-X Slot INTA */ - irq = IRQ_IOP331_XINT1; + irq = IRQ_IOP33X_XINT1; } else if (slot == 1 && pin == 2) { /* PCI-X Slot INTB */ - irq = IRQ_IOP331_XINT2; + irq = IRQ_IOP33X_XINT2; } else if (slot == 1 && pin == 3) { /* PCI-X Slot INTC */ - irq = IRQ_IOP331_XINT3; + irq = IRQ_IOP33X_XINT3; } else if (slot == 1 && pin == 4) { /* PCI-X Slot INTD */ - irq = IRQ_IOP331_XINT0; + irq = IRQ_IOP33X_XINT0; } else if (slot == 2) { /* GigE */ - irq = IRQ_IOP331_XINT2; + irq = IRQ_IOP33X_XINT2; } else { printk(KERN_ERR "iq80331_pci_map_irq() called for unknown " "device PCI:%d:%d:%d\n", dev->bus->number, @@ -142,7 +142,7 @@ MACHINE_START(IQ80331, "Intel IQ80331") .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = iop3xx_map_io, - .init_irq = iop331_init_irq, + .init_irq = iop33x_init_irq, .timer = &iq80331_timer, .init_machine = iq80331_init_machine, MACHINE_END diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c index 150f3fd5de0b..9887bfc1c078 100644 --- a/arch/arm/mach-iop33x/iq80332.c +++ b/arch/arm/mach-iop33x/iq80332.c @@ -61,19 +61,19 @@ iq80332_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) if (slot == 4 && pin == 1) { /* PCI-X Slot INTA */ - irq = IRQ_IOP331_XINT0; + irq = IRQ_IOP33X_XINT0; } else if (slot == 4 && pin == 2) { /* PCI-X Slot INTB */ - irq = IRQ_IOP331_XINT1; + irq = IRQ_IOP33X_XINT1; } else if (slot == 4 && pin == 3) { /* PCI-X Slot INTC */ - irq = IRQ_IOP331_XINT2; + irq = IRQ_IOP33X_XINT2; } else if (slot == 4 && pin == 4) { /* PCI-X Slot INTD */ - irq = IRQ_IOP331_XINT3; + irq = IRQ_IOP33X_XINT3; } else if (slot == 6) { /* GigE */ - irq = IRQ_IOP331_XINT2; + irq = IRQ_IOP33X_XINT2; } else { printk(KERN_ERR "iq80332_pci_map_irq() called for unknown " "device PCI:%d:%d:%d\n", dev->bus->number, @@ -142,7 +142,7 @@ MACHINE_START(IQ80332, "Intel IQ80332") .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, .boot_params = 0x00000100, .map_io = iop3xx_map_io, - .init_irq = iop331_init_irq, + .init_irq = iop33x_init_irq, .timer = &iq80332_timer, .init_machine = iq80332_init_machine, MACHINE_END diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c index 3c720551ac12..63304b3d0d76 100644 --- a/arch/arm/mach-iop33x/irq.c +++ b/arch/arm/mach-iop33x/irq.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/mach-iop33x/irq.c + * arch/arm/mach-iop33x/irq.c * * Generic IOP331 IRQ handling functionality * @@ -9,51 +9,44 @@ * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. - * - * */ + #include #include #include - #include #include #include - #include -static u32 iop331_mask0 = 0; -static u32 iop331_mask1 = 0; +static u32 iop33x_mask0; +static u32 iop33x_mask1; -static inline void intctl_write0(u32 val) +static inline void intctl0_write(u32 val) { - // INTCTL0 iop3xx_cp6_enable(); - asm volatile("mcr p6,0,%0,c0,c0,0"::"r" (val)); + asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); iop3xx_cp6_disable(); } -static inline void intctl_write1(u32 val) +static inline void intctl1_write(u32 val) { - // INTCTL1 iop3xx_cp6_enable(); - asm volatile("mcr p6,0,%0,c1,c0,0"::"r" (val)); + asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val)); iop3xx_cp6_disable(); } -static inline void intstr_write0(u32 val) +static inline void intstr0_write(u32 val) { - // INTSTR0 iop3xx_cp6_enable(); - asm volatile("mcr p6,0,%0,c2,c0,0"::"r" (val)); + asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val)); iop3xx_cp6_disable(); } -static inline void intstr_write1(u32 val) +static inline void intstr1_write(u32 val) { - // INTSTR1 iop3xx_cp6_enable(); - asm volatile("mcr p6,0,%0,c3,c0,0"::"r" (val)); + asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val)); iop3xx_cp6_disable(); } @@ -72,65 +65,63 @@ static inline void intsize_write(u32 val) } static void -iop331_irq_mask1 (unsigned int irq) +iop33x_irq_mask1 (unsigned int irq) { - iop331_mask0 &= ~(1 << irq); - intctl_write0(iop331_mask0); + iop33x_mask0 &= ~(1 << irq); + intctl0_write(iop33x_mask0); } static void -iop331_irq_mask2 (unsigned int irq) +iop33x_irq_mask2 (unsigned int irq) { - iop331_mask1 &= ~(1 << (irq - 32)); - intctl_write1(iop331_mask1); + iop33x_mask1 &= ~(1 << (irq - 32)); + intctl1_write(iop33x_mask1); } static void -iop331_irq_unmask1(unsigned int irq) +iop33x_irq_unmask1(unsigned int irq) { - iop331_mask0 |= (1 << irq); - intctl_write0(iop331_mask0); + iop33x_mask0 |= 1 << irq; + intctl0_write(iop33x_mask0); } static void -iop331_irq_unmask2(unsigned int irq) +iop33x_irq_unmask2(unsigned int irq) { - iop331_mask1 |= (1 << (irq - 32)); - intctl_write1(iop331_mask1); + iop33x_mask1 |= (1 << (irq - 32)); + intctl1_write(iop33x_mask1); } -struct irq_chip iop331_irqchip1 = { - .name = "IOP-1", - .ack = iop331_irq_mask1, - .mask = iop331_irq_mask1, - .unmask = iop331_irq_unmask1, +struct irq_chip iop33x_irqchip1 = { + .name = "IOP33x-1", + .ack = iop33x_irq_mask1, + .mask = iop33x_irq_mask1, + .unmask = iop33x_irq_unmask1, }; -struct irq_chip iop331_irqchip2 = { - .name = "IOP-2", - .ack = iop331_irq_mask2, - .mask = iop331_irq_mask2, - .unmask = iop331_irq_unmask2, +struct irq_chip iop33x_irqchip2 = { + .name = "IOP33x-2", + .ack = iop33x_irq_mask2, + .mask = iop33x_irq_mask2, + .unmask = iop33x_irq_unmask2, }; -void __init iop331_init_irq(void) +void __init iop33x_init_irq(void) { - unsigned int i; + int i; - intctl_write0(0); // disable all interrupts - intctl_write1(0); - intstr_write0(0); // treat all as IRQ - intstr_write1(0); + intctl0_write(0); + intctl1_write(0); + intstr0_write(0); + intstr1_write(0); intbase_write(0); intsize_write(1); - if(machine_is_iq80331()) // all interrupts are inputs to chip + if (machine_is_iq80331()) *IOP3XX_PCIIRSR = 0x0f; - for(i = 0; i < NR_IRQS; i++) - { - set_irq_chip(i, (i < 32) ? &iop331_irqchip1 : &iop331_irqchip2); + for (i = 0; i < NR_IRQS; i++) { + set_irq_chip(i, (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2); set_irq_handler(i, do_level_IRQ); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } - diff --git a/arch/arm/mach-iop33x/uart.c b/arch/arm/mach-iop33x/uart.c index d221d4abaa87..ac297cd0276c 100644 --- a/arch/arm/mach-iop33x/uart.c +++ b/arch/arm/mach-iop33x/uart.c @@ -1,5 +1,5 @@ /* - * linux/arch/arm/mach-iop33x/uart.c + * arch/arm/mach-iop33x/uart.c * * Author: Dave Jiang (dave.jiang@intel.com) * Copyright (C) 2004 Intel Corporation. @@ -17,7 +17,6 @@ #include #include #include - #include #include #include @@ -30,14 +29,14 @@ #include #include -#define IOP331_UART_XTAL 33334000 +#define IOP33X_UART_XTAL 33334000 static struct plat_serial8250_port iop33x_uart0_data[] = { { - .membase = (char *)IOP331_UART0_VIRT, - .mapbase = IOP331_UART0_PHYS, - .irq = IRQ_IOP331_UART0, - .uartclk = IOP331_UART_XTAL, + .membase = (char *)IOP33X_UART0_VIRT, + .mapbase = IOP33X_UART0_PHYS, + .irq = IRQ_IOP33X_UART0, + .uartclk = IOP33X_UART_XTAL, .regshift = 2, .iotype = UPIO_MEM, .flags = UPF_SKIP_TEST, @@ -47,13 +46,13 @@ static struct plat_serial8250_port iop33x_uart0_data[] = { static struct resource iop33x_uart0_resources[] = { [0] = { - .start = IOP331_UART0_PHYS, - .end = IOP331_UART0_PHYS + 0x3f, + .start = IOP33X_UART0_PHYS, + .end = IOP33X_UART0_PHYS + 0x3f, .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_IOP331_UART0, - .end = IRQ_IOP331_UART0, + .start = IRQ_IOP33X_UART0, + .end = IRQ_IOP33X_UART0, .flags = IORESOURCE_IRQ, }, }; @@ -71,23 +70,23 @@ struct platform_device iop33x_uart0_device = { static struct resource iop33x_uart1_resources[] = { [0] = { - .start = IOP331_UART1_PHYS, - .end = IOP331_UART1_PHYS + 0x3f, + .start = IOP33X_UART1_PHYS, + .end = IOP33X_UART1_PHYS + 0x3f, .flags = IORESOURCE_MEM, }, [1] = { - .start = IRQ_IOP331_UART1, - .end = IRQ_IOP331_UART1, + .start = IRQ_IOP33X_UART1, + .end = IRQ_IOP33X_UART1, .flags = IORESOURCE_IRQ, }, }; static struct plat_serial8250_port iop33x_uart1_data[] = { { - .membase = (char *)IOP331_UART1_VIRT, - .mapbase = IOP331_UART1_PHYS, - .irq = IRQ_IOP331_UART1, - .uartclk = IOP331_UART_XTAL, + .membase = (char *)IOP33X_UART1_VIRT, + .mapbase = IOP33X_UART1_PHYS, + .irq = IRQ_IOP33X_UART1, + .uartclk = IOP33X_UART_XTAL, .regshift = 2, .iotype = UPIO_MEM, .flags = UPF_SKIP_TEST, -- cgit v1.2.2