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* [PARISC] pdcpat remove extra bracketsMariusz Kozlowski2006-12-08
| | | | | | | This patch removes extra brackets. Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
* [PARISC] Reserve 1GB of space for vmalloc/tmpalias space on parisc64Kyle McMartin2006-12-08
| | | | Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
* [PARISC] Fix ccio_request_resource when CONFIG_IOMMU_CCIO is not definedRyan Bradetich2006-12-08
| | | | | | | | | This patch fixes the ccio_request_resource to work properly when the CONFIG_IOMMU_CCIO is not defined. This patch was tested on my E35. Signed-off-by: Ryan Bradetich <rbrad@parisc-linux.org> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
* Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2006-12-07
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (76 commits) [ARM] 4002/1: S3C24XX: leave parent IRQs unmasked [ARM] 4001/1: S3C24XX: shorten reboot time [ARM] 3983/2: remove unused argument to __bug() [ARM] 4000/1: Osiris: add third serial port in [ARM] 3999/1: RX3715: suspend to RAM support [ARM] 3998/1: VR1000: LED platform devices [ARM] 3995/1: iop13xx: add iop13xx support [ARM] 3968/1: iop13xx: add iop13xx_defconfig [ARM] Update mach-types [ARM] Allow gcc to optimise arm_add_memory a little more [ARM] 3991/1: i.MX/MX1 high resolution time source [ARM] 3990/1: i.MX/MX1 more precise PLL decode [ARM] 3986/1: H1940: suspend to RAM support [ARM] 3985/1: ixp4xx clocksource cleanup [ARM] 3984/1: ixp4xx/nslu2: Fix disk LED numbering (take 2) [ARM] 3994/1: ixp23xx: fix handling of pci master aborts [ARM] 3981/1: sched_clock for PXA2xx [ARM] 3980/1: extend the ARM Versatile sched_clock implementation from 32 to 63 bit [ARM] 3979/1: extend the SA11x0 sched_clock implementation from 32 to 63 bit period [ARM] 3978/1: macro to provide a 63-bit value from a 32-bit hardware counter ...
| *-------. [ARM] Merge individual ARM sub-treesRussell King2006-12-07
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge: Atmel AT91RM9200 and AT91SAM9260 changes General ARM developments Disconfiguous memory cleanups 64-bit/32-bit division and sched_clock extension patches EP93xx support changes IOP support changes Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * [ARM] 3995/1: iop13xx: add iop13xx supportDan Williams2006-12-07
| | |_|_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The iop348 processor integrates an Xscale (XSC3 512KB L2 Cache) core with a Serial Attached SCSI (SAS) controller, multi-ported DDR2 memory controller, 3 Application Direct Memory Access (DMA) controllers, a 133Mhz PCI-X interface, a x8 PCI-Express interface, and other peripherals to form a system-on-a-chip RAID subsystem engine. The iop342 processor replaces the SAS controller with a second Xscale core for dual core embedded applications. The iop341 processor is the single core version of iop342. This patch supports the two Intel customer reference platforms iq81340mc for external storage and iq81340sc for direct attach (HBA) development. The developer's manual is available here: ftp://download.intel.com/design/iio/docs/31503701.pdf Changelog: * removed virtual addresses from resource definitions * cleaned up some unnecessary #include's Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * [ARM] 3978/1: macro to provide a 63-bit value from a 32-bit hardware counterNicolas Pitre2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is done in a completely lockless fashion. Bits 0 to 31 of the count are provided by the hardware while bits 32 to 62 are stored in memory. The top bit in memory is used to synchronize with the hardware count half-period. When the top bit of both counters (hardware and in memory) differ then the memory is updated with a new value, incrementing it when the hardware counter wraps around. Because a word store in memory is atomic then the incremented value will always be in synch with the top bit indicating to any potential concurrent reader if the value in memory is up to date or not wrt the needed increment. And any race in updating the value in memory is harmless as the same value would be stored more than once. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * [ARM] 3611/4: optimize do_div() when divisor is constantNicolas Pitre2006-12-07
| | |_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On ARM all divisions have to be performed "manually". For 64-bit divisions that may take more than a hundred cycles in many cases. With 32-bit divisions gcc already use the recyprocal of constant divisors to perform a multiplication, but not with 64-bit divisions. Since the kernel is increasingly relying upon 64-bit divisions it is worth optimizing at least those cases where the divisor is a constant. This is what this patch does using plain C code that gets optimized away at compile time. For example, despite the amount of added C code, do_div(x, 10000) now produces the following assembly code (where x is assigned to r0-r1): adr r4, .L0 ldmia r4, {r4-r5} umull r2, r3, r4, r0 mov r2, #0 umlal r3, r2, r5, r0 umlal r3, r2, r4, r1 mov r3, #0 umlal r2, r3, r5, r1 mov r0, r2, lsr #11 orr r0, r0, r3, lsl #21 mov r1, r3, lsr #11 ... .L0: .word 948328779 .word 879609302 which is the fastest that can be done for any value of x in that case, many times faster than the __do_div64 code (except for the small x value space for which the result ends up being zero or a single bit). The fact that this code is generated inline produces a tiny increase in .text size, but not significant compared to the needed code around each __do_div64 call site this code is replacing. The algorithm used has been validated on a 16-bit scale for all possible values, and then recodified for 64-bit values. Furthermore I've been running it with the final BUG_ON() uncommented for over two months now with no problem. Note that this new code is compiled with gcc versions 4.0 or later. Earlier gcc versions proved themselves too problematic and only the original code is used with them. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * [ARM] Clean up discontigmem supportRussell King2006-11-30
| | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most architectures have fairly simple discontiguous memory - a simple set of successive regions each containing some memory. These can be described simply as a log2 of their maximum size, along with the base address of the first region and the number of regions. The base address is already described by PHYS_PFN_OFFSET, and the number of regions via the MAX_NUMNODES and the number of online nodes. If we then supply the log2 of their maximum size, all the other discontigmem macros can move into generic code. There is one exception: lh7a40x seems to have a more complicated setup; this is left alone. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 4001/1: S3C24XX: shorten reboot timeBen Dooks2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cut down the time between requesting a reboot and actually getting the reboot to happen by a quarter. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3983/2: remove unused argument to __bug()Nicolas Pitre2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It appears that include/asm-arm/bug.h requires include/linux/stddef.h for the definition of NULL. It seems that stddef.h was always included indirectly in most cases, and that issue was properly fixed a while ago. Then commit 5047f09b56d0bc3c21aec9cb16de60283da645c6 incorrectly reverted change from commit ff10952a547dad934d9ed9afc5cf579ed1ccb53a (bad dwmw2) and the problem recently resurfaced. Because the third argument to __bug() is never used anyway, RMK suggested getting rid of it entirely instead of readding #include <linux/stddef.h> which this patch does. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3991/1: i.MX/MX1 high resolution time sourcePavel Pisa2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enhanced resolution for time measurement functions. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3986/1: H1940: suspend to RAM supportBen Dooks2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support to suspend and resume, using the H1940's bootloader Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3984/1: ixp4xx/nslu2: Fix disk LED numbering (take 2)Rod Whitby2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes an error in the numbering of the disk LEDs on the Linksys NSLU2. The error crept in because the physical location of the LEDs has the Disk 2 LED *above* the Disk 1 LED. Thanks to Gordon Farquharson for reporting this. Signed-off-by: Rod Whitby <rod@whitby.id.au> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3881/4: xscale: clean up cp0/cp1 handlingLennert Buytenhek2006-12-03
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XScale cores either have a DSP coprocessor (which contains a single 40 bit accumulator register), or an iWMMXt coprocessor (which contains eight 64 bit registers.) Because of the small amount of state in the DSP coprocessor, access to the DSP coprocessor (CP0) is always enabled, and DSP context switching is done unconditionally on every task switch. Access to the iWMMXt coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is first issued, and iWMMXt context switching is done lazily. CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will have iWMMXt support', but boards are supposed to select this config symbol by hand, and at least one pxa27x board doesn't get this right, so on that board, proc-xscale.S will incorrectly assume that we have a DSP coprocessor, enable CP0 on boot, and we will then only save the first iWMMXt register (wR0) on context switches, which is Bad. This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on might have iWMMXt support, and we will enable iWMMXt context switching if it does.' This means that with this patch, running a CONFIG_IWMMXT=n kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt state over context switches, and running a CONFIG_IWMMXT=y kernel on a non-iWMMXt capable CPU will still do DSP context save/restore. These changes should make iWMMXt work on PXA3xx, and as a side effect, enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined), as well as setting and using HWCAP_IWMMXT properly. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3971/1: xsc3: get rid of L_PTE_COHERENTLennert Buytenhek2006-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge L_PTE_COHERENT with L_PTE_SHARED and free up a L_PTE_* bit. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3958/1: add platform device (pxa2xx-udc)to ixp4xxMilan Svoboda2006-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create include/asm-arm/arch-ixp4xx/udc.h and add platfrom device ixp4xx_udc_device into arch/arm/mach-ixp4xx/common.c. This allows us to use pxa2xx-udc on the ixp4xx platfrom. Both pxa2xx and ixp4xx use the same device controller. Signed-off-by:Milan Svoboda <msvoboda@ra.rockwell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3911/2: Simplify alloc_thread_info on ARMPaul Gortmaker2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove ARM local cache of 4 struct thread_info. Can cause oops under certain circumstances. Russell indicated the original optimization was required on older kernels to avoid thread starvation on memory fragmentation, but may no longer be required. I've updated the patch to 19rc4 and ensured no <config.h> dain-bramage slipped in this time (sorry about that). Original description follows: I was given some test results which pointed to an Oops in alloc_thread_info (happened 2x), and after looking at the code, I see that ARM has its own local cache of 4 struct thread_info. There wasn't any clear (to me) synchronization between the alloc_thread_info and the free_thread_info. I looked over the other arch, and they all simply allocate them on an as needed basis, so I simplified the ARM to do the same, based on the other arch (e.g. PPC) and the folks doing the testing have indicated that this fixed the oops. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Remove "translated" io macrosRussell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "translated" io macros were never really used. Remove them. Preserve the L7200 inb() and friends by defining the __io() macro, so that the generic versions can be used instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Remove warnings for __io_pci and __arch_(get|put)*Russell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the last definitions of this macros have been removed, we can remove the warnings in asm/io.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] L7200: Remove deprecated __io_pci and __arch_(get|put)*Russell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions have been deprecated for quite some time, and in fact are no longer used. They just add to clutter. Remove them. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Fix nommu buildRussell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix warnings and errors in arch/arm/mm for nommu build. Remove commented out function prototype in pgtable-nommu.h Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3936/1: [Jornada7xx] - No use for jornada720.hKristoffer Ericson2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * We don't need this header anymore - there is no data we need to share this way. FB driver gets this data through a resources structure. MCU Driver api will go to a jornada720_mcu.h file. Signed-off-by: Filip Zyzniewski <filip.zyzniewski@tefnet.pl> Signed-off-by: Kristoffer Ericson <Kristoffer_e1@hotmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Remove compatibility layer for ARM irqsRussell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | set_irq_chipdata -> set_irq_chip_data get_irq_chipdata -> get_irq_chip_data do_level_IRQ -> handle_level_irq do_edge_IRQ -> handle_edge_irq do_simple_IRQ -> handle_simple_irq irqdesc -> irq_desc irqchip -> irq_chip Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3894/1: pxa27x: Update DCSR_EORINTR bit definition in DCSRstanley cai2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates a bit definition name to align with the PXA27x spec.EORINTR(End-Of-Receive Intr) bit in DCSR register (DMA Channel Control/Status Register) Signed-off-by: Stanley Cai <stanley.w.cai@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3893/1: pxa27x: Update UDCISR1 bit definitionsstanley cai2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates several bit definitions name in UDCISR1 register. Signed-off-by: Stanley Cai <stanley.w.cai@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Move HWCAP_* definitions to asm/elf.hRussell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move HWCAP_* definitions into asm/elf.h, where they should belong. Since userspace wants to get at these definitions by including asm/procinfo.h, include asm/elf.h from this file if __KERNEL__ is not defined, and issue a warning suggesting to fix the program up to use asm/elf.h instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Include asm/elf.h instead of asm/procinfo.hRussell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These files want to provide/access ELF hwcap information, so should be including asm/elf.h rather than asm/procinfo.h Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Arrange asm-arm/elf.h so it can be included by assemblyRussell King2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | Prepare elf.h so that assembly code can include this file. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Remove EEPROM slave emulation from i2c-pxa driver.Russell King2006-11-30
| | |/ | |/| | | | | | | | | | | | | | | | | | | The i2c-pxa driver should not contain EEPROM slave-mode emulation; this is something the platform should provide where required. Remove it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3977/1: AT91: remove loop waiting for resetAndrew Victor2006-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Removed the infinite loop in our arch_reset(). After calling arch_reset(), the kernel waits for 1 second before printing a "reboot failed" message and then waits for ever itself. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3974/1: AT91: Remove USB Device headerAndrew Victor2006-12-04
| | | | | | | | | | | | | | | | | | | | | | | | The USB Device port registers are already defined in drivers/usb/gadget/at91_udc.h. This file can therefore just be removed. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3972/1: AT91: Update board.hAndrew Victor2006-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the 'is_b' variable with 'slot_b' in at91_mmc_data. Also add the new 'chipselect' variable for CF/PCMCIA and 'bus_width_16' variable for NAND. This (and previous patches) will unfortunately break the current MMC, USB Gadget and PCMCIA drivers. Updates and fixes for those drivers will be submitted to the various subsystem maintainers. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3960/1: AT91: Final SAM9 intergration patches.Andrew Victor2006-12-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch includes a number of small changes for integrating the AT91SAM9261 and AT91SAM0260 support. * Can only select support for one AT91 processor at a time. * Remove most of the remaining static memory mapping for the AT91RM9200. * Reserve 1Mb of memory below the IO for mapping the internal SRAM and any custom board-specific devices (ie, FPGA). * The SAM9260 has more serial ports, so increase the maximum to 7. * Define the standard chipselect addresses, and define other addresses relative to those. * CLOCK_TICK_RATE is different on the SAM926x's. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3949/2: AT91: SAM9 timer driverAndrew Victor2006-12-01
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the timer on the Atmel AT91SAM9261 and AT91SAM9260 processors. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3952/1: AT91: Hardware headers for SAM9 perhipheralsAndrew Victor2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds definitions for the new peripherals integrated in the AT91SAM9260 and AT91SAM9261 processors: ECC, LCD, RSTC, RTT, SHDWC, WDT, MATRIX, SDRAMC, SMC. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3954/1: AT91: Update drivers for new headersAndrew Victor2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the drivers (and other files) which include the hardware headers. This fixes the breakage introduced in patches 3950/1 and 3951/1 (those patches were getting big). The AVR32 architecture uses the same serial driver and had its own copy of at91rm9200_pdc.h. Renamed it to at91_pdc.h Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3951/1: AT91: Rename user peripheral header filesAndrew Victor2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the AT91RM9200 user peripherals are also integrated into the Atmel SAM9 range of processors. This patch renames the headers from at91rm9200_xx.h to at91_xx.h to indicate they're not at91rm9200-specific. The new SAM9-specific registers and register bits have also been defined. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3950/1: AT91: Split up system header fileAndrew Victor2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AT91RM9200 system header file (at91rm9200_sys.h) has been split into separate header files for each peripheral. This was necessary since some of the system peripherals are also used on AT91SAM9260 and AT91SAM9261. The new SAM9-specific register bits have also been defined. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3948/1: AT91: Initial support for AT91SAM9261 and AT91SAM9260Andrew Victor2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the initial support for the newer Atmel AT91SAM9261 and AT91SAM9260 processors. The code is based on, and makes use of, the existing AT91RM9200 support. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3947/1: AT91: cpu_is_XXX macro'sAndrew Victor2006-11-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces the arch_identify() in system.h with a set of cpu_is_XXX() macro's. This allows for compile-time checking of the target AT91 processor. Original patch from David Brownell. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3946/1: AT91: at91_arch_reset and at91_extern_irqAndrew Victor2006-11-30
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The external interrupt sources are different on the various AT91 processors. This patch introduces the global 'at91_extern_irq' variable that contains a bitset of the available external interrupt sources. The processor reset mechanism also differs on the various AT91 processors. This patch also adds a global 'at91_arch_reset' callback (from system.h) into the processor-specific code to perform the reset. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'release' of ↵Linus Torvalds2006-12-07
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] replace kmalloc+memset with kzalloc [IA64] resolve name clash by renaming is_available_memory() [IA64] Need export for csum_ipv6_magic [IA64] Fix DISCONTIGMEM without VIRTUAL_MEM_MAP [PATCH] Add support for type argument in PAL_GET_PSTATE [IA64] tidy up return value of ip_fast_csum [IA64] implement csum_ipv6_magic for ia64. [IA64] More Itanium PAL spec updates [IA64] Update processor_info features [IA64] Add se bit to Processor State Parameter structure [IA64] Add dp bit to cache and bus check structs [IA64] SN: Correctly update smp_affinty mask [IA64] sparse cleanups [IA64] IA64 Kexec/kdump
| * | [IA64] Fix DISCONTIGMEM without VIRTUAL_MEM_MAPMatthew Wilcox2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | make allnoconfig currently fails to build because it selects DISCONTIGMEM without VIRTUAL_MEM_MAP. I see no particular reason this combination ought to fail, so I fixed it by: - Including memory_model.h in all circumstances, except when both DISCONTIGMEM and VIRTUAL_MEM_MAP are enabled. - Defining ia64_pfn_valid() to 1 unless VIRTUAL_MEM_MAP is enabled Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [PATCH] Add support for type argument in PAL_GET_PSTATEVenkatesh Pallipadi2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PAL_GET_PSTATE accepts a type argument to return different kinds of frequency information. Refer: Intel Itanium®Architecture Software Developer's Manual - Volume 2: System Architecture, Revision 2.2 (http://developer.intel.com/design/itanium/manuals/245318.htm) Add the support for type argument and use Instantaneous frequency in the acpi driver. Also fix a bug, where in return value of PAL_GET_PSTATE was getting compared with 'control' bits instead of 'status' bits. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] implement csum_ipv6_magic for ia64.Chen, Kenneth W2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | The asm version is 4.4 times faster than the generic C version and 10X smaller in code size. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] More Itanium PAL spec updatesRuss Anderson2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Additional updates to conform with Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's Manual" (January 2006). Add pal_bus_features_s bits 52 & 53 (page 2:347) Add pal_vm_info_2_s field max_purges (page 2:2:451) Add PAL_GET_HW_POLICY call (page 2:381) Add PAL_SET_HW_POLICY call (page 2:439) Sample output before: --------------------------------------------------------------------- cobra:~ # cat /proc/pal/cpu0/vm_info Physical Address Space : 50 bits Virtual Address Space : 61 bits Protection Key Registers(PKR) : 16 Implemented bits in PKR.key : 24 Hash Tag ID : 0x2 Size of RR.rid : 24 Supported memory attributes : WB, UC, UCE, WC, NaTPage --------------------------------------------------------------------- Sample output after: --------------------------------------------------------------------- cobra:~ # cat /proc/pal/cpu0/vm_info Physical Address Space : 50 bits Virtual Address Space : 61 bits Protection Key Registers(PKR) : 16 Implemented bits in PKR.key : 24 Hash Tag ID : 0x2 Max Purges : 1 Size of RR.rid : 24 Supported memory attributes : WB, UC, UCE, WC, NaTPage --------------------------------------------------------------------- Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Add se bit to Processor State Parameter structureRuss Anderson2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's Manual" (January 2006) adds a se bit to the Processor State Parameter fields (pages 2:299). This patch gets the structs back in sync with the spec. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Add dp bit to cache and bus check structsRuss Anderson2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's Manual" (January 2006) adds a dp bit to the cache_check and bus_check fields (pages 2:401-2:404). This patch gets the structs back in sync with the spec. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] IA64 Kexec/kdumpZou Nan hai2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes and updates. 1. Remove fake rendz path and related code according to discuss with Khalid Aziz. 2. fc.i offset fix in relocate_kernel.S. 3. iospic shutdown code eoi and mask race fix from Fujitsu. 4. Warm boot hook in machine_kexec to SN SAL code from Jack Steiner. 5. Send slave to SAL slave loop patch from Jay Lan. 6. Kdump on non-recoverable MCA event patch from Jay Lan 7. Use CTL_UNNUMBERED in kdump_on_init sysctl. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 07:52:22 -0500