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* USB: add power/persist device attributeAlan Stern2007-07-12
| | | | | | | | | | | | | | | | | | | | | This patch (as920) adds an extra level of protection to the USB-Persist facility. Now it will apply by default only to hubs; for all other devices the user must enable it explicitly by setting the power/persist device attribute. The disconnect_all_children() routine in hub.c has been removed and its code placed inline. This is the way it was originally as part of hub_pre_reset(); the revised usage in hub_reset_resume() is sufficiently different that the code can no longer be shared. Likewise, mark_children_for_reset() is now inline as part of hub_reset_resume(). The end result looks much cleaner than before. The sysfs interface is updated to add the new attribute file, and there are corresponding documentation updates. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: add reset_resume methodAlan Stern2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch (as918) introduces a new USB driver method: reset_resume. It is called when a device needs to be reset as part of a resume procedure (whether because of a device quirk or because of the USB-Persist facility), thereby taking over a role formerly assigned to the post_reset method. As a consequence, post_reset no longer needs an argument indicating whether it is being called as part of a reset-resume. This separation of functions makes the code clearer. In addition, the pre_reset and post_reset method return types are changed; they now must return an error code. The return value is unused at present, but at some later time we may unbind drivers and re-probe if they encounter an error during reset handling. The existing pre_reset and post_reset methods in the usbhid, usb-storage, and hub drivers are updated to match the new requirements. For usbhid the post_reset routine is also used for reset_resume (duplicate method pointers); for the other drivers a new reset_resume routine is added. The change to hub.c looks bigger than it really is, because mark_children_for_reset_resume() gets moved down next to the new hub_reset_resume() routine. A minor change to usb-storage makes the usb_stor_report_bus_reset() routine acquire the host lock instead of requiring the caller to hold it already. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Jiri Kosina <jkosina@suse.cz> CC: Matthew Dharm <mdharm-usb@one-eyed-alien.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: introduce usb_anchorOliver Neukum2007-07-12
| | | | | | | | - introduction of usb_anchor and its methods Signed-off-by: Oliver Neukum <oneukum@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: export <linux/usb_gadgetfs> as <linux/usb/gadgetfs.h>David Brownell2007-07-12
| | | | | | | | | | | | | | | Make sure gadgetfs userspace interface is properly exported: - Move <linux/usb_gadgetfs.h> to <linux/usb/gadgetfs.h>; - Export it using Kbuild; - Add an #include guard; - Correct some internal documentation; - Update struct layout so it's the same on 32/64 bit kernels. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: add USB_DEVICE_AND_INTERFACE_INFO for device matchingDaniel Drake2007-07-12
| | | | | | | | | | | | | | Recently, the USB device matching code stopped matching generic interface matches against devices with vendor-specific device class values. Some drivers now need to explicitly match USB device ID's (in addition to generic interface info) to retain the same behaviour as before. This new macro, suggested by Alan Stern, makes the explicit device/interface matching a little simpler for those users. Signed-off-by: Daniel Drake <dsd@gentoo.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: add RESET_RESUME device quirkAlan Stern2007-07-12
| | | | | | | | | | | | This patch (as888) adds a new USB device quirk for devices which are unable to resume correctly. By using the new code added for the USB-persist facility, it is a simple matter to reset these devices instead of resuming them. To get things kicked off, a quirk entry is added for the Philips PSC805. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: add USB-Persist facilityAlan Stern2007-07-12
| | | | | | | | | | | | | | | | | This patch (as886) adds the controversial USB-persist facility, allowing USB devices to persist across a power loss during system suspend. The facility is controlled by a new Kconfig option (with appropriate warnings about the potential dangers); when the option is off the behavior will remain the same as it is now. But when the option is on, people will be able to use suspend-to-disk and keep their USB filesystems intact -- something particularly valuable for small machines where the root filesystem is on a USB device! Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* USB: suspend support for usb serialOliver Neukum2007-07-12
| | | | | | | | this implements generic support for suspend/resume for usb serial. Signed-off-by: Oliver Neukum <oneukum@suse.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2007-07-12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (50 commits) [ARM] sa1100: remove boot time RTC initialisation [ARM] sa1100: stop doing our own rtc management over suspend [ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regs [ARM] 4473/2: Take the HWCAP definitions out of the elf.h file [ARM] pxa: move platform devices to separate header file [ARM] pxa: move device registration into CPU-specific file [ARM] pxa: remove boot time RTC initialisation [ARM] pxa: stop doing our own rtc management over suspend [ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma code [ARM] 4450/1: pxa: add pxa25x_init_irq() and pxa27x_init_irq() [ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQs [ARM] 4438/1: PXA: remove #ifdef .. #endif from pxa_gpio_demux_handler() [ARM] 4437/1: PXA: move the GPIO IRQ initialization code to pxa_init_irq_gpio() [ARM] 4436/1: PXA: move low IRQ initialization code to pxa_init_irq_low() [ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQS [ARM] 4434/1: PXA: remove PXA_IRQ_SKIP [ARM] pxa: Fix PXA27x suspend type validation, remove pxa_pm_prepare() [ARM] pxa: move pm_ops structure into CPU specific files [ARM] pxa: introduce cpu_is_pxaXXX macros [ARM] pxa: remove MMC register defines from pxa-regs.h ...
| *-----------. Merge branches 'at91', 'davinci', 'imx', 'iop', 'ixp', 'ks8695', 'misc', ↵Russell King2007-07-12
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | 'pxa' and 's3c' into devel
| | | | | | | | * [ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma codeEric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the number of dma channels varies between pxa25x and pxa27x, it introduces some specific code in dma.c. This patch moves the specific code to pxa25x.c and pxa27x.c and makes dma.c more generic. 1. add pxa_init_dma() for dma initialization, the number of channels are passed in by the argument 2. add a "prio" field to the "struct pxa_dma_channel" for the channel priority, and is initialized in pxa_init_dma() 3. use a general priority comparison with the channels "prio" field so to remove the processor specific pxa_for_each_dma_prio macro, this is not lightning fast as the original one, but it is acceptable as it happens when requesting dma, which is usually not so performance critical Signed-off-by: eric miao <eric.miao@marvell.com> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * [ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQsEric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ICIP2 is not examined during IRQ entrance, this patch add the checking if the processor is PXA27x or later, with CoreG bits in CPUID (Core Generation) > 1 Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * [ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQSEric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs, and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants 2. make the code specific to the high IRQ numbers (32..64) to be PXA27x specific 3. add a function pxa_init_irq_high() to initialize the internal high IRQ chip, the invoke of this function could be moved to PXA27x specific initialization code Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * [ARM] 4434/1: PXA: remove PXA_IRQ_SKIPEric Miao2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ starts from zero. This makes IRQ numbering inconsistent between PXA25x and PXA27x. Remove this macro so that the same IRQ_XXXXX definition has the same value on both PXA25x and PXA27x. 2. make IRQ_SSP3..IRQ_PWRI2C valid only if PXA27x is defined, this avoids unintentional use of these macros on PXA25x Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * [ARM] pxa: introduce cpu_is_pxaXXX macrosRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * [ARM] pxa: remove MMC register defines from pxa-regs.hRussell King2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pxamci.h redefines the MMC registers differently so they can be used with ioremap. Remove the incompatible definitions from pxa-regs.h. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | | * [ARM] pxa: remove useless pxa_pm_finish() functionRussell King2007-07-12
| | | | | |_|_|/ | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pxa_pm_finish() does nothing but return zero. The core code does nothing with this return value, and will not try to call the finish method in the pm_ops structure if it is NULL. Therefore, we can remove this useless function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * [ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regsCatalin Marinas2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running Linux in non-secure mode (on ARM1176 for example), depending on the CP15 secure configuration register, the CPSR.F bit (6) might only be modified from the secure mode. However, the valid_user_regs() function checks for this bit being cleared. With commit a6c61e9d, a SIGSEGV is forced in handle_signal() if the user registers are not considered valid. The patch also ensures that the CPSR.A bit is cleared and the USR mode is set if the CPU does not support the 26bit user mode. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * [ARM] 4473/2: Take the HWCAP definitions out of the elf.h fileCatalin Marinas2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch moves the HWCAP definitions and the extern elf_hwcap declaration to the hwcap.h header file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | | * [ARM] 4453/1: Fully Decode ARM instruction set state in show_regs() tombstoneGeorge G. Davis2007-07-12
| | | | | |_|/ | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM show_regs() tombstone only partially decodes which ARM ISA was executing at the time a fault occurred displaying either "(T)" for the Thumb case or nothing at all for other cases. This patch therefore explicitly identifies which state the processor is in at the time of a fault: ARM, Thumb, Jazelle or JazelleEE. Signed-off-by: George G. Davis <gdavis@mvista.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * [ARM] 4377/1: KS8695: GPIO driverAndrew Victor2007-07-12
| | | | | |/ | | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver to control the GPIO pins on the KS8695 processor. The driver natively supports the Generic GPIO interface. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * [ARM] 4426/2: Netgear WG302 v2 and WAG302 v2 supportImre Kaloz2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support for the Netgear WG302 v2 and WAG302 v2 AccessPoint series. This patch relies on the patch "Gateway 7001 series support" minimally, as they only have UART2 connected. Updated to stay below the 80 char limit in uncompress.h Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Deepak Saxena <dsaxena@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * [ARM] 4425/2: Gateway 7001 series supportImre Kaloz2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support for the Gateway 7001 AccessPoint series. Updated to stay below the 80 char limit in uncompress.h Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Deepak Saxena <dsaxena@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * [ARM] 4385/2: ixdp425: NAND supportVladimir Barinov2007-07-12
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | IXDP425 NAND support (arch specific part). The generic platform driver that is used by ixdp425 platfrom is already in upstream kernel in 2.6.22-rc1. Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Signed-off-by: Ruslan Sushko <rsushko@ru.mvista.com> Signed-off-by: Deepak Saxena <dsaxena@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * / [ARM] 4373/1: i.MX/MX1 GPIO support implementationPavel Pisa2007-07-12
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for generic input output for MX1 family. The implementation prevents allocation of one pin by two users, but does not store pointer to the user description permanently, because this solution would have bigger memory overhead. The simple way to integrate code with per BSP pins setup and allocation is required else all GPIO registration checking is useless. The function imx_gpio_setup_multiple_pins() can be used for this purpose in future. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | [ARM] 4432/5: davinci: pin mux supportVladimir Barinov2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support pin multiplexing configurations driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Acked-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | [ARM] 4457/2: davinci: GPIO supportVladimir Barinov2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support GPIO driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov <vbarino@ru.mvista.com> Acked-by: David Brownell <david-b@pacbell.net> Acked-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | [ARM] 4430/1: davinci: clock control supportVladimir Barinov2007-07-12
| | |/ | | | | | | | | | | | | | | | | | | | | | Support clock control driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov <vbarinov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4428/1: modify at91 includes to handle non-MMU at91x40 familyGreg Ungerer2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the common at91 hardware support to deal with the non-MMU at91x40 family. The base RAM (which is most likely not DRAM) is set to the configured value. Virtual IO device mapping is set to be 1 to 1 with the physical addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4427/1: base Atmel at91x40 architecture definesGreg Ungerer2007-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Base at91x40 architecture support defines. These parts are somewhat simpler than the ARM9 Atmel based parts. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4391/1: make at91 debug unit support optionalGreg Ungerer2007-07-12
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The AT91x40 family doesn't have the debug unit like its bigger brothers. But it does have the ID and extension registers (with the bit meanings the same). Reorganize at91_dbgu.h to cater for this. This also affects the load uncompressor, since it outputs to the debug port. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'for-linus' of ↵Linus Torvalds2007-07-12
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/selinux-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/selinux-2.6: security: unexport mmap_min_addr SELinux: use SECINITSID_NETMSG instead of SECINITSID_UNLABELED for NetLabel security: Protection for exploiting null dereference using mmap SELinux: Use %lu for inode->i_no when printing avc SELinux: allow preemption between transition permission checks selinux: introduce schedule points in policydb_destroy() selinux: add selinuxfs structure for object class discovery selinux: change sel_make_dir() to specify inode counter. selinux: rename sel_remove_bools() for more general usage. selinux: add support for querying object classes and permissions from the running policy
| * | security: Protection for exploiting null dereference using mmapEric Paris2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new security check on mmap operations to see if the user is attempting to mmap to low area of the address space. The amount of space protected is indicated by the new proc tunable /proc/sys/vm/mmap_min_addr and defaults to 0, preserving existing behavior. This patch uses a new SELinux security class "memprotect." Policy already contains a number of allow rules like a_t self:process * (unconfined_t being one of them) which mean that putting this check in the process class (its best current fit) would make it useless as all user processes, which we also want to protect against, would be allowed. By taking the memprotect name of the new class it will also make it possible for us to move some of the other memory protect permissions out of 'process' and into the new class next time we bump the policy version number (which I also think is a good future idea) Acked-by: Stephen Smalley <sds@tycho.nsa.gov> Acked-by: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Eric Paris <eparis@redhat.com> Signed-off-by: James Morris <jmorris@namei.org>
* | | Merge branch 'release' of ↵Linus Torvalds2007-07-12
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] Support multiple CPUs going through OS_MCA [IA64] silence GCC ia64 unused variable warnings [IA64] prevent MCA when performing MMIO mmap to PCI config space [IA64] add sn_register_pmi_handler oemcall [IA64] Stop bit for brl instruction [IA64] SN: Correct ROM resource length for BIOS copy [IA64] Don't set psr.ic and psr.i simultaneously
| * | | [IA64] Support multiple CPUs going through OS_MCARuss Anderson2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux does not gracefully deal with multiple processors going through OS_MCA aa part of the same MCA event. The first cpu into OS_MCA grabs the ia64_mca_serialize lock. Subsequent cpus wait for that lock, preventing them from reporting in as rendezvoused. The first cpu waits 5 seconds then complains that all the cpus have not rendezvoused. The first cpu then handles its MCA and frees up all the rendezvoused cpus and releases the ia64_mca_serialize lock. One of the subsequent cpus going thought OS_MCA then gets the ia64_mca_serialize lock, waits another 5 seconds and then complains that none of the other cpus have rendezvoused. This patch allows multiple CPUs to gracefully go through OS_MCA. The first CPU into ia64_mca_handler() grabs a mca_count lock. Subsequent CPUs into ia64_mca_handler() are added to a list of cpus that need to go through OS_MCA (a bit set in mca_cpu), and report in as rendezvoused, and but spin waiting their turn. The first CPU sees everyone rendezvous, handles his MCA, wakes up one of the other CPUs waiting to process their MCA (by clearing one mca_cpu bit), and then waits for the other cpus to complete their MCA handling. The next CPU handles his MCA and the process repeats until all the CPUs have handled their MCA. When the last CPU has handled it's MCA, it sets monarch_cpu to -1, releasing all the CPUs. In testing this works more reliably and faster. Thanks to Keith Owens for suggesting numerous improvements to this code. Signed-off-by: Russ Anderson <rja@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | [IA64] add sn_register_pmi_handler oemcallDean Nelson2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add wrapper function to make SN_SAL_REGISTER_PMI_HANDLER ia64_sal_oemcall. Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | | [IA64] SN: Correct ROM resource length for BIOS copyJohn Keller2007-07-09
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | On SN systems, when setting the IORESOURCE_ROM_BIOS_COPY resource flag, the resource length should be set to the actual size of the ROM image so that a call to pci_map_rom() returns the correct size. Signed-off-by: John Keller <jpk@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6Linus Torvalds2007-07-12
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (34 commits) PCI: Only build PCI syscalls on architectures that want them PCI: limit pci_get_bus_and_slot to domain 0 PCI: hotplug: acpiphp: avoid acpiphp "cannot get bridge info" PCI hotplug failure PCI: hotplug: acpiphp: remove hot plug parameter write to PCI host bridge PCI: hotplug: acpiphp: fix slot poweroff problem on systems without _PS3 PCI: hotplug: pciehp: wait for 1 second after power off slot PCI: pci_set_power_state(): check for PM capabilities earlier PCI: cpci_hotplug: Convert to use the kthread API PCI: add pci_try_set_mwi PCI: pcie: remove SPIN_LOCK_UNLOCKED PCI: ROUND_UP macro cleanup in drivers/pci PCI: remove pci_dac_dma_... APIs PCI: pci-x-pci-express-read-control-interfaces cleanups PCI: Fix typo in include/linux/pci.h PCI: pci_ids, remove double or more empty lines PCI: pci_ids, add atheros and 3com_2 vendors PCI: pci_ids, reorder some entries PCI: i386: traps, change VENDOR to DEVICE PCI: ATM: lanai, change VENDOR to DEVICE PCI: Change all drivers to use pci_device->revision ...
| * | | PCI: add pci_try_set_mwiRandy Dunlap2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As suggested by Andrew, add pci_try_set_mwi(), which does not require return-value checking. - add pci_try_set_mwi() without __must_check - make it return 0 on success, errno if the "try" failed or error - review callers Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | | PCI: remove pci_dac_dma_... APIsJan Beulich2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on replies to a respective query, remove the pci_dac_dma_...() APIs (except for pci_dac_dma_supported() on Alpha, where this function is used in non-DAC PCI DMA code). Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Cc: Jesse Barnes <jesse.barnes@intel.com> Cc: Christoph Hellwig <hch@infradead.org> Acked-by: David Miller <davem@davemloft.net> Cc: Jeff Garzik <jeff@garzik.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | | PCI: Fix typo in include/linux/pci.hRolf Eike Beer2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Rolf Eike Beer <eike-kernel@sf-tec.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | | PCI: pci_ids, remove double or more empty linesJiri Slaby2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_ids, remove two or more empty lines Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | | PCI: pci_ids, add atheros and 3com_2 vendorsJiri Slaby2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_ids, add atheros and 3com_2 vendors Atheros is wifi vendor. 3com_2 (0xa727) is an vendor id for one card with ath chip. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | | PCI: pci_ids, reorder some entriesJiri Slaby2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_ids, reorder some entries Some lines are not vendor sorted, reorder it to comply with the rest of document. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | | PCI: i386: traps, change VENDOR to DEVICEJiri Slaby2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | traps, change VENDOR to DEVICE Change macro for SGI lithium (arch/i386/mach-visws/traps.c) device from VENDOR to DEVICE, because it's a device id. Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | | PCI: ATM: lanai, change VENDOR to DEVICEJiri Slaby2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lanai, change VENDOR to DEVICE There were 2 bad named macros in pci_ids (LANAI 2 and IHB). Rename it to DEVICE, because it's device id. Also make some cleanpu in pci_device_id table (use PCI_VDEVICE). Cc: Mitchell Blank Jr <mitch@sfgoth.com> Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | | PCI: read revision ID by defaultAuke Kok2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are 97 occurrences where drivers need the pci revision ID. We can do this once for all devices. Even the pci subsystem needs the revision several times for quirks. The extra u8 member pads out nicely in the pci_dev struct. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | | PCI: remove useless pci driver methodDavid Brownell2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove pointless and never-called enable_wake() hook from pci_driver and from documentation. Evidently this was introduced in the 2.4.6 kernel, but there's no evidence it was ever called; and it was rarely implemented. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | | PCI aer: add pci_cleanup_aer_correct_aer_statusStephen Hemminger2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Function to clear bogus correctable errors. Analog to pci_aer_uncorrect_are_status. The Marvell chips seem to start out with a bogus value that needs to be cleared. Yanmin ported it to 2.6.22-rc4 by fixing a fuzz patch applying info. Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org> Acked-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * | | PCI aer: fix stub return valuesStephen Hemminger2007-07-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The stubs used when advanced error reporting is not enabled must have same return type as real functions. Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org> Acked-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-17 07:54:23 -0500