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* Merge the easy part of the IOP branchRussell King2007-02-18
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| * [ARM] 4184/1: iop: cp6 access handler (undef_hook)Dan Williams2007-02-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable svc access to cp6 via an undefined instruction hook. Do not enable access for usr code. This patch also makes iop13xx select PLAT_IOP, this requires a small change to drivers/i2c/busses/i2c-iop3xx.c. Per Lennert Buytenhek's note, the cp6 trap routine is moved to arch/arm/plat-iop Per Nicolas Pitre's note, the cp_wait is skipped since the latency to return to the faulting function is longer than cp_wait. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] 4182/1: iop3xx: fix the ioremap implementation to not remap static rangesDan Williams2007-02-14
| | | | | | | | | | | | | | | | | | | | Implement a custom ioremap implementation for iop3xx. This saves establishing new mappings. It also cleans up the PCI IO resource to be a physical address rather than a virtual address as Russell pointed out on the original iop13xx port. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge NetSilicon NS93xx treeRussell King2007-02-18
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | Fixed conflicts: arch/arm/Makefile arch/arm/mm/Kconfig Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4210/1: base for new machine type "NetSilicon NS9360"Uwe Kleine-König2007-02-17
| |/ | | | | | | | | Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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*---------. | Merge AT91, EP93xx, General devel, PXA, S3C, V6+ and Xscale treesRussell King2007-02-17
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| | | | | * | [ARM] 4130/1: Add L220 support to RealView/EBCatalin Marinas2007-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the L220 on the RealView/EB MPCore platform. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | Merge Realview GIC codeRussell King2007-02-15
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| | | | | | * | [ARM] 4109/2: Add support for the RealView/EB MPCore revC platformCatalin Marinas2007-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel originally supported revB only. This patch enables revC by default and adds a config option for building the kernel for the revB platform. Since the SCU base address was hard-coded in the proc-v6.S file (and only valid for RealView/EB revB), this patch also adds a more generic support for defining the SCU information. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | [ARM] 4190/2: Add the secondary GIC support for the RealView/EBCatalin Marinas2007-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPCore platform This patch adds the registration of the secondary GIC on the baseboard, together with the IRQ chaining setup. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | | * | [ARM] 4108/2: Allow multiple GIC interrupt controllers in a systemCatalin Marinas2007-02-15
| | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation only assumes one GIC to be present in the system. However, there are platforms with more than one cascaded interrupt controllers (RealView/EB MPCore for example). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4135/1: Add support for the L210/L220 cache controllersCatalin Marinas2007-02-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the support for the L210/L220 (outer) cache controller. The cache range operations are done by index/way since L2 cache controller only accepts physical addresses. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] Convert DMA cache handling to take const void * argsRussell King2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA cache handling functions take virtual addresses, but in the form of unsigned long arguments. This leads to a little confusion about what exactly they take. So, convert them to take const void * instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4134/1: Add generic support for outer cachesCatalin Marinas2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The outer cache can be L2 as on RealView/EB MPCore platform or even L3 or further on ARMv7 cores. This patch adds the generic support for flushing the outer cache in the DMA operations. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4133/1: Add ISB after changes to CP15 registersCatalin Marinas2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to ARM ARM, changes to the CP15 registers are only guaranteed to be visible after an Instruction Synchronization Barrier (ISB). This patch adds the ISB at the end of set_cr and set_copro_access functions and also moves them further down in the file, below the isb macro definition. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4129/1: Add barriers after the TLB operationsCatalin Marinas2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The architecture specification states that TLB operations are guaranteed to be complete only after the execution of a DSB (Data Synchronisation Barrier, former Data Write Barrier or Drain Write Buffer). The branch target cache invalidation is also needed. The ISB (Instruction Synchronisation Barrier, formerly Prefetch Flush) is needed unless there will be a return from exception before the corresponding mapping is used (i.e. user mappings). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4127/1: Flush the prefetch buffer after changing the DACRCatalin Marinas2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM Architecture Reference Manual specifies that a prefetch flush is needed after changing the DACR register (chapter B2.7.6). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | | * | [ARM] 4126/1: Add the ARM specific barriersCatalin Marinas2007-02-08
| | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are three barriers - ISB, DMB and DSB for different scenarious. This patch adds their definitions in the system.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4220/1: S3C24XX: DMA system initialised from sysdevBen Dooks2007-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch gets the DMA system for the S3C24XX ready for the S3C2443, which requires 6 dma channels at a different stride, and different base IRQ. The DMA system is now initialised from the same drivers which apply the DMA mappings, as well as removing the DMA sysdev intialisation out of the main init code (which is now being called from a sysdev probe, so cannot add a new sysdev) Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4219/1: S3C2443: DMA source definitionsBen Dooks2007-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Defines for the S3C2443 DMA source selection, and update the maximum channels to 6 if the S3C2443 is selected. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4215/1: s3c2410 usb device: per-platform vbus_drawArnaud Patard2007-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a platform_device (machine) specific callback function which gets called when the amount of power we can draw from Vbus has changed. Signed-off-by: Harald Welte <laforge@openmoko.org> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4213/1: S3C2410 - Update definition of ADCTSC_XY_PSTArnaud Patard2007-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update S3C2410_ADCTSC_XY_PST macro to allow setting the ADCTSC_XY_PST bits. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4205/1: S3C2443: Add cpu specific reset hookBen Dooks2007-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Hook in a cpu specific reset function for the S3C2443 Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4204/1: S3C24XX: add hook to specify cpu resetBen Dooks2007-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add hook code to specify cpu specific reset call Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4198/2: S3C2443: arch/arm/mach-s3c2443 and related supportBen Dooks2007-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add arch/arm/mach-s3c2443 for support of the Samsung S3C2443 SoC This patch adds the core CPU support, clock framework, times and initial IRQ support, as well as adding the directory into the build tree. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4197/1: S3C2443: IRQ number updatesBen Dooks2007-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update IRQ numbers for S3C2443 Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4196/1: S3C24XX: add S3C2410_IRQSUB() to define IRQ for sub-sourcesBen Dooks2007-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a define of S3C2410_IRQSUB() to define all the sources from the IRQSUB register, to make it easier to work out the datasheet=>irq mappings Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4195/1: S3C2443: include/asm-arm/arch-s3c2410/regs-serial.h updatesBen Dooks2007-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates for regs-serial.h for S3C2443 Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4194/1: S3C2443: include/asm-arm/arch-s3c2410/regs-gpio.h updatesBen Dooks2007-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates for regs-gpio.h for S3C2443 Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4193/1: S3C2443: clock register definitionsBen Dooks2007-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clock register definitions for the S3C2443 Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4177/1: S3C24XX: Add DMA channel allocation orderBen Dooks2007-02-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow the CPU code, and any board specific initialisation code to change the allocation order of the DMA channels, or stop a peripheral allocating any DMA at-all. This is due to the scarce mapping of DMA channels on some earlier S3C24XX cpus, where the selection changes depending on the channel in use. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4173/1: S3C24XX usb device platform datasArnaud Patard2007-02-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is adding the functions and structures used for handling the S3C24XX udc driver platform datas. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4168/1: S3C24XX: use defines instead of numbersMatt Reimer2007-02-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use defines instead of numbers. Signed-off-by: Matt Reimer <mreimer@vpop.net> Acked-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | | * | [ARM] 4157/2: S3C24XX: move arch/arch/mach-s3c2410 into cpu componentsBen Dooks2007-02-11
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following patch and script moves the arch/arm/mach-s3c2410 directory into arch/arm/plat-s3c24xx for the generic core code and inti arch/arm/mach-s3c{cpu} for the cpu/machine support files Include directory include/asm-arm/plat-s3c24xx is added for the core include files. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 4152/1: Add PXA SSP audio register defs and fixupsLiam Girdwood2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patchs adds some missing register bit defs for the PXA SSP ports audio registers and fixes up some other broken bit definitions as noticed by Russell. Signed-off-by: Liam Girdwood <liam.girdwood@wolfsonmicro.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * | [ARM] 4141/1: consolidate functions that handles gpio in pxa2xx_udcMilan Svoboda2007-02-08
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch renames pxa_gpio_set/get functions defined in drivers/usb/gadget/pxa2xx_udc.h to udc_gpio_set/get. These functions are moved from drivers/usb/gadget/pxa2xx_udc.h to include/asm-arm/arch-pxa2xx/udc.h Creates new functions: udc_gpio_to_irq, udc_gpio_init_vbus, udc_gpio_init_pullup in include/asm-arm/arch-pxa2xx/udc.h. These functions are used in drivers/usb/gadget/pxa2xx_udc.c instead of direct low-level (pxa2xx only) functions. Creates all these udc_gpio_* functions in include/asm-arm/arch-ixp4xx/udc.h. This implementation has no real code because ixp4xx doesn't use vbus - only vbus uses all these gpio functions (and because ixp4xx misses any function which converts number of gpio pin into it's irq). This is next step to make pxa2xx_udc fully work on ixp4xx platform. Signed-off-by: Milan Svoboda <msvoboda@ra.rockwell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | [ARM] 4122/1: ep93xx: add support for GPIO port F interruptsLennert Buytenhek2007-02-08
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | [ARM] 4120/1: ep93xx: make clock init an arch_initcall()Lennert Buytenhek2007-02-08
| | |/ | | | | | | | | | | | | Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] at91: correct value for AT91_RSTC_KEYJan Altenberg2007-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Remove a duplicated define for AT91_RSTC_KEY - Set AT91_RSTC_KEY to the correct value - Replace the hardcoded keys in at91sam9620.c and at91sam9261.c by AT91_RSTC_KEY Signed-off-by: Jan Altenberg <jan@linutronix.de> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4192/1: AT91: Support for AT91SAM9XE processors.Andrew Victor2007-02-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Atmel AT91SAM9XE range of processors. These are basically AT91SAM9260's with different amounts of internal SRAM and Flash. We make use of the existing AT91SAM9260 support, but just perform run-time detection of the size of the internal SRAM. Original patch from Nicolas Ferre. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4151/1: AT91 / AVR32: Move at91_pdc.h to linux/atmel_pdc.hAndrew Victor2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Atmel AT91 and AVR32 processor architectures share many of the same peripherals. The PDC (Peripheral Data Controller) registers are also implemented within in a number of the on-chip peripherals (eg, USART, MMC, SPI, SSC, etc). In a attempt not to duplicate the register definitions in each peripheral, or in each architecture, the at91_pdc.h header in asm-arm/arch-at91 and asm-avr32/arch-at32ap has been replaced with linux/atmel_pdc.h. The definitions have also been renamed from AT91_PDC_* to ATMEL_PDC_*, and the drivers updated accordingly. Original patch from Nicolas Ferre. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4145/2: AT91: Add support for AT91SAM9263 processorAndrew Victor2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Atmel AT91SAM9263 processor. It is similar to the AT91SAM9260 but with more integrated peripherals, 5 GPIO banks, etc. Original patch from Nicolas Ferre. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4143/1: AT91: Prepare for AT91SAM9263 supportAndrew Victor2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Atmel AT91SAM9263 processor includes many more integrated peripherals than Atmel's previous ARM9-based AT91 processors, so this has necessitated a few changes to the core AT91 support. These changes are: * The system peripheral I/O region we remap has increased from 0xFFFA0000..0xFFFFFFFF to 0xFFF78000..0xFFFFFFFF. * The increased I/O region forces changes to entry-macro.S and debug-macro.S due to ARM's limited immediate offset addressing modes. * Maximum number of GPIO banks increases to 5. * 2 MMC controllers so the board-setup code needs to specify which controller it wishes to use when calling at91_add_device_mmc(). Original patch from Nicolas Ferre. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4124/1: Rename mach-at91rm9200 and arch-at91rm9200 directoriesAndrew Victor2007-02-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that Linux includes support for the Atmel AT91SAM9260 and AT91SAM9261 processors in addition to the original Atmel AT91RM9200 (with support for more AT91 processors pending), the "mach-at91rm9200" and "arch-at91rm9200" directories should be renamed to indicate their more generic nature. The following git commands should be run BEFORE applying this patch: git-mv arch/arm/mach-at91rm9200 arch/arm/mach-at91 git-mv include/asm-arm/arch-at91rm9200 include/asm-arm/arch-at91 Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | [ARM] 4119/1: AT91: Fix build of AT91SAM9260Andrew Victor2007-02-08
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix build failure of AT91SAM9260. The AT91RM9200 ethernet driver (at91_ether.c) stores platform data in a "struct at91_eth_data" structure, but the AT91SAM9260 (and AT91SAM9263) ethernet driver (macb.c) [developed on the AVR32 architecture] expects a "struct eth_platform_data". Since the platform data of the two drivers is very similar, we continue to use the "struct at91_eth_data" for all AT91 processors but add a #define eth_platform_data at91_eth_data in board.h to keep the MACB driver happy. Original patch by Jan Altenberg. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 4090/2: avoid clash between PXA and SA1111 definesNicolas Pitre2007-02-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Lubbock platform uses both a PXA25x and a SA1111 at the same time. Both chips have the same "Serial Audio Controller" registers although the SA1111 one is never expected to be used in preference to the PXA25x one. So let's disable the SA1111 defines whenever compilation is for a PXA architecture and make the PXA defines always defined. This removes a bunch of "already defined" warnings as well since the current hack to prevent them depended on include ordering which wasn't always right. While at it, clean up the SA1111 defines allowing to get rid of the __CCREG() macro. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 4216/1: add .gitignore entries for ARM specific filesNicolas Pitre2007-02-17
| | | | | | | | | | Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 4137/1: Add kexec supportRichard Purdie2007-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add kexec support to ARM. Improvements like commandline handling could be made but this patch gives basic functional support. It uses the next available syscall number, 347. Once the syscall number is known, userspace support will be finalised/submitted to kexec-tools, various patches already exist. Originally based on a patch by Maxim Syrchin but updated and forward ported by various people. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] 4171/1: i.MX/MX1 optimize interrupt source retrievalPavel Pisa2007-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | The macro "get_irqnr_and_base" in "entry-macro.S" optimized according to Lennert Buytenhek suggestion. Comments from Pavel Pisa: Sascha has approved patch some days ago Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | [ARM] Provide dummy noncoherent DMA APIRussell King2007-02-12
| | | | | | | | | | | | | | We don't currently support the noncoherent DMA API, but it needs to be provided for kernels with devres to link. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>