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* [PATCH] htirq: tidy up the htirq codeEric W. Biederman2006-10-04
| | | | | | | | | | | | | | | | | | | | | | This moves the declarations for the architecture helpers into include/linux/htirq.h from the generic include/linux/pci.h. Hopefully this will make this distinction clearer. htirq.h is included where it is needed. The dependency on the msi code is fixed and removed. The Makefile is tidied up. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Tony Luck <tony.luck@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Greg KH <greg@kroah.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] msi: refactor and move the msi irq_chip into the arch codeEric W. Biederman2006-10-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | It turns out msi_ops was simply not enough to abstract the architecture specific details of msi. So I have moved the resposibility of constructing the struct irq_chip to the architectures, and have two architecture specific functions arch_setup_msi_irq, and arch_teardown_msi_irq. For simple architectures those functions can do all of the work. For architectures with platform dependencies they can call into the appropriate platform code. With this msi.c is finally free of assuming you have an apic, and this actually takes less code. The helpers for the architecture specific code are declared in the linux/msi.h to keep them separate from the msi functions used by drivers in linux/pci.h Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Tony Luck <tony.luck@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Greg KH <greg@kroah.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Initial generic hypertransport interrupt supportEric W. Biederman2006-10-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements two functions ht_create_irq and ht_destroy_irq for use by drivers. Several other functions are implemented as helpers for arch specific irq_chip handlers. The driver for the card I tested this on isn't yet ready to be merged. However this code is and hypertransport irqs are in use in a few other places in the kernel. Not that any of this will get merged before 2.6.19 Because the ipath-ht400 is slightly out of spec this code will need to be generalized to work there. I think all of the powerpc uses are for a plain interrupt controller in a chipset so support for native hypertransport devices is a little less interesting. However I think this is a half way decent model on how to separate arch specific and generic helper code, and I think this is a functional model of how to get the architecture dependencies out of the msi code. [akpm@osdl.org: Kconfig fix] Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Greg KH <greg@kroah.com> Cc: Andi Kleen <ak@muc.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] genirq: msi: refactor the msi_opsEric W. Biederman2006-10-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current msi_ops are short sighted in a number of ways, this patch attempts to fix the glaring deficiences. - Report in msi_ops if a 64bit address is needed in the msi message, so we can fail 32bit only msi structures. - Send and receive a full struct msi_msg in both setup and target. This is a little cleaner and allows for architectures that need to modify the data to retarget the msi interrupt to a different cpu. - In target pass in the full cpu mask instead of just the first cpu in case we can make use of the full cpu mask. - Operate in terms of irqs and not vectors, currently there is still a 1-1 relationship but on architectures other than ia64 I expect this will change. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rajesh Shah <rajesh.shah@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] genirq: msi: implement helper functions read_msi_msg and write_msi_msgEric W. Biederman2006-10-04
| | | | | | | | | | | | | | | | | | | | In support of this I also add a struct msi_msg that captures the the two address and one data field ina typical msi message, and I remember the pos and if the address is 64bit in struct msi_desc. This makes the code a little more readable and easier to maintain, and paves the way to further simplfications. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rajesh Shah <rajesh.shah@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PCI quirks updateAlan Cox2006-10-01
| | | | | | | | | | | | | | | | | | | | | | | This fixes two things Firstly someone mistakenly used "errata" for the singular. This causes Dave Woodhouse to emit diagnostics whenever the string is read, and so should be fixed. Secondly the AMD AGP tunnel has an erratum which causes hangs if you try and do direct PCI to AGP transfers in some cases. We have a flag for PCI/PCI failures but we need a different flag for this really as in this case we don't want to stop PCI/PCI transfers using things like IOAT and the new RAID offload work. I'll post some updates to make proper use of the PCIAGP flag in the media/video drivers to Mauro. Signed-off-by: Alan Cox <alan@redhat.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* PCI: add pci_stop_bus_deviceSatoru Takeuchi2006-09-26
| | | | | | | | | | | | | | This patch adds pci_stop_bus_device() which stops a PCI device (detach the driver, remove from the global list and so on) and any children. This is needed for ACPI based PCI-to-PCI bridge hot-remove, and it will be also needed for ACPI based PCI root bridge hot-remove. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: MUNEDA Takahiro <muneda.takahiro@jp.fujitsu.com> Signed-off-by: Satoru Takeuchi <takeuchi_satoru@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Multiprobe sanitizerAlan Cox2006-09-26
| | | | | | | | | | | | | | | | | | | | | | There are numerous drivers that can use multithreaded probing but having some kind of global flag as the way to control this makes migration to threaded probing hard and since it enables it everywhere and is almost as likely to cause serious pain as holding a clog dance in a minefield. If we have a pci_driver multithread_probe flag to inherit you can turn it on for one driver at a time. From playing so far however I think we need a different model at the device layer which serializes until the called probe function says "ok you can start another one now". That would need some kind of flag and semaphore plus a helper function. Anyway in the absence of that this is a starting point to usefully play with this stuff Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: fix __must_check warningsGreg Kroah-Hartman2006-09-26
| | | | | Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* add __must_check to device management codeAndrew Morton2006-09-26
| | | | | | | | | | | | | | | | | We're getting a lot of crashes in the sysfs/kobject/device/bus/class code and they're very hard to diagnose. I'm suspecting that in some cases this is because drivers aren't checking return values and aren't handling errors correctly. So the code blithely blunders on and crashes later in very obscure ways. There's just no reason to ignore errors which can and do occur. So the patch sprinkles __must_check all over these APIs. Causes 1,513 new warnings. Heh. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PM: no suspend_prepare() phaseDavid Brownell2006-09-26
| | | | | | | | | | | | Remove the new suspend_prepare() phase. It doesn't seem very usable, has never been tested, doesn't address fault cleanup, and would need a sibling resume_complete(); plus there are no real use cases. It could be restored later if those issues get resolved. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: Linus Torvalds <torvalds@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Suspend changes for PCI coreLinus Torvalds2006-09-26
| | | | | | | | Changes the PCI core to use the new suspend infrastructure changes. Signed-off-by: Linus Torvalds <torvalds@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: PCIE power management quirkKristen Carlson Accardi2006-07-12
| | | | | | | | | | | | | | | | | | | | When changing power states from D0->DX and then from DX->D0, some Intel PCIE chipsets will cause a device reset to occur. This will cause problems for any D State other than D3, since any state information that the driver will expect to be present coming from a D1 or D2 state will have been cleared. This patch addes a flag to the pci_dev structure to indicate that devices should not use states D1 or D2, and will set that flag for the affected chipsets. This patch also modifies pci_set_power_state() so that when a device driver tries to set the power state on a device that is downstream from an affected chipset, or on one of the affected devices it only allows state changes to or from D0 & D3. In addition, this patch allows the delay time between D3->D0 to be changed via a quirk. These chipsets also need additional time to change states beyond the normal 10ms. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] 64bit resource: change pci core and arch code to use resource_size_tGreg Kroah-Hartman2006-06-27
| | | | | | | | Based on a patch series originally from Vivek Goyal <vgoyal@in.ibm.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: disable msi mode in pci_disable_deviceShaohua Li2006-06-21
| | | | | | | | | | | | | | | Brice said the pci_save_msi_state breaks his driver in his special usage (not in suspend/resume), as pci_save_msi_state will disable msi mode. In his usage, pci_save_state will be called at runtime, and later (after the device operates for some time and has an error) pci_restore_state will be called. In another hand, suspend/resume needs disable msi mode, as device should stop working completely. This patch try to workaround this issue. Drivers are expected call pci_disable_device in suspend time after pci_save_state. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI Bus Parity Status-broken hardware attribute, EDAC foundationDoug Thompson2006-06-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the EDAC (error detection and correction) modules that are in the kernel contain some features that need to be moved. After some good feedback on the PCI Parity detection code and interface (http://www.ussg.iu.edu/hypermail/linux/kernel/0603.1/0897.html) this patch ADDs an new attribute to the pci_dev structure: Namely the 'broken_parity_status' bit. When set this indicates that the respective hardware generates false positives of Parity errors. The EDAC "blacklist" solution was inferior and will be removed in a future patch. Also in this patch is a PCI quirk.c entry for an Infiniband PCI-X card which generates false positive parity errors. I am requesting comments on this AND on the possibility of a exposing this 'broken_parity_status' bit to userland via the PCI device sysfs directory for devices. This access would allow for enabling of this feature on new devices and for old devices that have their drivers updated. (SLES 9 SP3 did this on an ATI motherboard video device). There is a need to update such a PCI attribute between kernel releases. This patch just adds a storage place for the attribute and a quirk entry for a known bad PCI device. PCI Parity reaper/harvestor operations are in EDAC itself and will be refactored to use this PCI attribute instead of its own mechanisms (which are currently disabled) in the future. Signed-off-by: Doug Thompson <norsk5@xmission.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Add pci_assign_resource_fixed -- allow fixed address assignmentsKumar Gala2006-06-21
| | | | | | | | | | | | | | | | | | PCI: Add pci_assign_resource_fixed -- allow fixed address assignments On some embedded systems the PCI address for hotplug devices are not only known a priori but are required to be at a given PCI address for other master in the system to be able to access. An example of such a system would be an FPGA which is setup from user space after the system has booted. The FPGA may be access by DSPs in the system and those DSPs expect the FPGA at a fixed PCI address. Added pci_assign_resource_fixed() as a way to allow assignment of the PCI devices's BARs at fixed PCI addresses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* Merge git://git.infradead.org/hdrcleanup-2.6Linus Torvalds2006-06-20
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.infradead.org/hdrcleanup-2.6: (63 commits) [S390] __FD_foo definitions. Switch to __s32 types in joystick.h instead of C99 types for consistency. Add <sys/types.h> to headers included for userspace in <linux/input.h> Move inclusion of <linux/compat.h> out of user scope in asm-x86_64/mtrr.h Remove struct fddi_statistics from user view in <linux/if_fddi.h> Move user-visible parts of drivers/s390/crypto/z90crypt.h to include/asm-s390 Revert include/media changes: Mauro says those ioctls are only used in-kernel(!) Include <linux/types.h> and use __uXX types in <linux/cramfs_fs.h> Use __uXX types in <linux/i2o_dev.h>, include <linux/ioctl.h> too Remove private struct dx_hash_info from public view in <linux/ext3_fs.h> Include <linux/types.h> and use __uXX types in <linux/affs_hardblocks.h> Use __uXX types in <linux/divert.h> for struct divert_blk et al. Use __u32 for elf_addr_t in <asm-powerpc/elf.h>, not u32. It's user-visible. Remove PPP_FCS from user view in <linux/ppp_defs.h>, remove __P mess entirely Use __uXX types in user-visible structures in <linux/nbd.h> Don't use 'u32' in user-visible struct ip_conntrack_old_tuple. Use __uXX types for S390 DASD volume label definitions which are user-visible S390 BIODASDREADCMB ioctl should use __u64 not u64 type. Remove unneeded inclusion of <linux/time.h> from <linux/ufs_fs.h> Fix private integer types used in V4L2 ioctls. ... Manually resolve conflict in include/linux/mtd/physmap.h
| * Don't include <linux/mod_devicetable.h> in public part of linux/pci.hDavid Woodhouse2006-04-28
| | | | | | | | Signed-off-by: David Woodhouse <dwmw2@infradead.org>
| * Don't include linux/config.h from anywhere else in include/David Woodhouse2006-04-26
| | | | | | | | Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* | [PATCH] Revive pci_find_ext_capabilityBrice Goglin2006-05-24
|/ | | | | | | | | | | | | | This patch revives pci_find_ext_capability (has been disabled a couple month ago since it was not used anywhere. See http://lkml.org/lkml/2006/1/20/247). It will now be used by the myri10ge driver. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Andrew J. Gallatin <gallatin@myri.com> drivers/pci/pci.c | 3 +-- include/linux/pci.h | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-) Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] PCI: fix sparse warning about pci_bus_flagsRoland Dreier2006-04-14
| | | | | | | | | | | | | Sparse warns about casting to a __bitwise type. However, it's correct to do when defining the enum for pci_bus_flags_t, so add a __force to quiet the warnings. This will fix getting include/linux/pci.h:100:26: warning: cast to restricted type from sparse all over the build. Signed-off-by: Roland Dreier <rolandd@cisco.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: MSI(X) save/restore for suspend/resumeShaohua Li2006-04-14
| | | | | | | Add MSI(X) configure sapce save/restore in generic PCI helper. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: fix pci_request_region[s] argJeff Garzik2006-03-23
| | | | | | | | Add missing 'const' to pci_request_region[s] 'res_name' arg, since we pass it directly to __request_region(), whose 'name' arg is also const. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: make MSI quirk inheritable from the pci busMichael S. Tsirkin2006-03-23
| | | | | | | | It turns out AMD 8131 quirk only affects MSI for devices behind the 8131 bridge. Handle this by adding a flags field in pci_bus, inherited from parent to child. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: return max reserved busnrKristen Accardi2006-03-23
| | | | | | | | Change the semantics of this call to return the max reserved bus number instead of just the max assigned bus number. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: drivers/pci/pci.c: #if 0 pci_find_ext_capability()Adrian Bunk2006-01-31
| | | | | | | This patch #if 0's the unused global function pci_find_ext_capability(). Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI Error Recovery: header file patchlinas2006-01-09
| | | | | | | | | | | | Various PCI bus errors can be signaled by newer PCI controllers. Recovering from those errors requires an infrastructure to notify affected device drivers of the error, and a way of walking through a reset sequence. This patch adds a set of callbacks to be used by error recovery routines to notify device drivers of the various stages of recovery. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Export pci_cfg_space_sizeBenjamin Herrenschmidt2006-01-09
| | | | | | | | | | The powerpc PCI code sets up the PCI tree without doing config space accesses in most cases, from the firmware tree. However, it still wants to call pci_cfg_space_size() under some conditions, thus it needs to be made non-static (though I don't see a point to export it to modules). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] pci: store PCI_INTERRUPT_PIN in pci_devKristen Accardi2006-01-09
| | | | | | | | Store the value of the INTERRUPT_PIN in the pci_dev structure so that it can be retrieved later. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: removed unneeded .owner field from struct pci_driverGreg Kroah-Hartman2005-11-10
| | | | Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: automatically set device_driver.ownerLaurent riffard2005-11-10
| | | | | | | | | | | | | | | | | | | | | | | A nice feature of sysfs is that it can create the symlink from the driver to the module that is contained in it. It requires that the device_driver.owner is set, what is not the case for many PCI drivers. This patch allows pci_register_driver to set automatically the device_driver.owner for any PCI driver. Credits to Al Viro who suggested the method. Signed-off-by: Laurent Riffard <laurent.riffard@free.fr> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> -- drivers/ide/setup-pci.c | 12 +++++++----- drivers/pci/pci-driver.c | 9 +++++---- include/linux/ide.h | 3 ++- include/linux/pci.h | 10 ++++++++-- 4 files changed, 22 insertions(+), 12 deletions(-)
* [PATCH] PCI: add pci_find_next_capability()Roland Dreier2005-11-10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices have more than one capability of the same type. For example, the PCI header for the PathScale InfiniPath looks like: 04:01.0 InfiniBand: Unknown device 1fc1:000d (rev 02) Subsystem: Unknown device 1fc1:000d Flags: bus master, fast devsel, latency 0, IRQ 193 Memory at fea00000 (64-bit, non-prefetchable) [size=2M] Capabilities: [c0] HyperTransport: Slave or Primary Interface Capabilities: [f8] HyperTransport: Interrupt Discovery and Configuration There are _two_ HyperTransport capabilities, and the PathScale driver wants to look at both of them. The current pci_find_capability() API doesn't work for this, since it only allows us to get to the first capability of a given type. The patch below introduces a new pci_find_next_capability(), which can be used in a loop like for (pos = pci_find_capability(pdev, <ID>); pos; pos = pci_find_next_capability(pdev, pos, <ID>)) { /* ... */ } Signed-off-by: Roland Dreier <rolandd@cisco.com> Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Block config access during BISTBrian King2005-10-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some PCI adapters (eg. ipr scsi adapters) have an exposure today in that they issue BIST to the adapter to reset the card. If, during the time it takes to complete BIST, userspace attempts to access PCI config space, the host bus bridge will master abort the access since the ipr adapter does not respond on the PCI bus for a brief period of time when running BIST. On PPC64 hardware, this master abort results in the host PCI bridge isolating that PCI device from the rest of the system, making the device unusable until Linux is rebooted. This patch is an attempt to close that exposure by introducing some blocking code in the PCI code. When blocked, writes will be humored and reads will return the cached value. Ben Herrenschmidt has also mentioned that he plans to use this in PPC power management. Signed-off-by: Brian King <brking@us.ibm.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/pci/access.c | 89 ++++++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/pci-sysfs.c | 20 +++++----- drivers/pci/pci.h | 7 +++ drivers/pci/proc.c | 28 +++++++-------- drivers/pci/syscall.c | 14 +++---- include/linux/pci.h | 7 +++ 6 files changed, 134 insertions(+), 31 deletions(-)
* Remove "must_check" attributes in PCI-landLinus Torvalds2005-09-09
| | | | | | | | Don't just irritate all other kernel developers. Fix the users first, then you can re-introduce the must-check infrastructure to avoid new cases creeping in. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6 Linus Torvalds2005-09-09
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| * [PATCH] PCI: Small rearrangement of PCI probing codePaul Mackerras2005-09-09
| | | | | | | | | | | | | | | | | | | | | | | | This patch makes some small rearrangements of the PCI probing code in order to make it possible for arch code to set up the PCI tree without needing to duplicate code from the PCI layer unnecessarily. PPC64 will use this to set up the PCI tree from the Open Firmware device tree, which we need to do on logically-partitioned pSeries systems. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] must_check attributes for PCI layer.Dave Jones2005-09-09
| | | | | | | | | | | | | | | | | | | | | | | | | | Self explanatory really. Some newer gcc's print a warning if a function is used and we don't check its result. We do this for a bunch of things in the kernel already, this extends that to the PCI layer. Based on a patch originally from Arjan van de Ven. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Arjan van de Ven <arjan@infradead.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | [PATCH] yenta: share code with PCI coreDominik Brodowski2005-09-09
|/ | | | | | | | | | | | Share code between setup-bus.c and yenta_socket.c: use the write-out code of resources to the bridge also in yenta_socket.c, as it provides useful debug output. In addition, it fixes the bug that the CPU-centric resource view might need to be transferred to the PCI-centric view: setup-bus.c does that, while yenta-socket.c did not. Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PCI/libata INTx cleanupBrett M Russ2005-09-08
| | | | | | | | | Simple cleanup to eliminate X copies of the pci_enable_intx() function in libata. Moved ahci.c's pci_intx() to pci.c and use it throughout libata and msi.c. Signed-off-by: Brett Russ <russb@emc.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Support PCM PM CAP version 3Daniel Ritz2005-09-08
| | | | | | | | | | | | | - support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2) - pci/probe.c sets the PM state initially to 4 which is D3cold. add a PCI_UNKNOWN - minor cleanups Signed-off-by: Daniel Ritz <daniel.ritz@gmx.ch> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Add pci_walk_bus function to PCI core (nonrecursive)Paul Mackerras2005-09-08
| | | | | | | | | | | | | | | | | | | | The PCI error recovery infrastructure needs to be able to contact all the drivers affected by a PCI error event, which may mean traversing all the devices under a given PCI-PCI bridge. This patch adds a function to the PCI core that traverses all the PCI devices on a PCI bus and under any PCI-PCI bridges on that bus (and so on), calling a given function for each device. This provides a way for the error recovery code to iterate through all devices that are affected by an error event. This version is not implemented as a recursive function. Instead, when we reach a PCI-PCI bridge, we set the pointers to start doing the devices on the bus under the bridge, and when we reach the end of a bus's devices, we use the bus->self pointer to go back up to the next higher bus and continue doing its devices. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: restore BAR values after D3hot->D0 for devices that need itJohn W. Linville2005-09-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration (including BARs) when transitioning from D3hot->D0. This leaves such a device in an inaccessible state. The patch below causes the BARs to be restored when enabling such a device, so that its driver will be able to access it. The patch also adds pci_restore_bars as a new global symbol, and adds a correpsonding EXPORT_SYMBOL_GPL for that. Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a (re)boot. Most drivers call pci_enable_device very early, so devices left in D3hot that lose configuration during the D3hot->D0 transition will be inaccessible to their drivers. Drivers could be modified to account for this, but it would be difficult to know which drivers need modification. This is especially true since often many devices are covered by the same driver. It likely would be necessary to replicate code across dozens of drivers. The patch below should trigger only when transitioning from D3hot->D0 (or at boot), and only for devices that have the "no soft reset" bit cleared in the PM control register. I believe it is safe to include this patch as part of the PCI infrastructure. The cleanest implementation of pci_restore_bars was to call pci_update_resource. Unfortunately, that does not currently exist for the sparc64 architecture. The patch below includes a null implemenation of pci_update_resource for sparc64. Some have expressed interest in making general use of the the pci_restore_bars function, so that has been exported to GPL licensed modules. Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: clean up pci.h and split pci register info to separate header file.Greg Kroah-Hartman2005-09-08
| | | | | | | | This cleans up some of the #ifdef CONFIG_PCI stuff up, and moves the pci register info out to a separate file, where it belongs. Eventually we can stop including this file from within pci.h, but lots of code needs to be audited first. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: remove CONFIG_PCI_NAMESAdrian Bunk2005-09-08
| | | | | | | This patch removes CONFIG_PCI_NAMES. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Move PCI fixup data into r/o sectionakpm@osdl.org2005-09-08
| | | | | | | | | | | Make PCI fixup data const, so it'll end up in a r/o section. This also fixes the conversion into ECOFF which gets broken by too many changes between r/w and r/o sections. Call it a hack but it's a change that's correct by itself. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: 6700/6702PXH quirkKristen Accardi2005-08-17
| | | | | | | | | | | | | On the 6700/6702 PXH part, a MSI may get corrupted if an ACPI hotplug driver and SHPC driver in MSI mode are used together. This patch will prevent MSI from being enabled for the SHPC as part of an early pci quirk, as well as on any pci device which sets the no_msi bit. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Revert "[PATCH] PCI: restore BAR values..."Linus Torvalds2005-08-08
| | | | | | | Revert commit fec59a711eef002d4ef9eb8de09dd0a26986eb77, which is breaking sparc64 that doesn't have a working pci_update_resource. We'll re-do this after 2.6.13 when we'll do it all properly.
* [PATCH] PCI: restore BAR values after D3hot->D0 for devices that need itJohn W. Linville2005-08-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration (including BARs) when transitioning from D3hot->D0. This leaves such a device in an inaccessible state. The patch below causes the BARs to be restored when enabling such a device, so that its driver will be able to access it. The patch also adds pci_restore_bars as a new global symbol, and adds a correpsonding EXPORT_SYMBOL_GPL for that. Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a (re)boot. Most drivers call pci_enable_device very early, so devices left in D3hot that lose configuration during the D3hot->D0 transition will be inaccessible to their drivers. Drivers could be modified to account for this, but it would be difficult to know which drivers need modification. This is especially true since often many devices are covered by the same driver. It likely would be necessary to replicate code across dozens of drivers. The patch below should trigger only when transitioning from D3hot->D0 (or at boot), and only for devices that have the "no soft reset" bit cleared in the PM control register. I believe it is safe to include this patch as part of the PCI infrastructure. The cleanest implementation of pci_restore_bars was to call pci_update_resource. Unfortunately, that does not currently exist for the sparc64 architecture. The patch below includes a null implemenation of pci_update_resource for sparc64. Some have expressed interest in making general use of the the pci_restore_bars function, so that has been exported to GPL licensed modules. Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PCI: fix up errors after dma bursting patch and CONFIG_PCI=n -- bug?Kumar Gala2005-07-29
| | | | | | | | | | | | | | In the patch from: http://www.uwsg.iu.edu/hypermail/linux/kernel/0506.3/0985.html Is the the following line suppose inside the if CONFIG_PCI=n #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0) Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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