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path: root/include/linux/mv643xx_eth.h
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* include: Convert ethernet mac address declarations to use ETH_ALENJoe Perches2013-08-02
| | | | | | | | | | | | It's convenient to have ethernet mac addresses use ETH_ALEN to be able to grep for them a bit easier and also to ensure that the addresses are __aligned(2). Add #include <linux/if_ether.h> as necessary. Signed-off-by: Joe Perches <joe@perches.com> Acked-by: Mauro Carvalho Chehab <m.chehab@samsung.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* net: mv643xx_eth: add phy_node to platform_data structSebastian Hesselbarth2013-05-30
| | | | | | | | This adds a struct device_node pointer for a phy passed by phandle to mv643xx_eth node. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* mv643xx_eth: convert to use the Marvell Orion MDIO driverFlorian Fainelli2013-03-22
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts the Marvell MV643XX ethernet driver to use the Marvell Orion MDIO driver. As a result, PowerPC and ARM platforms registering the Marvell MV643XX ethernet driver are also updated to register a Marvell Orion MDIO driver. This driver voluntarily overlaps with the Marvell Ethernet shared registers because it will use a subset of this shared register (shared_base + 0x4 to shared_base + 0x84). The Ethernet driver is also updated to look up for a PHY device using the Orion MDIO bus driver. For ARM and PowerPC we register a single instance of the "mvmdio" driver in the system like it used to be done with the use of the "shared_smi" platform_data cookie on ARM. Note that it is safe to register the mvmdio driver only for the "ge00" instance of the driver because this "ge00" interface is guaranteed to always be explicitely registered by consumers of arch/arm/plat-orion/common.c and other instances (ge01, ge10 and ge11) were all pointing their shared_smi to ge00. For PowerPC the in-tree Device Tree Source files mention only one MV643XX ethernet MAC instance so the MDIO bus driver is registered only when id == 0. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* ARM: Orion: Set eth packet size csum offload limitArnaud Patard (Rtp)2012-08-15
| | | | | | | | | | | | | | The mv643xx ethernet controller limits the packet size for the TX checksum offloading. This patch sets this limits for Kirkwood and Dove which have smaller limits that the default. As a side note, this patch is an updated version of a patch sent some years ago: http://lists.infradead.org/pipermail/linux-arm-kernel/2010-June/017320.html which seems to have been lost. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Cc: <stable@vger.kernel.org>
* ARM: Orion: Eth: Add clk/clkdev support.Andrew Lunn2012-05-08
| | | | | | | | | | | The t_clk is moved from the shared part of the ethernet driver into the per port section. Each port can have its own gated clock, which it needs to enable/disable, as oppossed to there being one clock shared by all ports. In practice, only kirkwood supports this at the moment. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Jamie Lentin <jm@lentin.co.uk> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* mv643xx_eth: use sw csum for big packetsSaeed Bishara2010-06-30
| | | | | | | | Some controllers (KW, Dove) limits the TX IP/layer4 checksum offloading to a max size. Signed-off-by: Saeed Bishara <saeed@marvell.com> Acked-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* mv643xx_eth: remove force_phy_addr fieldLennert Buytenhek2008-09-05
| | | | | | | | | | | | | | | Currently, there are two different fields in the mv643xx_eth_platform_data struct that together describe the PHY address -- one field (phy_addr) has the address of the PHY, but if that address is zero, a second field (force_phy_addr) needs to be set to distinguish the actual address zero from a zero due to not having filled in the PHY address explicitly (which should mean 'use the default PHY address'). If we are a bit smarter about the encoding of the phy_addr field, we can avoid the need for a second field -- this patch does that. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* mv643xx_eth: smi sharing is a per-unit property, not a per-port oneLennert Buytenhek2008-09-05
| | | | | | | | | Which top-level unit's SMI interface to use should be a property of the top-level unit, not of the individual ports. This patch moves the ->shared_smi pointer from the per-port platform data to the global platform data. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* mv643xx_eth: require contiguous receive and transmit queue numberingLennert Buytenhek2008-09-05
| | | | | | | Simplify receive and transmit queue handling by requiring the set of queue numbers to be contiguous starting from zero. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
* mv643xx_eth: allow multiple TX queuesLennert Buytenhek2008-06-12
| | | | | | | | | | | As with the multiple RX queue support, allow the platform code to specify that the hardware we are running on supports multiple TX queues. This patch only uses the highest-numbered enabled queue to send packets to for now, this can be extended later to enable QoS and such. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Dale Farnsworth <dale@farnsworth.org>
* mv643xx_eth: allow multiple RX queuesLennert Buytenhek2008-06-12
| | | | | | | | | | Allow the platform code to specify that we are running on hardware that is capable of supporting multiple RX queues. If this option is used, initialise all of the given RX queues instead of just RX queue zero. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Dale Farnsworth <dale@farnsworth.org>
* mv643xx_eth: general cleanupLennert Buytenhek2008-06-12
| | | | | | | | | General cleanup of the mv643xx_eth driver. Mainly fixes coding style / indentation issues, get rid of some useless 'volatile's, kill some more superfluous comments, and such. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Dale Farnsworth <dale@farnsworth.org>
* mv643xx_eth: inter-mv643xx SMI port sharingLennert Buytenhek2008-04-29
| | | | | | | | | | | | | There exist chips with up to four mv643xx_eth silicon blocks but only one external SMI (MII management) interface -- the SMI logic of the first block is shared by all the blocks. Handle this by allowing a per-port override of which mv643xx_eth_shared's SMI registers (and spinlock) to use. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
* mv643xx_eth: shorten shared platform driver nameLennert Buytenhek2008-04-29
| | | | | | | | | | | Change the MV643XX_ETH_SHARED_NAME platform driver name to something shorter than 19 characters, so that we can register multiple (otherwise we end up with sysfs conflicts since all instances will map to "mv643xx_eth_shared." as there is a 20-char sysfs file name limit.) Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
* mv643xx_eth: configurable t_clkLennert Buytenhek2008-04-29
| | | | | | | | | | Make t_clk configurable via platform device data (with the current hardcoded value, 133 MHz, being the default), as it varies across different chip families. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
* mv643xx_eth: mbus decode window supportLennert Buytenhek2008-04-29
| | | | | | | | | | | Make it possible to pass mbus_dram_target_info to the mv643xx_eth driver via the platform data, and make the mv643xx_eth driver program the window registers based on this data if it is passed in. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
* mv643xx_eth: get rid of static variables, allow multiple instancesLennert Buytenhek2008-04-29
| | | | | | | | | | | Move mv643xx_eth's static state (ethernet register block base address and MII management interface spinlock) into a struct hanging off the shared platform device. This is necessary to support chips that contain multiple mv643xx_eth silicon blocks. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
* mv643xx_eth: Fix MV643XX_ETH offsets used by Pegasos 2Dale Farnsworth2007-10-30
| | | | | | | | | In the mv643xx_eth driver, we now use offsets from the ethernet register block within the chip, but the pegasos 2 platform still needs offsets from the full chip's register base address. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* fix breakage in pegasos_ethAl Viro2007-10-28
| | | | | | | | Fix fallout from commit b45d9147f1582333e180e1023624c003874b7312 ("mv643xx_eth: Remove unused register defines") Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mv643xx_eth: Split off mv643xx_eth platform device dataLennert Buytenhek2007-10-23
The mv643xx ethernet silicon block is also found in a couple of other Marvell chips. As a first step towards splitting off the mv643xx_eth bits from the rest of the mv643xx bits, this patch splits the mv643xx ethernet platform device data struct in linux/mv643xx.h off into linux/mv643xx_eth.h, and includes the latter from the former. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Tzachi Perelstein <tzachi@marvell.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
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