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path: root/include/linux/clk/sunxi.h
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* clk: sunxi: Remove custom phase functionMaxime Ripard2015-01-14
| | | | | | | | | Now that we don't have any user left for our custom phase function, we can safely remove this hack from the code. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Chen-Yu Tsai <wens@csie.org>
* clk: sunxi: Fixup clk_sunxi_mmc_phase_control to take a clk rather then a hw_clkHans de Goede2014-05-14
| | | | | | | | __clk_get_hw is supposed to be used by clk providers, not clk consumers. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: sunxi: Implement MMC phase controlEmilio López2014-05-05
| | | | | | | | HdG: add header exporting clk_sunxi_mmc_phase_control Signed-off-by: Emilio López <emilio@elopez.com.ar> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: sunxi: declare OF clock providerSebastian Hesselbarth2013-09-29
| | | | | | | | | | | | Common clock framework allows to register clock providers to get called on of_clk_init() by using CLK_OF_DECLARE. This converts sunxi clock providers to make use of it and get rid of the mach specific clk init call. As sunxi has a bunch of independent clk provider nodes, we hook current clock init to board compatible to make it called once. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Mike Turquette <mturquette@linaro.org>
* clk: arm: sunxi: Add a new clock driver for sunxi SOCsEmilio López2013-03-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit implements the base CPU clocks for sunxi devices. It has been tested using a slightly modified cpufreq driver from the linux-sunxi 3.0 tree. Additionally, document the new bindings introduced by this patch. Idling: / # cat /sys/kernel/debug/clk/clk_summary clock enable_cnt prepare_cnt rate --------------------------------------------------------------------- osc32k 0 0 32768 osc24M_fixed 0 0 24000000 osc24M 0 0 24000000 apb1_mux 0 0 24000000 apb1 0 0 24000000 pll1 0 0 60000000 cpu 0 0 60000000 axi 0 0 60000000 ahb 0 0 60000000 apb0 0 0 30000000 dummy 0 0 0 After "yes >/dev/null &": / # cat /sys/kernel/debug/clk/clk_summary clock enable_cnt prepare_cnt rate --------------------------------------------------------------------- osc32k 0 0 32768 osc24M_fixed 0 0 24000000 osc24M 0 0 24000000 apb1_mux 0 0 24000000 apb1 0 0 24000000 pll1 0 0 1008000000 cpu 0 0 1008000000 axi 0 0 336000000 ahb 0 0 168000000 apb0 0 0 84000000 dummy 0 0 0 Signed-off-by: Emilio López <emilio@elopez.com.ar> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: sunxi: Use common of_clk_init() functionPrashant Gaikwad2013-01-24
| | | | | | | | Use common of_clk_init() function to initialize clocks. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Acked-by: Maxime Ripard <maxime.ripard@anandra.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
* clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCsMaxime Ripard2012-11-16
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Mike Turquette <mturquette@ti.com>