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*---. Merge branches 'fixes', 'pgt-next' and 'versatile' into develRussell King2011-03-20
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| | | * ARM: clcd: add method for describing display capabilitiesRussell King2011-02-19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ARM CLCD PL110 controller in TFT mode provides two output formats based on whether the controller is in 24bpp mode or not - either 5551 or 888. PL111 augments this with a 444 and 565 modes. Some implementations provide an external MUX on the PL110 output to reassign the bits to achieve 565 mode. Provide a system of capability flags to allow the CLCD driver to work out what is supported by each panel and board, and therefore which display formats are permitted. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * ARM: clcd: use amba_part() to determine if we have a PL110 primecellRussell King2011-02-19
| | |/ | |/| | | | | | | | | | | | | | | | | | | Instead of matching the entire peripheral ID, match against just the part number using the amba_xxx() macros. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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*-. \ \ Merge branches 'aaci', 'mmci-dma', 'pl' and 'pl011' into driversRussell King2011-03-17
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| | * | ARM: 6758/1: amba: support pm opsRabin Vincent2011-02-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support pm_ops in the AMBA bus, required to allow drivers to use runtime pm. The implementation of AMBA bus pm ops is based on the platform bus implementation. Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: amba: make amba_driver id_table constRussell King2011-02-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the bus level code deals with a const id table, we can also make the ID table in the amba_driver structure also const. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: amba: make probe() functions take const id tablesRussell King2011-02-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make Primecell driver probe functions take a const pointer to their ID tables. Drivers should never modify their ID tables in their probe handler. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * | ARM: 6662/1: amba: make amba_bustype non-staticRob Herring2011-02-23
| |/ / |/| | | | | | | | | | | | | | | | | | | | Export amba_bustype struct so it can be used for things like registering bus notifiers. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | ARM: mmci: add dmaengine-based DMA supportRussell King2011-02-04
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on a patch from Linus Walleij. Add dmaengine based support for DMA to the MMCI driver, using the Primecell DMA engine interface. The changes over Linus' driver are: - rename txsize_threshold to dmasize_threshold, as this reflects the purpose more. - use 'mmci_dma_' as the function prefix rather than 'dma_mmci_'. - clean up requesting of dma channels. - don't release a single channel twice when it's shared between tx and rx. - get rid of 'dma_enable' bool - instead check whether the channel is NULL. - detect incomplete DMA at the end of a transfer. Some DMA controllers (eg, PL08x) are unable to be configured for scatter DMA and also listen to all four DMA request signals [BREQ,SREQ,LBREQ,LSREQ] from the MMCI. They can do one or other but not both. As MMCI uses LBREQ/LSREQ for the final burst/words, PL08x does not transfer the last few words. - map and unmap DMA buffers using the DMA engine struct device, not the MMCI struct device - the DMA engine is doing the DMA transfer, not us. - avoid double-unmapping of the DMA buffers on MMCI data errors. - don't check for negative values from the dmaengine tx submission function - Dan says this must never fail. - use new dmaengine helper functions rather than using the ugly function pointers directly. - allow DMA code to be fully optimized away using dma_inprogress() which is defined to constant 0 if DMA engine support is disabled. - request maximum segment size from the DMA engine struct device and set this appropriately. - removed checking of buffer alignment - the DMA engine should deal with its own restrictions on buffer alignment, not the individual DMA engine users. - removed setting DMAREQCTL - this confuses some DMA controllers as it causes LBREQ to be asserted for the last seven transfers, rather than six SREQ and one LSREQ. - removed burst setting - the DMA controller should not burst past the transfer size required to complete the DMA operation. Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'next' of ↵Linus Torvalds2011-01-17
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (63 commits) ARM: PL08x: cleanup comments Update CONFIG_MD_RAID6_PQ to CONFIG_RAID6_PQ in drivers/dma/iop-adma.c ARM: PL08x: fix a warning Fix dmaengine_submit() return type dmaengine: at_hdmac: fix race while monitoring channel status dmaengine: at_hdmac: flags located in first descriptor dmaengine: at_hdmac: use subsys_initcall instead of module_init dmaengine: at_hdmac: no need set ACK in new descriptor dmaengine: at_hdmac: trivial add precision to unmapping comment dmaengine: at_hdmac: use dma_address to program DMA hardware pch_dma: support new device ML7213 IOH ARM: PL08x: prevent dma_set_runtime_config() reconfiguring memcpy channels ARM: PL08x: allow dma_set_runtime_config() to return errors ARM: PL08x: fix locking between prepare function and submit function ARM: PL08x: introduce 'phychan_hold' to hold on to physical channels ARM: PL08x: put txd's on the pending list in pl08x_tx_submit() ARM: PL08x: rename 'desc_list' as 'pend_list' ARM: PL08x: implement unmapping of memcpy buffers ARM: PL08x: store prep_* flags in async_tx structure ARM: PL08x: shrink srcbus/dstbus in txd structure ...
| * | ARM: PL08x: cleanup commentsRussell King - ARM Linux2011-01-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup the formatting of comments, remove some which don't make sense anymore. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [fix conflict with 96a608a4] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: fix a warningDan Williams2011-01-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/dma/amba-pl08x.c: In function 'pl08x_start_txd': drivers/dma/amba-pl08x.c:205: warning: dereferencing 'void *' pointer We never dereference llis_va aside from assigning it to a struct pl08x_lli pointer or calculating the address of array element 0. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: fix locking between prepare function and submit functionRussell King - ARM Linux2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PL08x driver holds on to the channel lock with interrupts disabled between the prepare and the subsequent submit API functions. This means that the locking state when the prepare function returns is dependent on whether it suceeeds or not. It did this to ensure that the physical channel wasn't released, and as it used to add the descriptor onto the pending list at prepare time rather than submit time. Now that we have reorganized the code to remove those reasons, we can now safely release the spinlock at the end of preparation and reacquire it in our submit function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: introduce 'phychan_hold' to hold on to physical channelsRussell King - ARM Linux2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce 'phychan_hold' to hold on to physical DMA channels while we're preparing a new descriptor for it. This will be incremented when we allocate a physical channel and set the MUX registers during the preparation of the TXD, and will only be decremented when the TXD is submitted. This prevents the physical channel being given up before the new TXD is placed on the queue. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: rename 'desc_list' as 'pend_list'Russell King - ARM Linux2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This 'desc_list' is actually a list of pending descriptors, so name it after its function (pending list) rather than what it contains (descriptors). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: shrink srcbus/dstbus in txd structureRussell King - ARM Linux2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | We only need to store the dma address. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: allow AHB master port selection to be configuredRussell King - ARM Linux2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Platforms need to be able to control which AHB master interface is used, as each AHB master interface may be asymetric. Allow the interfaces used for fetching LLIs, memory, and each peripheral to be configured individually. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: move default cctl into txd structureRussell King - ARM Linux2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than modifying platform data while preparing a transfer, copy the cctl value into the txd structure and modify the value there. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: move ccfg into txd structureRussell King - ARM Linux2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ccfg register is used to configure the channel parameters - the type and direction of transfer, the flow control signal and IRQ mask enables. The type and direction of transfer is known in the relevent prep_* function where a txd is created. The IRQ mask enables are always set, and the flow control signals are always set when we start processing a txd according to phychan->signal. If we store the ccfg value in the txd structure, we can avoid modifying platform data - and even having it in platform data at all. So, remove it from platform data too. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: avoid duplicating registers in txd and phychan structuresRussell King - ARM Linux2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As we now have all the code accessing the phychan {csrc,cdst,clli,cctl, ccfg} members in one function, there's no point storing the data into the struct. Get rid of the struct members. Re-order the register dump in the dev_dbg() to reflect the order we write the registers to the DMA device. The txd {csrc,cdst,clli,cctl} values are duplicates of the lli[0] values, so there's no point duplicating these either. Program the DMAC registers directly from the lli[0] values. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: use 'size_t' for lengthsRussell King - ARM Linux2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use size_t for variables denoting lengths throughout, and use the 'z' qualifier for printing the value. For safety, add a BUG_ON() in pl08x_fill_lli_for_desc() to catch the remainder potentially becoming negative. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: avoid 'void *' struct fields when we can type them properlyRussell King - ARM Linux2011-01-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid using 'void *' struct fields when the structs are not defined in linux/amba/pl08x.h - instead, forward declare the struct names, and use these instead. This ensures we have proper typechecking. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * | ARM: PL08x: fix atomic_t usage and tx_submit() return value rangeRussell King - ARM Linux2011-01-04
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The last_issued variable uses an atomic type, which is only incremented inside a protected region, and then read. Everywhere else only reads the value, so it isn't using atomic_t correctly, and it doesn't even need to. Moreover, the DMA engine code provides us with a variable for this already - chan.cookie. Use chan.cookie instead. Also, avoid negative dma_cookie_t values - negative returns from tx_submit() mean failure, yet in reality we always succeed. Restart from cookie 1, just like other DMA engine drivers do. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | Merge branch 'misc' into develRussell King2011-01-06
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c
| * | ARM: 6467/1: amba: optional PrimeCell core voltage switchLinus Walleij2010-11-26
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On some contemporary sub-micron SoCs, peripherals on the chip have power domain switches, i.e. the voltage to the core may be turned off to conserve power. In the Ux500 we have this for out PrimeCell derivates. This patch makes it possible to specify an (optional) regulator to handle the voltage domain switch on AMBA PrimeCells, modeled very similar to how block clocks are handled. Additional amba_vcore_[enable|disable] calls are supplied to make it possible introduce optional powering off of the core voltage. Using this will require code to spool/unspool any core HW state. Cc: Rabin Vincent <rabin.vincent@stericsson.com> Cc: Bengt Jonsson <bengt.g.jonsson@stericsson.com> Cc: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: PL011: add DMA burst threshold support for ST variantsRussell King2011-01-05
| | | | | | | | | | | | | | | | | | | | | | ST Micro variants has some specific dma burst threshold compensation, which allows them to make better use of a DMA controller. Add support to set this up. Based on a patch from Linus Walleij. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: PL011: Add support for transmit DMARussell King2011-01-05
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DMA engine support for transmit to the PL011 driver. Based on a patch from Linus Walliej, with the following changes: - remove RX DMA support. As PL011 doesn't give us receive timeout interrupts, we only get notified of received data when the RX DMA has completed. This rather sucks for interactive use of the TTY. - remove abuse of completions. Completions are supposed to be for events, not to tell what condition buffers are in. Replace it with a simple 'queued' bool. - fix locking - it is only safe to access the circular buffer with the port lock held. - only map the DMA buffer when required - if we're ever behind an IOMMU this helps keep IOMMU usage down, and also ensures that we're legal when we change the scatterlist entry length. - fix XON/XOFF sending - we must send XON/XOFF characters out as soon as possible - waiting for up to 4095 characters in the DMA buffer to be sent first is not acceptable. - fix XON/XOFF receive handling - we need to stop DMA when instructed to by the TTY layer, and restart it again when instructed to. There is a subtle problem here: we must not completely empty the circular buffer with DMA, otherwise we will not be notified of XON. - change the 'enable_dma' flag into a 'using DMA' flag, and track whether we can use TX DMA by whether the channel pointer is non-NULL. This gives us more control over whether we use DMA in the driver. - we don't need to have the TX DMA buffer continually allocated for each port - instead, allocate it when the port starts up, and free it when it's shut down. Update the 'using DMA' flag if we get the buffer, and adjust the TTY FIFO size appropriately. - if we're going to use PIO to send characters, use the existing IRQ based functionality rather than reimplementing it. This also ensures we call uart_write_wakeup() at the appropriate time, otherwise we'll stall. - use DMA engine helper functions for type safety. - fix init when built as a module - we can't have to initcall functions, so we must settle on one. This means we can eliminate the deferred DMA initialization. - there is no need to terminate transfers on a failed prep_slave_sg() call - nothing has been setup, so nothing needs to be terminated. This avoids a potential deadlock in the DMA engine code (tasklet->callback->failed prepare->terminate->tasklet_disable which then ends up waiting for the tasklet to finish running.) - Dan says that the submission callback should not return an error: | dma_submit_error() is something I should have removed after commit | a0587bcf "ioat1: move descriptor allocation from submit to prep" all | errors should be notified by prep failing to return a descriptor | handle. Negative dma_cookie_t values are only returned by the | dma_async_memcpy* calls which translate a prep failure into -ENOMEM. So remove the error handling at that point. This also solves the potential deadlock mentioned in the previous comment. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'next' of ↵Linus Torvalds2010-10-27
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (48 commits) DMAENGINE: move COH901318 to arch_initcall dma: imx-dma: fix signedness bug dma/timberdale: simplify conditional ste_dma40: remove channel_type ste_dma40: remove enum for endianess ste_dma40: remove TIM_FOR_LINK option ste_dma40: move mode_opt to separate config ste_dma40: move channel mode to a separate field ste_dma40: move priority to separate field ste_dma40: add variable to indicate valid dma_cfg async_tx: make async_tx channel switching opt-in move async raid6 test to lib/Kconfig.debug dmaengine: Add Freescale i.MX1/21/27 DMA driver intel_mid_dma: change the slave interface intel_mid_dma: fix the WARN_ONs intel_mid_dma: Add sg list support to DMA driver intel_mid_dma: Allow DMAC2 to share interrupt intel_mid_dma: Allow IRQ sharing intel_mid_dma: Add runtime PM support DMAENGINE: define a dummy filter function for ste_dma40 ...
| * dmaengine: driver for the ARM PL080/PL081 PrimeCells v5Linus Walleij2010-09-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This creates a DMAengine driver for the ARM PL080/PL081 PrimeCells based on the implementation earlier submitted by Peter Pearse. This is working like a charm for memcpy and slave DMA to the PL011 PrimeCell on the PB11MPCore. This DMA controller is used in mostly unmodified form in the ARM RealView and Versatile platforms, in the ST-Ericsson Nomadik, and in the ST SPEAr platform. It has been converted to use the header from the Samsung PL080 derivate instead of its own defintions. The Samsungs have a custom driver in their mach-* folders though, atleast we can share the register definitions. Cc: Peter Pearse <peter.pearse@arm.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> [GFP_KERNEL to GFP_NOWAIT in pl08x_prep_dma_memcpy] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2010-10-21
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (278 commits) arm: remove machine_desc.io_pg_offst and .phys_io arm: use addruart macro to establish debug mappings arm: return both physical and virtual addresses from addruart arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC ARM: make struct machine_desc definition coherent with its comment eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_free cpuimx27: fix compile when ULPI is selected mach-pcm037_eet: fix compile errors Fixing ethernet driver compilation error for i.MX31 ADS board cpuimx51: update board support mx5: add cpuimx51sd module and its baseboard iomux-mx51: fix GPIO_1_xx 's IOMUX configuration imx-esdhc: update devices registration mx51: add resources for SD/MMC on i.MX51 iomux-mx51: fix SD1 and SD2's iomux configuration clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readability clock-mx51: factorize clk_set_parent and clk_get_rate eukrea_mbimxsd: add support for DVI displays cpuimx25 & cpuimx35: fix OTG port registration in host mode i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472 ...
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| *-. \ Merge branches 'at91', 'dcache', 'ftrace', 'hwbpt', 'misc', 'mmci', 's3c', ↵Russell King2010-10-18
| |\ \ \ | | |_|/ | |/| | | | | | 'st-ux' and 'unwind' into devel
| | | * ARM: 6307/1: mmci: allow the card detect GPIO value not to be invertedRabin Vincent2010-08-26
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | On some platforms, the GPIO value from the gpio_cd pin doesn't need to be inverted to get it active high. Add a cd_invert platform data parameter and change existing platforms using GPIO for CD (only Realview) to enable it. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: 6421/1: amba-pl011: add missing ST specific registersLinus Walleij2010-10-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ST Micro derivates have several extra interesting registers that we may soon use for something interesting so may just as well define them in the header. Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * ARM: 6368/1: move the PrimeCell IDs to use macrosLinus Walleij2010-10-08
| |/ | | | | | | | | | | | | | | | | | | This make four macros for the PrimeCell ID register available to drivers that use them witout using the PrimeCell/AMBA bus abstraction and struct amba_device. It also moves the magic PrimeCell CID "B105F00D" to the bus.h header file. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | spi/pl022: get rid of chipinfo dev pointerLinus Walleij2010-10-12
| | | | | | | | | | | | | | | | What is the dev pointer doing inside the platform data anyway. We have another pointer to the actual device at hand, use that. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/pl022: Add spi->mode support to AMBA SPI driverKevin Wells2010-10-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds spi->mode support for the AMBA pl022 driver and allows spidev to correctly alter SPI modes. Unused fields used in the pl022 header file for the pl022_config_chip have been removed. The ab8500 client driver selects the data transfer size instead of the platform data. For platforms that use the amba pl022 driver, the unused fields in the controller data structure have been removed and the .mode field in the SPI board info structure is used instead. Signed-off-by: Kevin Wells <wellsk40@gmail.com> Tested-by: Linus Walleij <linus.walleij@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | spi/pl022: add PrimeCell generic DMA supportLinus Walleij2010-10-12
|/ | | | | | | | | This extends the PL022 SSP/SPI driver with generic DMA engine support using the PrimeCell DMA engine interface. Also fix up the test code for the U300 platform. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* VIDEO: amba clcd: don't disable an already disabled clockRussell King2010-08-17
| | | | | | | | | | | Fix the clock enable/disable tracking in the AMBA CLCD driver so that the driver doesn't try to disable an already disabled clock, thereby causing the clock (if shared) to become unbalanced. This resolves a problem with CLCD on LPC32xx ARM platforms. Reported-by: Kevin Wells <wellsk40@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'misc' into develRussell King2010-07-31
|\ | | | | | | | | Conflicts: arch/arm/mm/init.c
| * ARM: 6243/1: mmci: pass power_mode to the translate_vdd callbackRabin Vincent2010-07-29
| | | | | | | | | | | | | | | | | | | | Platforms may have some external power control which need to be controlled from board specific code. Rename the translate_vdd() callback to vdd_handler() and pass it the power mode. Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6158/2: PL011 baudrate extension for ST-Ericssons derivativeLinus Walleij2010-07-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implementation of the ST-Ericsson baudrate extension in the PL011 block. In this modified variant it is possible to change the sampling factor from 16 to 8, and thanks to this we can get higher baudrates while still using the same peripheral clock. Also replace the simple division to determine the baud divisor with DIV_ROUND_CLOSEST() rather than a simple integer division. Cc: Alessandro Rubini <rubini@unipv.it> Cc: Jerzy Kasenberg <jerzy.kasenberg@tieto.com> Signed-off-by: Marcin Mielczarczyk <marcin.mielczarczyk@tieto.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * ARM: 6157/2: PL011 TX/RX split of LCR for ST-Ericssons derivativeLinus Walleij2010-07-27
| | | | | | | | | | | | | | | | | | | | In the ST-Ericsson version of the PL011 the TX and RX have different control registers. Cc: Alessandro Rubini <rubini@unipv.it> Signed-off-by: Marcin Mielczarczyk <marcin.mielczarczyk@tieto.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | ARM: AMBA: Add pclk support to AMBA bus infrastructureRussell King2010-07-31
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some platforms gate the pclk (APB - the bus - clock) to the peripherals for power saving, along with the functional clock. When devices are accessed without pclk enabled, the kernel will oops. This gives them two options: 1. Leave all clocks on all the time. 2. Attempt to gate pclk along with the functional clock. (With some hardware, pclk and the functional clock are gated by a single bit in a register.) (1) has the disadvantage that it causes increased power usage, which is bad news for battery operated devices. (2) can lead to kernel oops if registers are accessed without the functional clock being enabled. So, introduce the apb_pclk signal in such a way existing drivers don't need to be updated. Essentially, this means we guarantee that: 1. pclk will be enabled whenever the driver is bound to a device - from probe() to remove() time. 2. pclk will also be enabled when reading the primecell IDs from the device. In order to allow drivers to be incrementally updated to achieve greater power savings, we provide two additional calls to allow drivers to manage the pclk - amba_pclk_enable()/amba_pclk_disable(). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'next' of ↵Linus Torvalds2010-05-30
|\ | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: DMAENGINE: DMA40 U8500 platform configuration DMA: PL330: Add dma api driver
| * DMA: PL330: Add dma api driverJassi Brar2010-05-23
| | | | | | | | | | | | | | | | | | | | | | | | | | Add DMA Engine API driver for the PL330 DMAC. This driver is supposed to be reusable by various platforms that have one or more PL330 DMACs. Atm, DMA_SLAVE and DMA_MEMCPY capabilities have been implemented. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Reviewed-by: Linus Walleij <linus.walleij@stericsson.com> [dan.j.williams@intel.com: missing slab.h and ->device_control() fixups] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | Merge remote branch 'origin' into secretlab/next-spiGrant Likely2010-05-25
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| * Merge branch 'devel-stable' into develRussell King2010-05-17
| |\ | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/include/asm/system.h arch/arm/mm/Kconfig
| * | ARM: 6033/1: ARM: MMCI: pass max frequency from platformLinus Walleij2010-04-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduce the field f_max into the mmci_platform_data, making it possible to pass in a desired block clocking frequency from a board configuration. This is often more desirable than using a module parameter. We keep the module parameter as a fallback as well as the default frequency specified for this parameter if a parameter is not provided. This also adds some kerneldoc style documentation to the platform data struct in mmci.h. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | spi/pl022: add support for the PL023 derivateLinus Walleij2010-05-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for a further ST variant of the PL022 called PL023. Some differences in the control registers due to being stripped down to SPI mode only, and a new clock feedback sample delay config setting is available. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | spi/pl022: fix up differences between ARM and ST versionsLinus Walleij2010-05-25
| |/ |/| | | | | | | | | | | | | | | | | The PL022 SPI driver did not cleanly separate between the original unmodified ARM version and the ST Microelectronics versions. Split this more cleanly and fix some whitespace moaning from checkpatch at the same time. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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