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The LITMUS^RT kernel.
Bjoern Brandenburg
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path:
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asm-sparc64
Commit message (
Expand
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Author
Age
...
*
[SPARC64]: Add sun4v_cpu_qconf() hypervisor call.
David S. Miller
2006-03-20
*
[SPARC]: Kill off these __put_user_ret things.
David S. Miller
2006-03-20
*
[SPARC64]: Decode virtual-devices interrupts correctly.
David S. Miller
2006-03-20
*
[SPARC64]: Add prom_{start,stop}cpu_cpuid().
David S. Miller
2006-03-20
*
[SPARC64]: Fixup TSTATE layout diagram in asm/pstate.h
David S. Miller
2006-03-20
*
[SPARC64]: Fix gcc-3.3.x warnings.
David S. Miller
2006-03-20
*
[SPARC64]: Make error codes available from sun4v_intr_get*().
David S. Miller
2006-03-20
*
[SPARC64]: Fix comment typo in asm/hypervisor.h
David S. Miller
2006-03-20
*
[SPARC64]: Probe virtual-devices root node on sun4v.
David S. Miller
2006-03-20
*
[SPARC64]: Generic sun4v_build_irq().
David S. Miller
2006-03-20
*
[SPARC64]: Implement rest of generic interrupt hypervisor calls.
David S. Miller
2006-03-20
*
[SPARC64]: Move devino_to_sysino out of pci_sun4v_asm.S
David S. Miller
2006-03-20
*
[SPARC64]: Use inline patching for critical PTE operations.
David S. Miller
2006-03-20
*
[SPARC64]: Move PTE field definitions back into asm/pgtable.h
David S. Miller
2006-03-20
*
[SPARC64]: Recognize "virtual-console" as input and output console device.
David S. Miller
2006-03-20
*
[SPARC64]: Deal with PTE layout differences in SUN4V.
David S. Miller
2006-03-20
*
[SPARC64]: Register kernel TSB with hypervisor.
David S. Miller
2006-03-20
*
[SPARC64]: Fix some SUN4V TLB miss bugs.
David S. Miller
2006-03-20
*
[SPARC64]: Use ASI_SCRATCHPAD address 0x0 properly.
David S. Miller
2006-03-20
*
[SPARC64]: Add HV_PCI_TSBID() macro.
David S. Miller
2006-03-20
*
[SPARC64]: More SUN4V PCI controller work.
David S. Miller
2006-03-20
*
[SPARC64]: Beginnings of SUN4V PCI controller support.
David S. Miller
2006-03-20
*
[SPARC]: Clean up idprom header files.
David S. Miller
2006-03-20
*
[SPARC64]: Hypervisor TSB context switching.
David S. Miller
2006-03-20
*
[SPARC64]: Implement sun4v TSB miss handlers.
David S. Miller
2006-03-20
*
[SPARC64]: Detect sun4v early in boot process.
David S. Miller
2006-03-20
*
[SPARC64]: Sun4v cross-call sending support.
David S. Miller
2006-03-20
*
[SPARC64]: Sun4v interrupt handling.
David S. Miller
2006-03-20
*
[SPARC64]: Add sun4v mondo queue bases to struct trap_per_cpu.
David S. Miller
2006-03-20
*
[SPARC64]: Fix some comment typos in asm/hypervisor.h
David S. Miller
2006-03-20
*
[SPARC64]: Patch up mmu context register writes for sun4v.
David S. Miller
2006-03-20
*
[SPARC64]: Register per-cpu fault status area with sun4v hypervisor.
David S. Miller
2006-03-20
*
[SPARC64]: asm/cpudata.h needs asm/asi.h
David S. Miller
2006-03-20
*
[SPARC64]: Rename gl_{1,2}insn_patch --> sun4v_{1,2}insn_patch
David S. Miller
2006-03-20
*
[SPARC64]: Initial sun4v TLB miss handling infrastructure.
David S. Miller
2006-03-20
*
[SPARC64]: Sanitize %pstate writes for sun4v.
David S. Miller
2006-03-20
*
[SPARC64]: Kill all %pstate changes in context switch code.
David S. Miller
2006-03-20
*
[SPARC64]: Add initial code to twiddle %gl on trap entry/exit.
David S. Miller
2006-03-20
*
[SPARC64]: Add define for "GL" field of sun4v %tstate register.
David S. Miller
2006-03-20
*
[SPARC64]: Add sun4v case to __GET_CPUID() patch tables.
David S. Miller
2006-03-20
*
[SPARC64]: Sun4v interrupt queue register definitions.
David S. Miller
2006-03-20
*
[SPARC64]: Sun4v scratchpad register layout.
David S. Miller
2006-03-20
*
[SPARC64]: Sun4v specific ASI defines.
David S. Miller
2006-03-20
*
[SPARC64]: Add Niagara init-store twin-load ASI defines.
David S. Miller
2006-03-20
*
[SPARC64]: Add 'hypervisor' to ultra_tlb_type enumeration.
David S. Miller
2006-03-20
*
[SPARC64]: SUN4V hypervisor interface defines.
David S. Miller
2006-03-20
*
[SPARC64]: Refine register window trap handling.
David S. Miller
2006-03-20
*
[SPARC64]: Add explicit register args to trap state loading macros.
David S. Miller
2006-03-20
*
[SPARC64]: Refine code sequences to get the cpu id.
David S. Miller
2006-03-20
*
[SPARC64]: Correctable ECC errors cannot occur at trap level > 0.
David S. Miller
2006-03-20
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