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* sh: Use a per-cpu ASID cache.Paul Mundt2007-02-12
| | | | | | | | Previously this was implemented using a global cache, cache this per-CPU instead and bump up the number of context IDs to match NR_CPUS. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Initial vsyscall page support.Paul Mundt2006-09-27
| | | | | | | | | | This implements initial support for the vsyscall page on SH. At the moment we leave it configurable due to having nommu to support from the same code base. We hook it up for the signal trampoline return at present, with more to be added later, once uClibc catches up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Various nommu fixes.Yoshinori Sato2006-09-27
| | | | | | | | This fixes up some of the various outstanding nommu bugs on SH. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: ioremap() overhaul.Paul Mundt2006-09-27
| | | | | | | | | | ioremap() overhaul. Add support for transparent PMB mapping, get rid of p3_ioremap(), etc. Also drop ioremap() and iounmap() routines from the machvec, as everyone can use the generic ioremap() API instead. For PCI memory apertures and other special cases, use the pci_iomap() API, as boards are already required to get the mapping right there. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH-4A Privileged Space Mapping Buffer (PMB) support.Paul Mundt2006-09-27
| | | | | | | Add support for 32-bit physical addressing through the SH-4A Privileged Space Mapping Buffer (PMB). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-16
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!