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* powerpc: Move include files to arch/powerpc/include/asmStephen Rothwell2008-08-03
| | | | | | | | | | | | | | from include/asm-powerpc. This is the result of a mkdir arch/powerpc/include/asm git mv include/asm-powerpc/* arch/powerpc/include/asm Followed by a few documentation/comment fixups and a couple of places where <asm-powepc/...> was being used explicitly. Of the latter only one was outside the arch code and it is a driver only built for powerpc. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc/e500mc: flush L2 on NAP for e500mcKumar Gala2008-06-26
| | | | | | | | | | | | If we have an L2CSR register (e500mc) we need to flush the L2 before going to nap. We use the HW flush mechanism provided in that register. The code reuses the CPU_FTR_604_PERF_MON bit as it is no longer used by any code in the kernel. Additionally we didn't reuse the exist L2CR feature bit as this is intended for the 7xxx L2CR register and L2CSR is part of the new Freescale "Book-E" registers. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: add DOZE/NAP support for e500 coreKumar Gala2008-06-26
| | | | | | | | | | | | | | The e500 core enter DOZE/NAP power-saving modes when the core go to cpu_idle routine. The power management default running mode is DOZE, If the user echo 1 > /proc/sys/kernel/powersave-nap the system will change to NAP running mode. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/booke: Fix definitions for dbcr[1-2] and dbsr registersJerone Young2008-06-16
| | | | | | | | | | | | | | | This takes values from the PowerPC ISA BookIII-E specifications that are for DBCR0. Many of these values are different from those currently specified, which are for the ppc405. Also added some bookE definitions for DBCR1 & DBCR2. [ galak@kernel.crashing.org: Added aliases to 40x DBCR0 to match Book-E, Added enhanced debug DBCR0/DBSR _CIRPT and _CRET defines and DBSR IRPT and RET. ] Signed-off-by: Jerone Young <jyoung5@us.ibm.com> Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Made FSL Book-E PMC support more genericAndy Fleming2008-02-06
| | | | | | | | | | Some of the more recent e300 cores have the same performance monitor implementation as the e500. e300 isn't book-e, so the name isn't really appropriate. In preparation for e300 support, rename a bunch of fsl_booke things to say fsl_emb (Freescale Embedded Performance Monitors). Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Reworking machine check handling and Fix 440/440ABenjamin Herrenschmidt2007-12-23
| | | | | | | | | | | | | | | This adds a cputable function pointer for the CPU-side machine check handling. The semantic is still the same as the old one, the one in ppc_md. overrides the one in cputable, though ultimately we'll want to change that so the CPU gets first. This removes CONFIG_440A which was a problem for multiplatform kernels and instead fixes up the IVOR at runtime from a setup_cpu function. The "A" version of the machine check also tweaks the regs->trap value to differenciate the 2 versions at the C level. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
* [POWERPC] include/asm-powerpc/: Spelling fixesjoe@perches.com2007-12-20
| | | | | Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Add SPRN for Embedded registers specified in PowerISA 2.04Kumar Gala2007-12-11
| | | | | | | | | | | | | | * Added SPRN for new architectural features added for embedded: - Alternate Time Base (ATB, ATBL, ATBU) - Doorbell Interrupts (IVOR36, IVOR37) - SPRG8/9 - External Proxy (EPR) - External PID load/store (EPLC, EPSC) * Added BUCSR for Freescale Embedded Processors * Moved around MAS7 so its in numeric order Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Fix FSL BookE machine check reportingBecky Bruce2007-08-17
| | | | | | | | | | Reserved MCSR bits on FSL BookE parts may have spurious values when mcheck occurs. Mask these off when printing the MCSR to avoid confusion. Also, get rid of the MCSR_GL_CI bit defined for e500 - this bit doesn't actually have any meaning. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Move reg_booke.h to include/asm-powerpcBecky Bruce2007-05-10
This patch moves a copy of reg_booke.h to include/asm-powerpc and fixes up the ifdef protection. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>