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* [PATCH] mm: mremap correct rmap accountingHugh Dickins2007-01-30
| | | | | | | | | | | | | | | | | | | Nick Piggin points out that page accounting on MIPS multiple ZERO_PAGEs is not maintained by its move_pte, and could lead to freeing a ZERO_PAGE. Instead of complicating that move_pte, just forget the minor optimization when mremapping, and change the one thing which needed it for correctness - filemap_xip use ZERO_PAGE(0) throughout instead of according to address. [ "There is no block device driver one could use for XIP on mips platforms" - Carsten Otte ] Signed-off-by: Hugh Dickins <hugh@veritas.com> Cc: Nick Piggin <nickpiggin@yahoo.com.au> Cc: Andrew Morton <akpm@osdl.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [MIPS] Fix wrong checksum calculation on 64-bit MIPSAtsushi Nemoto2007-01-24
| | | | | | | | | | | | | | | | The commit 8e3d8433d8c22ca6c42cba4a67d300c39aae7822 ([NET]: MIPS checksum annotations and cleanups) broke 64-bit MIPS. The problem is the commit replaces some unsigned long with __be32. On 64bit MIPS, a __be32 (i.e. unsigned int) value is represented as a sign-extented 32-bit value in a 64-bit argument register. So the address 192.168.0.1 (0xc0a80001) is passed as 0xffffffffc0a80001 to csum_tcpudp_nofold() but the asm code in the function expects 0x00000000c0a80001, therefore it returns a wrong checksum. Explicit cast to unsigned long is needed to drop high 32bit. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] vr41xx: need one more nop with mtc0_tlbw_hazard()Yoichi Yuasa2007-01-24
| | | | | | | NEC VR4111 and VR4121 need one more nop with mtc0_tlbw_hazard(). Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix APM buildRalf Baechle2007-01-24
| | | | | | Definitions for TIF_FREEZE and _TIF_FREEZE were missing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SMTC: Instant IPI replay.Ralf Baechle2007-01-23
| | | | | | | | | | | | SMTC pseudo-interrupts between TCs are deferred and queued if the target TC is interrupt-inhibited (IXMT). In the first SMTC prototypes, these queued IPIs were serviced on return to user mode, or on entry into the kernel idle loop. The INSTANT_REPLAY option dispatches them as part of local_irq_restore() processing, which adds runtime overhead (hence the option to turn it off), but ensures that IPIs are handled promptly even under heavy I/O interrupt load. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SMTC build fixAtsushi Nemoto2007-01-08
| | | | | | | Pass "irq" to __DO_IRQ_SMTC_HOOK() macro. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] csum_partial and copy in parallelAtsushi Nemoto2007-01-08
| | | | | | | | | Implement optimized asm version of csum_partial_copy_nocheck, csum_partial_copy_from_user and csum_and_copy_to_user which can do calculate and copy in parallel, based on memcpy.S. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [PATCH] Optimize D-cache alias handling on forkRalf Baechle2006-12-13
| | | | | | | | | | | Virtually index, physically tagged cache architectures can get away without cache flushing when forking. This patch adds a new cache flushing function flush_cache_dup_mm(struct mm_struct *) which for the moment I've implemented to do the same thing on all architectures except on MIPS where it's a no-op. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] MIPS: Fix COW D-cache aliasing on forkAtsushi Nemoto2006-12-13
| | | | | | | | | | | | | | Provide a custom copy_user_highpage() to deal with aliasing issues on MIPS. It uses kmap_coherent() to map an user page for kernel with same color. Rewrite copy_to_user_page() and copy_from_user_page() with the new interfaces to avoid extra cache flushing. The main part of this patch was originally written by Ralf Baechle; Atushi Nemoto did the the debugging. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [MIPS] IP27: Don't drag <asm/sn/arch.h> into topology.h.Ralf Baechle2006-12-11
| | | | | | Another way that old SGI types were getting dragged into generic code. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] IP27: Move definition of nic_t to its sole user.Ralf Baechle2006-12-11
| | | | | | This also fixes the duplicate definition of nic_t in the s2io driver. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] IP27: Don't include <asm/sn/arch.h>.Ralf Baechle2006-12-11
| | | | | | Nothing <asm/sn/arch.h> defines is used. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] compat.h uses struct pt_regs so needs to include ptrace.h.Ralf Baechle2006-12-11
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Move die and die_if_kernel() from system.h to ptrace.hRalf Baechle2006-12-10
| | | | | | | This eleminates the need to include ptrace.h into system.h and fixes a harmless namespace conflict on the PC symbol in bpck.c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix build of several IDE drivers by providing pci_get_legacy_ide_irqRalf Baechle2006-12-10
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [PATCH] add STB810 support (Philips PNX8550-based)Vitaly Wool2006-12-08
| | | | | Signed-off-by: Vitaly Wool <vitalywool@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Rename SNI_RM200_PCI to just SNI_RM preparing for more RM machinesThomas Bogendoerfer2006-12-08
| | | | | Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [PATCH] tty: preparatory structures for termios revampAlan Cox2006-12-08
| | | | | | | | | | | | | | | | | | | | In order to sort out our struct termios and add proper speed control we need to separate the kernel and user termios structures. Glibc is fine but the other libraries rely on the kernel exported struct termios and we need to extend this without breaking the ABI/API To do so we add a struct ktermios which is the kernel view of a termios structure and overlaps the struct termios with extra fields on the end for now. (That limitation will go away in later patches). Some platforms (eg alpha) planned ahead and thus use the same struct for both, others did not. This just adds the structures but does not use them, it seems a sensible splitting point for bisect if there are compile failures (not that I expect them) Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] cleanup asm/setup.h userspace visibilityAdrian Bunk2006-12-07
| | | | | | | | | | | | | | | | | | Make the contents of the userspace asm/setup.h header consistent on all architectures: - export setup.h to userspace on all architectures - export only COMMAND_LINE_SIZE to userspace - frv: move COMMAND_LINE_SIZE from param.h - i386: remove duplicate COMMAND_LINE_SIZE from param.h - arm: - export ATAGs to userspace - change u8/u16/u32 to __u8/__u16/__u32 Signed-off-by: Adrian Bunk <bunk@stusta.de> Acked-by: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Pass struct dev pointer to dma_cache_sync()Ralf Baechle2006-12-07
| | | | | | | | | | | | | | | | | Pass struct dev pointer to dma_cache_sync() dma_cache_sync() is ill-designed in that it does not have a struct device pointer argument which makes proper support for systems that consist of a mix of coherent and non-coherent DMA devices hard. Change dma_cache_sync to take a struct device pointer as first argument and fix all its callers to pass it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Add struct dev pointer to dma_is_consistent()Ralf Baechle2006-12-07
| | | | | | | | | | | | | | | dma_is_consistent() is ill-designed in that it does not have a struct device pointer argument which makes proper support for systems that consist of a mix of coherent and non-coherent DMA devices hard. Change dma_is_consistent to take a struct device pointer as first argument and fix the sole caller to pass it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] remove kernel syscallsArnd Bergmann2006-12-07
| | | | | | | | | | | | The last thing we agreed on was to remove the macros entirely for 2.6.19, on all architectures. Unfortunately, I think nobody actually _did_ that, so they are still there. [akpm@osdl.org: x86_64 fix] Cc: David Woodhouse <dwmw2@infradead.org> Cc: Greg Schafer <gschafer@zip.com.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] mm: k{,um}map_atomic() vs in_atomic()Peter Zijlstra2006-12-07
| | | | | | | | | | Make kmap_atomic/kunmap_atomic denote a pagefault disabled scope. All non trivial implementations already do this anyway. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Nick Piggin <npiggin@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] mm: pagefault_{disable,enable}()Peter Zijlstra2006-12-07
| | | | | | | | | | | | | | | | | | | | Introduce pagefault_{disable,enable}() and use these where previously we did manual preempt increments/decrements to make the pagefault handler do the atomic thing. Currently they still rely on the increased preempt count, but do not rely on the disabled preemption, this might go away in the future. (NOTE: the extra barrier() in pagefault_disable might fix some holes on machines which have too many registers for their own good) [heiko.carstens@de.ibm.com: s390 fix] Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Nick Piggin <npiggin@suse.de> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [MIPS] Import updates from i386's i8259.cAtsushi Nemoto2006-12-06
| | | | | | | Import many updates from i386's i8259.c, especially genirq transitions. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] pte_offset(dir,addr): parenthesis fixFranck Bui-Huu2006-12-06
| | | | | | | | | | | This patch adds missing parenthesis around 'dir' argument in pte_offset() macro definition. It also removes an extra space in the definition of pte_offset_kernel() macro. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [PATCH] Centralise definitions of sector_t and blkcnt_tMatthew Wilcox2006-12-04
| | | | | | | | | | | | | | | | CONFIG_LBD and CONFIG_LSF are spread into asm/types.h for no particularly good reason. Centralising the definition in linux/types.h means that arch maintainers don't need to bother adding it, as well as fixing the problem with x86-64 users being asked to make a decision that has absolutely no effect. The H8/300 porters seem particularly confused since I'm not aware of any microcontrollers that need to support 2TB filesystems. Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [MIPS] Cleanup memory barriers for weakly ordered systems.Ralf Baechle2006-12-04
| | | | | | | Also the R4000 / R4600 LL/SC instructions imply a sync so no explicit sync needed. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix atomic.h build errors.Ralf Baechle2006-12-04
| | | | | | | | | For the definition of atomic64_t atomic.h was relying on <asm/types.h> having been included previously. Before changeset d89d8e0637a5e4e0a12e90c4bc934d0d4c335239 this was happening as a side effect of including <linux/spinlock.h>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Use SYSVIPC_COMPAT to fix various problems on N32Atsushi Nemoto2006-12-04
| | | | | | | | | | | | | | N32 SysV IPC system calls should use 32-bit compatible code. arch/mips/kernel/linux32.c have similar compatible code for O32, but ipc/compat.c seems more complete. We can use it for both N32 and O32. This patch should fix these problems (and other possible problems): http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=1149188824.6986.6.camel%40diimka-laptop http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=44C6B829.8050508%40caviumnetworks.com Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] klconfig add missing bracketMariusz Kozlowski2006-12-04
| | | | | Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [NET]: MIPS checksum annotations and cleanups.Al Viro2006-12-03
| | | | | | | | | * sanitize prototypes, annotate * kill shift-by-16 in checksum calculations * htons->shift in l-e checksum calculations Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2006-12-01
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (31 commits) [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case. [MIPS] Remove unused definition of cpu_to_lelongp() [MIPS] Remove userspace proofing from <asm/bitops.h>. [MIPS] Remove old junk left from old atomic_lock. [MIPS] Use conditional traps for BUG_ON on MIPS II and better. [MIPS] mips HPT cleanup: make clocksource_mips public [MIPS] do_IRQ cleanup [MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants. [MIPS] Remove redundant r4k_blast_icache() calls [MIPS] Work around bogus gcc warnings. [MIPS] Fix double inclusions [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq [MIPS] IRQ cleanups [MIPS] mips hpt cleanup: get rid of mips_hpt_init [MIPS] PB1200: Remove duplicate definitions [MIPS] Fix alignment hole in struct cache_desc; shrink struct. [MIPS] Oprofile: kernel support for the R10000. [MIPS] Remove unused R10000 performance counter definitions. [MIPS] Add support for kexec [MIPS] Don't print presence of WAIT instruction on bootup. ...
| * [MIPS] Remove duplicate ISA DMA code for 0 DMA channel case.Ralf Baechle2006-11-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Remove unused definition of cpu_to_lelongp()Ralf Baechle2006-11-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Remove userspace proofing from <asm/bitops.h>.Ralf Baechle2006-11-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Remove old junk left from old atomic_lock.Ralf Baechle2006-11-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Use conditional traps for BUG_ON on MIPS II and better.Ralf Baechle2006-11-29
| | | | | | | | | | | | | | This shaves of around 4kB and a few cycles for the average kernel that has CONFIG_BUG enabled. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] mips HPT cleanup: make clocksource_mips publicAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | Make clocksource_mips public and get rid of mips_hpt_read, mips_hpt_mask. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] do_IRQ cleanupAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | | | Now we have both function and macro version of do_IRQ() and the former is used only by DEC and non-preemptive kernel. This patch makes everyone use the macro version and removes the function version. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irqAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Further incorporation of generic irq framework. Replacing __do_IRQ() by proper flow handler would make the irq handling path a bit simpler and faster. * use generic_handle_irq() instead of __do_IRQ(). * use handle_level_irq for obvious level-type irq chips. * use handle_percpu_irq for irqs marked as IRQ_PER_CPU. * setup .eoi routine for irq chips possibly used with handle_percpu_irq. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] IRQ cleanupsAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a big irq cleanup patch. * Use set_irq_chip() to register irq_chip. * Initialize .mask, .unmask, .mask_ack field. Functions for these method are already exist in most case. * Do not initialize .startup, .shutdown, .enable, .disable fields if default routines provided by irq_chip_set_defaults() were suitable. * Remove redundant irq_desc initializations. * Remove unnecessary local_irq_save/local_irq_restore, spin_lock. With this cleanup, it would be easy to switch to slightly lightwait irq flow handlers (handle_level_irq(), etc.) instead of __do_IRQ(). Though whole this patch is quite large, changes in each irq_chip are not quite simple. Please review and test on your platform. Thanks. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] mips hpt cleanup: get rid of mips_hpt_initAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | | | Currently nobody outside time.c require mips_hpt_init(). Remove it and call c0_hpt_timer_init() directly if R4k counter was used for timer interrupt. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Fix alignment hole in struct cache_desc; shrink struct.Ralf Baechle2006-11-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Remove unused R10000 performance counter definitions.Ralf Baechle2006-11-29
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Add support for kexecNicolas Schichan2006-11-29
| | | | | | | | | | | | | | | | | | A tiny userland application loading the kernel and invoking kexec_load for mips is available here: http://chac.le-poulpe.net/~nico/kexec/kexec-2006-10-18.tar.gz Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=nAtsushi Nemoto2006-11-29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a patch to load 64-bit modules to CKSEG0 so that can be compiled with -msym32 option. This makes each module ~10% smaller. * introduce MODULE_START and MODULE_END * custom module_alloc() * PGD for modules * change XTLB refill handler synthesizer * enable -msym32 for modules again (revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a) New XTLB refill handler looks like this: 80000080 dmfc0 k0,C0_BADVADDR 80000084 bltz k0,800000e4 # goto l_module_alloc 80000088 lui k1,0x8046 # %high(pgd_current) 8000008c ld k1,24600(k1) # %low(pgd_current) 80000090 dsrl k0,k0,0x1b # l_vmalloc_done: 80000094 andi k0,k0,0x1ff8 80000098 daddu k1,k1,k0 8000009c dmfc0 k0,C0_BADVADDR 800000a0 ld k1,0(k1) 800000a4 dsrl k0,k0,0x12 800000a8 andi k0,k0,0xff8 800000ac daddu k1,k1,k0 800000b0 dmfc0 k0,C0_XCONTEXT 800000b4 ld k1,0(k1) 800000b8 andi k0,k0,0xff0 800000bc daddu k1,k1,k0 800000c0 ld k0,0(k1) 800000c4 ld k1,8(k1) 800000c8 dsrl k0,k0,0x6 800000cc mtc0 k0,C0_ENTRYLO0 800000d0 dsrl k1,k1,0x6 800000d4 mtc0 k1,C0_ENTRYL01 800000d8 nop 800000dc tlbwr 800000e0 eret 800000e4 dsll k1,k0,0x2 # l_module_alloc: 800000e8 bgez k1,80000008 # goto l_vmalloc 800000ec lui k1,0xc000 800000f0 dsubu k0,k0,k1 800000f4 lui k1,0x8046 # %high(module_pg_dir) 800000f8 beq zero,zero,80000000 800000fc nop 80000000 beq zero,zero,80000090 # goto l_vmalloc_done 80000004 daddiu k1,k1,0x4000 80000008 dsll32 k1,k1,0x0 # l_vmalloc: 8000000c dsubu k0,k0,k1 80000010 beq zero,zero,80000090 # goto l_vmalloc_done 80000014 lui k1,0x8046 # %high(swapper_pg_dir) Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Rewrite GALILEO_INL/GALILEO_OUTL to GT_READ/GT_WRITEYoichi Yuasa2006-11-29
| | | | | | | | | | | | | | | | This patch has rewritten GALILEO_INL/GALILEO_OUTL using GT_READ/GT_WRITE. This patch tested on Cobalt Qube2. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Use "long" for 64-bit values on 64-bit kernel.Atsushi Nemoto2006-11-29
| | | | | | | | | | | | | | This would get rid of some warnings about "long" vs. "long long". Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Introduce __pa_symbol()Franck Bui-Huu2006-11-29
| | | | | | | | | | | | | | | | | | | | This patch introduces __pa_symbol() macro which should be used to calculate the physical address of kernel symbols. It also relies on RELOC_HIDE() to avoid any compiler's oddities when doing arithmetics on symbols. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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