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* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-11
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] vpe_id is required for VSMP and SMTC buildsChris Dearman2008-06-16
| | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] MT: Scheduler support for SMTRalf Baechle2008-01-29
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix shadow register support.Ralf Baechle2007-11-15
| | | | | | | | | | | | | Shadow register support would not possibly have worked on multicore systems. The support code for it was also depending not on MIPS R2 but VSMP or SMTC kernels even though it makes perfect sense with UP kernels. SR sets are a scarce resource and the expected usage pattern is that users actually hardcode the register set numbers in their code. So fix the allocator by ditching it. Move the remaining CPU probe bits into the generic CPU probe. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Make facility to convert CPU types to strings generally available.Ralf Baechle2007-10-11
| | | | | | | So far /proc/cpuinfo has been the only user but human readable processor name are more useful than that for proc. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove IP27 specific structures from struct cpuinfo_mipsRalf Baechle2007-10-11
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] FPU ownership management & preemption fixesAtsushi Nemoto2007-03-16
| | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Fix alignment hole in struct cache_desc; shrink struct.Ralf Baechle2006-11-29
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Don't include linux/config.h from anywhere else in include/David Woodhouse2006-04-26
| | | | Signed-off-by: David Woodhouse <dwmw2@infradead.org>
* [MIPS] MT: Improved multithreading support.Ralf Baechle2006-04-18
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] local_r4k_flush_cache_page fixAtsushi Nemoto2006-03-18
| | | | | | | | | | If dcache_size != icache_size or dcache_size != scache_size, or set-associative cache, icache/scache does not flushed properly. Make blast_?cache_page_indexed() masks its index value correctly. Also, use physical address for physically indexed pcache/scache. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Cleanup decoding of MIPSxx config registers.Ralf Baechle2005-10-29
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-16
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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