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* Merge branch 'release' of ↵Linus Torvalds2007-03-21
|\ | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] Fix wrong /proc/iomem on SGI Altix [IA64] Altix: ioremap vga_console_iobase [IA64] Fix typo/thinko in crash.c [IA64] Fix get_model_name() for mixed cpu type systems [IA64] min_low_pfn and max_low_pfn calculation fix
| * [IA64] min_low_pfn and max_low_pfn calculation fixZou Nan hai2007-03-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have seen bad_pte_print when testing crashdump on an SN machine in recent 2.6.20 kernel. There are tons of bad pte print (pfn < max_low_pfn) reports when the crash kernel boots up, all those reported bad pages are inside initmem range; That is because if the crash kernel code and data happens to be at the beginning of the 1st node. build_node_maps in discontig.c will bypass reserved regions with filter_rsvd_memory. Since min_low_pfn is calculated in build_node_map, so in this case, min_low_pfn will be greater than kernel code and data. Because pages inside initmem are freed and reused later, we saw pfn_valid check fail on those pages. I think this theoretically happen on a normal kernel. When I check min_low_pfn and max_low_pfn calculation in contig.c and discontig.c. I found more issues than this. 1. min_low_pfn and max_low_pfn calculation is inconsistent between contig.c and discontig.c, min_low_pfn is calculated as the first page number of boot memmap in contig.c (Why? Though this may work at the most of the time, I don't think it is the right logic). It is calculated as the lowest physical memory page number bypass reserved regions in discontig.c. max_low_pfn is calculated include reserved regions in contig.c. It is calculated exclude reserved regions in discontig.c. 2. If kernel code and data region is happen to be at the begin or the end of physical memory, when min_low_pfn and max_low_pfn calculation is bypassed kernel code and data, pages in initmem will report bad. 3. initrd is also in reserved regions, if it is at the begin or at the end of physical memory, kernel will refuse to reuse the memory. Because the virt_addr_valid check in free_initrd_mem. So it is better to fix and clean up those issues. Calculate min_low_pfn and max_low_pfn in a consistent way. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> Acked-by: Jay Lan <jlan@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | [PATCH] ia64: platform_kernel_launch_event is noop on generic kernelJohn Keller2007-03-18
|/ | | | | | | | | | | | | | | | Add a missing #define for the platform_kernel_launch_event. Without this fix, a call to platform_kernel_launch_event() becomes a noop on generic kernels. SN systems require this fix to successfully kdump/kexec from certain hardware errors. [bwalle@suse.de: fix it] Signed-off-by: John Keller <jpk@sgi.com> Cc: Bernhard Walle <bwalle@suse.de> Acked-by: Simon Horman <horms@verge.net.au> Acked-by: Jay Lan <jlan@sgi.com> Acked-by: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [IA64] Remove sparse warning from unwind codeKeith Owens2007-03-08
| | | | | | | | | | | Running ia64 through sparse gives warnings in the unwind code. include/asm-ia64/unwind.h:84:17: error: dubious bitfield without explicit `signed' or `unsigned' Make the bitfield explicitly unsigned. Signed-off-by: Keith Owens <kaos@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] kexec: declare ia64_mca_pal_base in mca.h rather than kexec.hSimon Horman2007-03-08
| | | | | | | | | | | | | * Kexec adds some code to arch/ia64/kernel/smp.c which needs ia64_mca_pal_base, so the kexec patch (actually the kdump patch) declares this per-cpu variable in include/asm-ia64/kexec.h. * ia64_mca_pal_base is defined in arch/ia64/kernel/mca.c, so it seems to me that it would make a lot more sense to declare it in include/asm-ia64/mca.h. Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] pci_get_legacy_ide_irq should return irq (not GSI)Zhang, Yanmin2007-03-08
| | | | | | | | Function pci_get_legacy_ide_irq is incorrect on ia64. It should return irq vector instead of GSI. The fixed number 14 and 15 are just GSI. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] whitespace fixes for include/asm-ia64/sal.hHorms2007-03-08
| | | | | | | | * Make use of spaces and tabs consistent * Make long line < 80col Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Proper handling of TLB errors from duplicate itr.d dropinsRuss Anderson2007-03-08
| | | | | | | | | | | | | | | Jack Steiner noticed that duplicate TLB DTC entries do not cause a linux panic. See discussion: http://www.gelato.unsw.edu.au/archives/linux-ia64/0307/6108.html The current TLB recovery code is recovering from the duplicate itr.d dropins, masking the underlying problem. This change modifies the MCA recovery code to look for the TLB check signature of the duplicate TLB entry and panic in that case. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] kexec: Use EFI_LOADER_DATA for ELF core headerMagnus Damm2007-03-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The address where the ELF core header is stored is passed to the secondary kernel as a kernel command line option. The memory area for this header is also marked as a separate EFI memory descriptor on ia64. The separate EFI memory descriptor is at the moment of the type EFI_UNUSABLE_MEMORY. With such a type the secondary kernel skips over the entire memory granule (config option, 16M or 64M) when detecting memory. If we are lucky we will just lose some memory, but if we happen to have data in the same granule (such as an initramfs image), then this data will never get mapped and the kernel bombs out when trying to access it. So this is an attempt to fix this by changing the EFI memory descriptor type into EFI_LOADER_DATA. This type is the same type used for the kernel data and for initramfs. In the secondary kernel we then handle the ELF core header data the same way as we handle the initramfs image. This patch contains the kernel changes to make this happen. Pretty straightforward, we reserve the area in reserve_memory(). The address for the area comes from the kernel command line and the size comes from the specialized EFI parsing function vmcore_find_descriptor_size(). The kexec-tools-testing code for this can be found here: http://lists.osdl.org/pipermail/fastboot/2007-February/005983.html Signed-off-by: Magnus Damm <magnus@valinux.co.jp> Cc: Simon Horman <horms@verge.net.au> Cc: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] Remove stack hard limit on ia64schwab@suse.de2007-03-06
| | | | | | | | Un-Breaks pthreads, since Oct 2003. Signed-off-by: Olaf Hering <olaf@aepfle.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* Revert "[IA64] swiotlb abstraction (e.g. for Xen)"Tony Luck2007-03-06
| | | | This reverts commit 51099005ab8e09d68a13fea8d55bc739c1040ca6.
* [PATCH] sched: remove SMT niceCon Kolivas2007-03-05
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove the SMT-nice feature which idles sibling cpus on SMT cpus to facilitiate nice working properly where cpu power is shared. The idling of cpus in the presence of runnable tasks is considered too fragile, easy to break with outside code, and the complexity of managing this system if an architecture comes along with many logical cores sharing cpu power will be unworkable. Remove the associated per_cpu_gain variable in sched_domains used only by this code. Also: The reason is that with dynticks enabled, this code breaks without yet further tweaks so dynticks brought on the rapid demise of this code. So either we tweak this code or kill it off entirely. It was Ingo's preference to kill it off. Either way this needs to happen for 2.6.21 since dynticks has gone in. Signed-off-by: Con Kolivas <kernel@kolivas.org> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: Nick Piggin <nickpiggin@yahoo.com.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Storage class should be before const qualifierTobias Klauser2007-02-17
| | | | | | | | | | | The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* Fix typos concerning hierarchyUwe Kleine-König2007-02-17
| | | | | | | | heirarchical, hierachical -> hierarchical heirarchy, hierachy -> hierarchy Signed-off-by: Uwe Kleine-König <zeisberg@informatik.uni-freiburg.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* ATA convert GSI to irq on ia64Zhang, Yanmin2007-02-15
| | | | | | | | | | | If an ATA drive uses legacy mode, ata driver will choose 14 and 15 as the fixed irq number. On ia64 platform, such numbers are GSI and should be converted to irq vector. Below patch against kernel 2.6.20 fixes it. Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* [PATCH] ia64: fix noncoherent DMA API so devres buildsRoland Dreier2007-02-14
| | | | | | | | | | | | | | | | | | | | | | | | On ia64, drivers/base/dma-mapping.c doesn't build because it calls dma_alloc_noncoherent() and dma_free_noncoherent(), which appear to be terminally broken; the calls end up generating errors like drivers/base/dma-mapping.c: In function 'dmam_noncoherent_release': drivers/base/dma-mapping.c:32: error: 'struct ia64_machine_vector' has no member named 'platform_dma_free_coherent' because the multiple levels of macro expansion in <asm/dma-mapping.h> and <asm/machvec.h> end up turning a call to dma_free_noncoherent() into ia64_mv.platform_dma_free_coherent (instead of the intended ia64_mv.dma_free_coherent). This patch fixes this by converting dma_{alloc,free}_noncoherent() into inline functions that call the corresponding coherent functions, instead of trying to do this with macros. Signed-off-by: Roland Dreier <rolandd@cisco.com> Acked-by: Tony Luck <tony.luck@intel.com> Cc: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [PATCH] ia64: 2048-byte command lineAlon Bar-Lev2007-02-12
| | | | | | | | | | | | | | | | | | | | Current implementation allows the kernel to receive up to 255 characters from the bootloader. While the boot protocol allows greater buffers to be sent. In current environment, the command-line is used in order to specify many values, including suspend/resume, module arguments, splash, initramfs and more. 255 characters are not enough anymore. After edd issue was fixed, and dynammic kernel command-line patch was accepted, we can extend the COMMAND_LINE_SIZE without runtime memory requirements. Signed-off-by: Alon Bar-Lev <alon.barlev@gmail.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [PATCH] consolidate line discipline number definitionsTilman Schmidt2007-02-11
| | | | | | | | | | | | | | | | | | | The line discipline numbers N_* are currently defined for each architecture individually, but (except for a seeming mistake) identically, in asm/termios.h. There is no obvious reason why these numbers should be architecture specific, nor any apparent relationship with the termios structure. The total number of these, NR_LDISCS, is defined in linux/tty.h anyway. So I propose the following patch which moves the definitions of the individual line disciplines to linux/tty.h too. Three of these numbers (N_MASC, N_PROFIBUS_FDL, and N_SMSBLOCK) are unused in the current kernel, but the patch still keeps the complete set in case there are plans to use them yet. Signed-off-by: Tilman Schmidt <tilman@imap.cc> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6Linus Torvalds2007-02-07
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (41 commits) Revert "PCI: remove duplicate device id from ata_piix" msi: Make MSI useable more architectures msi: Kill the msi_desc array. msi: Remove attach_msi_entry. msi: Fix msi_remove_pci_irq_vectors. msi: Remove msi_lock. msi: Kill msi_lookup_irq MSI: Combine pci_(save|restore)_msi/msix_state MSI: Remove pci_scan_msi_device() MSI: Replace pci_msi_quirk with calls to pci_no_msi() PCI: remove duplicate device id from ipr PCI: remove duplicate device id from ata_piix PCI: power management: remove noise on non-manageable hw PCI: cleanup MSI code PCI: make isa_bridge Alpha-only PCI: remove quirk_sis_96x_compatible() PCI: Speed up the Intel SMBus unhiding quirk PCI Quirk: 1k I/O space IOBL_ADR fix on P64H2 shpchp: delete trailing whitespace shpchp: remove DBG_XXX_ROUTINE ...
| * msi: Make MSI useable more architecturesEric W. Biederman2007-02-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The arch hooks arch_setup_msi_irq and arch_teardown_msi_irq are now responsible for allocating and freeing the linux irq in addition to setting up the the linux irq to work with the interrupt. arch_setup_msi_irq now takes a pci_device and a msi_desc and returns an irq. With this change in place this code should be useable by all platforms except those that won't let the OS touch the hardware like ppc RTAS. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | Merge branch 'release' of ↵Linus Torvalds2007-02-07
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6: (140 commits) ACPICA: reduce table header messages to fit within 80 columns asus-laptop: merge with ACPICA table update ACPI: bay: Convert ACPI Bay driver to be compatible with sysfs update. ACPI: bay: new driver is EXPERIMENTAL ACPI: bay: make drive_bays static ACPI: bay: make bay a platform driver ACPI: bay: remove prototype procfs code ACPI: bay: delete unused variable ACPI: bay: new driver adding removable drive bay support ACPI: dock: check if parent is on dock ACPICA: fix gcc build warnings Altix: Add ACPI SSDT PCI device support (hotplug) Altix: ACPI SSDT PCI device support ACPICA: reduce conflicts with Altix patch series ACPI_NUMA: fix HP IA64 simulator issue with extended memory domain ACPI: fix HP RX2600 IA64 boot ACPI: build fix for IBM x440 - CONFIG_X86_SUMMIT ACPICA: Update version to 20070126 ACPICA: Fix for incorrect parameter passed to AcpiTbDeleteTable during table load. ACPICA: Update copyright to 2007. ...
| * Altix: ACPI SSDT PCI device supportJohn Keller2007-02-02
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SN platform support for running with an ACPI capable PROM that defines PCI devices in SSDT tables. There is a SSDT table for every occupied slot on a root bus, containing info for every PPB and/or device on the bus. The SSDTs will be dynamically loaded/unloaded at hotplug enable/disable. Platform specific information that is currently passed via a SAL call, will now be passed via the Vendor resource in the ACPI Device object(s) defined in each SSDT. Signed-off-by: John Keller <jpk@sgi.com> Cc: Greg KH <greg@kroah.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Len Brown <len.brown@intel.com>
| * ACPICA: reduce conflicts with Altix patch seriesLen Brown2007-02-02
| | | | | | | | | | | | Syntax only -- no functional changes. Signed-off-by: Len Brown <len.brown@intel.com>
| * ACPICA: Allow ACPI id to be u32 instead of u8.Alexey Starikovskiy2007-02-02
| | | | | | | | | | | | | | Allow ACPI id to be u32 instead of u8. Requires drop of conversion tables with the acpiid as index. Signed-off-by: Len Brown <len.brown@intel.com>
| * ACPICA: minimal patch to integrate new tables into LinuxAlexey Starikovskiy2007-02-02
| | | | | | | | Signed-off-by: Len Brown <len.brown@intel.com>
* | [IA64] swiotlb abstraction (e.g. for Xen)Jan Beulich2007-02-05
| | | | | | | | | | | | | | | | | | Add abstraction so that the file can be used by environments other than IA64 and EM64T, namely for Xen. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | [IA64] swiotlb bug fixesJan Beulich2007-02-05
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes - marking I-cache clean of pages DMAed to now only done for IA64 - broken multiple inclusion in include/asm-x86_64/swiotlb.h - missing call to mark_clean in swiotlb_sync_sg() - a (perhaps only theoretical) issue in swiotlb_dma_supported() when io_tlb_end is exactly at the end of memory Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | [IA64] Hook up getcpu system call for IA64Fenghua Yu2007-02-05
| | | | | | | | | | | | | | | | getcpu system call returns cpu# and node# on which this system call and its caller are running. This patch hooks up its implementation on IA64. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | [IA64] virt_to_page() can be called with NULL argKirill Korotaev2007-02-05
| | | | | | | | | | | | | | | | | | It does not return NULL when arg is NULL. Signed-off-by: Alexey Kuznetsov <kuznet@ms2.inr.ac.ru> Signed-off-by: Kirill Korotaev <dev@openvz.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | [IA64] register memory ranges in a consistent mannerBob Picco2007-02-05
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While pursuing and unrelated issue with 64Mb granules I noticed a problem related to inconsistent use of add_active_range. There doesn't appear any reason to me why FLATMEM versus DISCONTIG_MEM should register memory to add_active_range with different code. So I've changed the code into a common implementation. The other subtle issue fixed by this patch was calling add_active_range in count_node_pages before granule aligning is performed. We were lucky with 16MB granules but not so with 64MB granules. count_node_pages has reserved regions filtered out and as a consequence linked kernel text and data aren't covered by calls to count_node_pages. So linked kernel regions wasn't reported to add_active_regions. This resulted in free_initmem causing numerous bad_page reports. This won't occur with this patch because now all known memory regions are reported by register_active_ranges. Acked-by: Mel Gorman <mel@csn.ul.ie> Signed-off-by: Bob Picco <bob.picco@hp.com> Acked-by: Simon Horman <horms@verge.net.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | [IA64] remove bogus prototype ia64_esi_init()Alex Williamson2007-02-05
| | | | | | | | | | | | | | This function doesn't exist. Signed-off-by: Alex Williamson <alex.williamson@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | [IA64] enable singlestep on system callbibo,mao2007-02-05
|/ | | | | | | | | | | | | | | | | | As is pointed out in http://www.gelato.org/community/view_linear.php?id=1_1036&from=authors&value=Ian%20Wienand#1_1039, if single step on break instruction, the break fault has higher priority than the single-step trap. When the break fault handler is entered, it advances the IP by 1 instruction so break instruction single-stepping is skipped, actually it is next instruction which is single stepped. This patch modifies this, it adds TIF_SINGLESTEP bit for thread flags, and generate a fake sigtrap when single stepping break instruction. Test case in attachment can verify this. Any comments is welcome. Signed-off-by: bibo, mao <bibo.mao@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* ia64: add pci_get_legacy_ide_irq()Bartlomiej Zolnierkiewicz2007-01-27
| | | | | | | Add pci_get_legacy_ide_irq() identical to the one used by i386/x86_64. Fixes amd74xx driver build on ia64 (bugzilla bug #6644). Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
* [PATCH] fix prototype of csum_ipv6_magic() (ia64)Al Viro2007-01-23
| | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [PATCH] FD_ZERO build fixAndrew Morton2007-01-11
| | | | | | | | | | | | | | | | | | unionfs managed to hit this on s390. Some architectures use __ptr_t in their FD_ZERO implementation. We don't have a __ptr_t. Switch them over to plain old void*. Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Josef 'Jeff' Sipek <jsipek@cs.sunysb.edu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge branch 'release' of ↵Linus Torvalds2006-12-13
|\ | | | | | | | | | | | | master.kernel.org:/home/ftp/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of master.kernel.org:/home/ftp/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] Move sg_dma_{len,address} from pci.h to scatterlist.h
| * [IA64] Move sg_dma_{len,address} from pci.h to scatterlist.hTony Luck2006-12-13
| | | | | | | | | | | | | | IA64 is in a tiny minority providing these defines in pci.h. Almost everyone else has them in scatterlist.h Signed-off-by: Tony Luck <tony.luck@intel.com>
* | [PATCH] Optimize D-cache alias handling on forkRalf Baechle2006-12-13
| | | | | | | | | | | | | | | | | | | | | | Virtually index, physically tagged cache architectures can get away without cache flushing when forking. This patch adds a new cache flushing function flush_cache_dup_mm(struct mm_struct *) which for the moment I've implemented to do the same thing on all architectures except on MIPS where it's a no-op. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] PM: Fix SMP races in the freezerRafael J. Wysocki2006-12-13
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, to tell a task that it should go to the refrigerator, we set the PF_FREEZE flag for it and send a fake signal to it. Unfortunately there are two SMP-related problems with this approach. First, a task running on another CPU may be updating its flags while the freezer attempts to set PF_FREEZE for it and this may leave the task's flags in an inconsistent state. Second, there is a potential race between freeze_process() and refrigerator() in which freeze_process() running on one CPU is reading a task's PF_FREEZE flag while refrigerator() running on another CPU has just set PF_FROZEN for the same task and attempts to reset PF_FREEZE for it. If the refrigerator wins the race, freeze_process() will state that PF_FREEZE hasn't been set for the task and will set it unnecessarily, so the task will go to the refrigerator once again after it's been thawed. To solve first of these problems we need to stop using PF_FREEZE to tell tasks that they should go to the refrigerator. Instead, we can introduce a special TIF_*** flag and use it for this purpose, since it is allowed to change the other tasks' TIF_*** flags and there are special calls for it. To avoid the freeze_process()-refrigerator() race we can make freeze_process() to always check the task's PF_FROZEN flag after it's read its "freeze" flag. We should also make sure that refrigerator() will always reset the task's "freeze" flag after it's set PF_FROZEN for it. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Pavel Machek <pavel@ucw.cz> Cc: Russell King <rmk@arm.linux.org.uk> Cc: David Howells <dhowells@redhat.com> Cc: Andi Kleen <ak@muc.de> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [IA64] enable trap code on slot 1Tony Luck2006-12-12
| | | | | | | | | | | | | | Because slot 1 of one instr bundle crosses border of two consecutive 8-bytes, kprobe on slot 1 is disabled. This patch enables kprobe on slot1, it only replaces higher 8-bytes of the instruction bundle and changes the exception code to ignore the low 12 bits of the break number (which is across the border in the lower 8-bytes of the bundle). For those instructions which must execute regardless qp bits, kprobe on slot 1 is still disabled. Signed-off-by: bibo,mao <bibo.mao@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [IA64] fix possible XPC deadlock when disconnectingDean Nelson2006-12-12
| | | | | | | | | | | | | | This patch eliminates a potential deadlock that is possible when XPC disconnects a channel to a partition that has gone down. This deadlock will occur if at least one of the kthreads created by XPC for the purpose of making callouts to the channel's registerer is detained in the registerer and will not be returning back to XPC until some registerer request occurs on the now downed partition. The potential for a deadlock is removed by ensuring that there always is a kthread available to make the channel disconnecting callout to the registerer. Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* [PATCH] sched: add option to serialize load balancingChristoph Lameter2006-12-10
| | | | | | | | | | | | | | | | | | Large sched domains can be very expensive to scan. Add an option SD_SERIALIZE to the sched domain flags. If that flag is set then we make sure that no other such domain is being balanced. [akpm@osdl.org: build fix] Signed-off-by: Christoph Lameter <clameter@sgi.com> Cc: Peter Williams <pwil3058@bigpond.net.au> Cc: Nick Piggin <nickpiggin@yahoo.com.au> Cc: Christoph Lameter <clameter@sgi.com> Cc: "Siddha, Suresh B" <suresh.b.siddha@intel.com> Cc: "Chen, Kenneth W" <kenneth.w.chen@intel.com> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] tty: preparatory structures for termios revampAlan Cox2006-12-08
| | | | | | | | | | | | | | | | | | | | In order to sort out our struct termios and add proper speed control we need to separate the kernel and user termios structures. Glibc is fine but the other libraries rely on the kernel exported struct termios and we need to extend this without breaking the ABI/API To do so we add a struct ktermios which is the kernel view of a termios structure and overlaps the struct termios with extra fields on the end for now. (That limitation will go away in later patches). Some platforms (eg alpha) planned ahead and thus use the same struct for both, others did not. This just adds the structures but does not use them, it seems a sensible splitting point for bisect if there are compile failures (not that I expect them) Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge branch 'release' of ↵Linus Torvalds2006-12-07
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] replace kmalloc+memset with kzalloc [IA64] resolve name clash by renaming is_available_memory() [IA64] Need export for csum_ipv6_magic [IA64] Fix DISCONTIGMEM without VIRTUAL_MEM_MAP [PATCH] Add support for type argument in PAL_GET_PSTATE [IA64] tidy up return value of ip_fast_csum [IA64] implement csum_ipv6_magic for ia64. [IA64] More Itanium PAL spec updates [IA64] Update processor_info features [IA64] Add se bit to Processor State Parameter structure [IA64] Add dp bit to cache and bus check structs [IA64] SN: Correctly update smp_affinty mask [IA64] sparse cleanups [IA64] IA64 Kexec/kdump
| * [IA64] Fix DISCONTIGMEM without VIRTUAL_MEM_MAPMatthew Wilcox2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | make allnoconfig currently fails to build because it selects DISCONTIGMEM without VIRTUAL_MEM_MAP. I see no particular reason this combination ought to fail, so I fixed it by: - Including memory_model.h in all circumstances, except when both DISCONTIGMEM and VIRTUAL_MEM_MAP are enabled. - Defining ia64_pfn_valid() to 1 unless VIRTUAL_MEM_MAP is enabled Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [PATCH] Add support for type argument in PAL_GET_PSTATEVenkatesh Pallipadi2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PAL_GET_PSTATE accepts a type argument to return different kinds of frequency information. Refer: Intel Itanium®Architecture Software Developer's Manual - Volume 2: System Architecture, Revision 2.2 (http://developer.intel.com/design/itanium/manuals/245318.htm) Add the support for type argument and use Instantaneous frequency in the acpi driver. Also fix a bug, where in return value of PAL_GET_PSTATE was getting compared with 'control' bits instead of 'status' bits. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] implement csum_ipv6_magic for ia64.Chen, Kenneth W2006-12-07
| | | | | | | | | | | | | | | | The asm version is 4.4 times faster than the generic C version and 10X smaller in code size. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] More Itanium PAL spec updatesRuss Anderson2006-12-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Additional updates to conform with Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's Manual" (January 2006). Add pal_bus_features_s bits 52 & 53 (page 2:347) Add pal_vm_info_2_s field max_purges (page 2:2:451) Add PAL_GET_HW_POLICY call (page 2:381) Add PAL_SET_HW_POLICY call (page 2:439) Sample output before: --------------------------------------------------------------------- cobra:~ # cat /proc/pal/cpu0/vm_info Physical Address Space : 50 bits Virtual Address Space : 61 bits Protection Key Registers(PKR) : 16 Implemented bits in PKR.key : 24 Hash Tag ID : 0x2 Size of RR.rid : 24 Supported memory attributes : WB, UC, UCE, WC, NaTPage --------------------------------------------------------------------- Sample output after: --------------------------------------------------------------------- cobra:~ # cat /proc/pal/cpu0/vm_info Physical Address Space : 50 bits Virtual Address Space : 61 bits Protection Key Registers(PKR) : 16 Implemented bits in PKR.key : 24 Hash Tag ID : 0x2 Max Purges : 1 Size of RR.rid : 24 Supported memory attributes : WB, UC, UCE, WC, NaTPage --------------------------------------------------------------------- Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] Add se bit to Processor State Parameter structureRuss Anderson2006-12-07
| | | | | | | | | | | | | | | | | | | | Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's Manual" (January 2006) adds a se bit to the Processor State Parameter fields (pages 2:299). This patch gets the structs back in sync with the spec. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] Add dp bit to cache and bus check structsRuss Anderson2006-12-07
| | | | | | | | | | | | | | | | | | | | Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's Manual" (January 2006) adds a dp bit to the cache_check and bus_check fields (pages 2:401-2:404). This patch gets the structs back in sync with the spec. Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
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