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* [Blackfin] arch: Fix BUG gpio_direction_output API is not compatitable with ↵Michael Hennerich2008-01-22
| | | | | | | | GENERIC_GPIO API interface signef-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* [Blackfin] arch: update to latest anomaly sheetsMike Frysinger2007-12-24
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* [Blackfin] arch: Fix gpio label handlingMichael Hennerich2007-12-24
| | | | | | | | | | | | | early serial init also utilizes the peripheral request api - however at this point bfin_gpio_init didn't allocate memory for the labels. So we always have two zombies (allocated pin functions without labels) This happens before the initcalls - We now allocate memory statically. Define MAX_RESOURCES individually for each cpu. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: cplb and map header file cleanupMike Frysinger2007-11-21
| | | | | | | | | | | | - remove duplicated defines for the BF561 - generalize L2 support (so that it works for BF54x) and mark it executable - add support for reading/executing the Boot ROM sections (since it has data/functions we may need at runtime) - and fixup names for each map Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: fix broken on BF52x, remove silly checks on processors for ↵Mike Frysinger2007-11-21
| | | | | | | | L1_SCRATCH defines Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: fix double fault definition for BF561 core A and core BMike Frysinger2007-11-15
| | | | | | | | VDSP has double fault on core a/b inverted for BF561 -- bit 11 is core a while bit 12 is core b Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: remove useless CONFIG_IRQCHIP_DEMUX_GPIOMike Frysinger2007-11-15
| | | | | | | | since we have this always turned on now and dont want it off (and hasnt been an option in a while) Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add a compatible DOUBLE_FAULT define to enable resets on ↵Mike Frysinger2007-11-12
| | | | | | | | double faults in either core Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Add missing definitions for BF561Mike Frysinger2007-10-30
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add TWIx_REGBASE and SPIx_REGBASE to specific CPU header ↵Bryan Wu2007-10-10
| | | | | | | files, use the new REGBASE for board platform resources Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: to do some consolidation of common code and common name spacesRobin Getz2007-10-10
| | | | | | | | now all BLKFIN should be BFIN, should be no functional changes. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Fix CCLK and SCLK checksRobin Getz2007-08-03
| | | | | | | | | | Fix CCLK and SCLK checks, combine all arch checks into one file for maintance. Checkins that remove more lines than they add are always good. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: scrub remaining ASSEMBLY usage since the switch to __ASSEMBLY__Mike Frysinger2007-07-24
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: fix bugs report by Andy Liu <yjhsou@gmail.com>, AD1836 can't ↵Bryan Wu2007-08-05
| | | | | | | | be probed in BF561-EZ Cc: Andy Liu <yjhsou@gmail.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Finalize the generic gpio support - add gpio_to_irq and ↵Michael Hennerich2007-07-24
| | | | | | | | irq_to_gpio Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: update to latest anomaly sheetsMike Frysinger2007-08-05
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: reorganize headers slightly so we can be sure things are ↵Mike Frysinger2007-07-25
| | | | | | | | defined early enough Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: use the [CS]SYNC() macros which include anomaly workarounds ↵Mike Frysinger2007-07-24
| | | | | | | | rather than __builtin_bfin_[cs]sync() Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: revise anomaly handling by basing things on the compiler not ↵Mike Frysinger2007-07-24
| | | | | | | | | | | | | the kconfig defines revise anomaly handling by basing things on the compiler not the kconfig defines, so the header is stable and usable outside of the kernel. This also allows us to move some code from preprocessing to compiling (gcc culls dead code) which should help with code quality (readability, catch minor bugs, etc...). Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: cleanup and standardize anomaly.h file format -- no ↵Mike Frysinger2007-07-24
| | | | | | | | functional changes Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: gpio pinmux and resource allocation API required by BF537 on ↵Michael Hennerich2007-10-03
| | | | | | | | chip ethernet mac driver Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: fix the aliased write macrosRobin Getz2007-08-05
| | | | | | Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: setup aliases for some core Core A MMRsMike Frysinger2007-07-24
| | | | | | | | | setup aliases for some core Core A MMRs to ease porting in cases where common code would actually want Core A (or Core B MMR is reserved) Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: clean up some coding style issuesBryan Wu2007-07-12
| | | | | Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: Add Support for Peripheral PortMux and resouce allocationMichael Hennerich2007-07-12
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add missing implementations SIC_IWR crosses several registersMichael Hennerich2007-06-20
| | | | | | | | | | SIC_IWR crosses several registers - add missing implementations - make sure SIC_IWR is SET after boot Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: initial supporting for BF548-EZKITRoy Huang2007-07-12
| | | | | | | | | | | | | | | | | The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: add missing braces around array bfin serial initMike Frysinger2007-06-20
| | | | | | Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
* Blackfin arch: update blackfin header files to latest one in VDSP.Bryan Wu2007-05-21
| | | | | | | | | | | | a) add new processor BF52x/BF54x header files b) update blackfin BF533/BF537/BF561 header files to latest one in VDSP. c) scrub watchdog/rtc masks from headers as we dont need/want them (too generic and the drivers dont use them) Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Roy Huang <roy.huang@analog.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Blackfin arch: Move write to VR_CTL closer to IDLEMichael Hennerich2007-05-21
| | | | | | Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* blackfin architectureBryan Wu2007-05-07
This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Signed-off-by: Aubrey Li <aubrey.li@analog.com> Signed-off-by: Jie Zhang <jie.zhang@analog.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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